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Searched refs:r1 (Results 1 – 15 of 15) sorted by relevance

/CTR-SDK-2.4.0/sources/libraries/math/ARMv6/
Dmath_Types.cpp37 VLDMIA r1,{s0-s11} // The entire pM matrix is put in the [S0-S11] registers in MTX34ToMTX33Asm()
50 VLDR.F32 s0,[r1,#0*12+0*4] in MTX43TransposeAsm()
51 VLDR.F32 s1,[r1,#1*12+0*4] in MTX43TransposeAsm()
52 VLDR.F32 s2,[r1,#2*12+0*4] in MTX43TransposeAsm()
53 VLDR.F32 s3,[r1,#3*12+0*4] in MTX43TransposeAsm()
54 VLDR.F32 s4,[r1,#0*12+1*4] in MTX43TransposeAsm()
55 VLDR.F32 s5,[r1,#1*12+1*4] in MTX43TransposeAsm()
56 VLDR.F32 s6,[r1,#2*12+1*4] in MTX43TransposeAsm()
57 VLDR.F32 s7,[r1,#3*12+1*4] in MTX43TransposeAsm()
58 VLDR.F32 s8,[r1,#0*12+2*4] in MTX43TransposeAsm()
[all …]
Dmath_Matrix44.cpp36 VLDMIA r1!,{s16-s23} // Matrix p1 is put into the [S16-S23] registers in MTX44AddAsm()
43 VLDMIA r1!,{s16-s19} // Continuation of p1 in MTX44AddAsm()
50 VLDMIA r1!,{s20-s23} // Continuation of p1 in MTX44AddAsm()
71 CMP r1,r0 // Are p and pOut the same? in MTX44CopyAsm()
73 VLDMIA r1,{s0-s15} // All p are put in the [S0-S15] registers in MTX44CopyAsm()
84 VLDR.F32 s24,[r1,#16*0+0*4] // p1[0][0] in MTX44MultAsm()
85 VLDR.F32 s25,[r1,#16*1+0*4] // p1[1][0] in MTX44MultAsm()
91 VLDR.F32 s24,[r1,#16*2+0*4] // p1[2][0] in MTX44MultAsm()
97 VLDR.F32 s25,[r1,#16*3+0*4] // p1[3][0] in MTX44MultAsm()
103 VLDR.F32 s24,[r1,#16*0+1*4] // p1[0][1] in MTX44MultAsm()
[all …]
Dmath_Matrix34.cpp35 CMP r1,r0 // Are p and pOut the same? in MTX34CopyAsm()
37 VLDMIA r1!,{s0-s5} // Segment and load to shorten stall times due to data hazards in MTX34CopyAsm()
39 VLDMIA r1,{s6-s11} in MTX34CopyAsm()
52 VLDMIA r1!,{s0-s7} // Matrix p1 is put into the [S0-S7] registers in MTX34MultAsm_ORG()
61 VLDR.F32 s0,[r1,#0] // Continuation of p1 in MTX34MultAsm_ORG()
72 VLDR.F32 s4,[r1,#4] // Continuation of p1 in MTX34MultAsm_ORG()
86 VLDR.F32 s1,[r1,#8] // Continuation of p1 in MTX34MultAsm_ORG()
92 VLDR.F32 s5,[r1,#12] // Continuation of p1 in MTX34MultAsm_ORG()
123 VLDR.F32 s3,[r1,#4*4*0+4*3] // Matrix p1[0][3] in MTX34MultAsm()
124 VLDR.F32 s7,[r1,#4*4*1+4*3] // Matrix p1[1][3] in MTX34MultAsm()
[all …]
Dmath_Matrix33.cpp39 VLDMIA r1!,{s0-s4} // Segment and load to shorten stall times due to data hazards in MTX33CopyAsm()
41 VLDMIA r1,{s5-s8} in MTX33CopyAsm()
51 VLDMIA r1!,{s10-s15} // Matrix p1 is put into the [S16-S23] registers in MTX33MAddAsm()
57 VLDMIA r1,{s10-s12} // Continuation of p1 in MTX33MAddAsm()
75 VLDMIA r1,{s0-s8} // First line of matrix pM to register [S0-S2] in VEC3TransformAsm()
Dmath_Matrix43.cpp37 CMP r1,r0 // Are p and pOut the same? in MTX43CopyAsm()
39 VLDMIA r1,{s0-s11} // All p are put in the [S0-S11] registers in MTX43CopyAsm()
50 VLDMIA r1!,{s12-s19} // Matrix p1 is put into the [S12-S19] registers in MTX43AddAsm()
56 VLDMIA r1,{s12-s15} // Continuation of p1 in MTX43AddAsm()
83 VLDMIA r1,{s12-s23} // The entire matrix p1 is put into the [S12-S23] registers in MTX43MultAsm()
146 VLDMIA r1,{s1-s12} // Matrix p is put into the [S1-S12] registers in MTX43MultAsm()
Dmath_Quaternion.cpp35 VLDMIA r1,{s4-s7} // All q1 vectors are put in the [S4-S7] registers in QUATMultAsm()
/CTR-SDK-2.4.0/include/nn/math/ARMv6/inline/
Dmath_Matrix33.ipp35 ADD r1,r1,r3
40 VLDMIA r1,{s0-s2} // First line of matrix p1 to registers [S0-S2]
41 ADD r1,r1,r3
44 VLDMIA r1,{s3-s5} // Second line of matrix p1 to registers [S3-S5]
45 ADD r1,r1,r3
48 VLDMIA r1,{s6-s8} // Third line of matrix p1 to registers [S6-S8]
88 ADD r1,r0,r3
89 VSTMIA r1,{s21-s23} // Store result
91 ADD r1,r1,r3
92 VSTMIA r1,{s24-s26} // Store result
[all …]
/CTR-SDK-2.4.0/sources/libraries/fnd/ARMv6/
Dfnd_Interlocked.cpp34 cmp r3, r1 // Compares r3 to value. in CompareAndSwap()
43 mov r0, r1 // Return value is comp because comparison succeeded in CompareAndSwap()
59 strex r3, r1, [r0] // Writes the value value to *pTarget in Swap()
106 add r2, r2, r1 // Adds value to r2 in Add()
122 sub r2, r2, r1 // Subtracts value from r2 in Substract()
138 orr r2, r2, r1 // OR of r2 and value in BitwiseOr()
154 and r2, r2, r1 // AND of r2 and value in BitwiseAnd()
170 eor r2, r2, r1 // XOR of r2 and value in BitwiseXor()
/CTR-SDK-2.4.0/sources/libraries/os/
Dos_Synchronization.cpp58 bics r3, r1, #1 in WaitMultipleImplWithAlloca()
59 addne r1, r1, #1 // Add 1 if r1 is odd (for 8-byte alignment) in WaitMultipleImplWithAlloca()
61 mov r3, r1, LSL #2 in WaitMultipleImplWithAlloca()
64 mov r1, sp in WaitMultipleImplWithAlloca()
Dos_ContinuationIterator.cpp38 stmia r1, {r4-r11,sp,lr} in ChangeContext()
46 ldmia r1, {r4-r11,sp,pc} in ChangeContext()
Dos_DeliverArg.cpp37 u16 r1; in CalcCRC16withIv() local
44 r1 = crc16_table[total & 0xf]; in CalcCRC16withIv()
46 total = total ^ r1 ^ crc16_table[*data & 0xf]; in CalcCRC16withIv()
49 r1 = crc16_table[total & 0xf]; in CalcCRC16withIv()
51 total = total ^ r1 ^ crc16_table[(*data >> 4) & 0xf]; in CalcCRC16withIv()
Dos_Default.cpp130 bx r1 in InvokeOnOtherStack()
Dos_Thread.cpp161 mov r1, r0 // Set pStackBottom to the first argument in CallDestructorAndExit()
/CTR-SDK-2.4.0/sources/libraries/crt0/MPCore/
Dcrt0.cpp96 ldr r1, =__cpp(Image$$ZI$$ZI$$Limit) in nninitRegion()
99 cmp r0, r1 in nninitRegion()
/CTR-SDK-2.4.0/sources/libraries/gr/CTR/
Dgr_Utility.cpp41 VLDMIA r1!,{s0-s11} in CopyMtx34WithHeader()
65 VLDMIA r1!,{s0-s15} in CopyMtx44WithHeader()