Lines Matching refs:r1
36 VLDMIA r1!,{s16-s23} // Matrix p1 is put into the [S16-S23] registers in MTX44AddAsm()
43 VLDMIA r1!,{s16-s19} // Continuation of p1 in MTX44AddAsm()
50 VLDMIA r1!,{s20-s23} // Continuation of p1 in MTX44AddAsm()
71 CMP r1,r0 // Are p and pOut the same? in MTX44CopyAsm()
73 VLDMIA r1,{s0-s15} // All p are put in the [S0-S15] registers in MTX44CopyAsm()
84 VLDR.F32 s24,[r1,#16*0+0*4] // p1[0][0] in MTX44MultAsm()
85 VLDR.F32 s25,[r1,#16*1+0*4] // p1[1][0] in MTX44MultAsm()
91 VLDR.F32 s24,[r1,#16*2+0*4] // p1[2][0] in MTX44MultAsm()
97 VLDR.F32 s25,[r1,#16*3+0*4] // p1[3][0] in MTX44MultAsm()
103 VLDR.F32 s24,[r1,#16*0+1*4] // p1[0][1] in MTX44MultAsm()
109 VLDR.F32 s25,[r1,#16*1+1*4] // p1[1][1] in MTX44MultAsm()
117 VLDR.F32 s24,[r1,#16*2+1*4] // p1[2][1] in MTX44MultAsm()
123 VLDR.F32 s25,[r1,#16*3+1*4] // p1[3][1] in MTX44MultAsm()
129 VLDR.F32 s24,[r1,#16*0+2*4] // p1[0][2] in MTX44MultAsm()
135 VLDR.F32 s25,[r1,#16*1+2*4] // p1[1][2] in MTX44MultAsm()
143 VLDR.F32 s24,[r1,#16*2+2*4] // p1[2][2] in MTX44MultAsm()
149 VLDR.F32 s25,[r1,#16*3+2*4] // p1[3][2] in MTX44MultAsm()
155 VLDR.F32 s24,[r1,#16*0+3*4] // p1[0][3] in MTX44MultAsm()
161 VLDR.F32 s25,[r1,#16*1+3*4] // p1[1][3] in MTX44MultAsm()
167 VLDR.F32 s24,[r1,#16*2+3*4] // p1[2][3] in MTX44MultAsm()
173 VLDR.F32 s25,[r1,#16*3+3*4] // p1[3][3] in MTX44MultAsm()
195 VLDMIA r1!,{s16} // Matrix p is put into the [S2-S17] registers in MTX44MultAsm()
196 VLDMIA r1,{s1-s15} // Matrix p is put into the [S2-S17] registers in MTX44MultAsm()
226 VLDMIA r1,{s0-s11} // Matrix p is put into the [S0-S11] registers in MTX44MultScaleAsm()
249 VLDMIA r1,{s12-s14} // VEC3 is put into the [S12-S14] registers in MTX44MultScaleAsm()
274 VLDMIA r1,{s12-s14} // All vectors are put in the [S12-S14] registers in MTX44MultTranslateAsm()
287 VLDMIA r1!,{s0-s11} // Matrix pM is put into the [S0-S11] registers in MTX44MultTranslateAsm()
302 VLDMIA r1!,{s12-s15} // Matrix pM is put into the [S12-S15] registers in MTX44MultTranslateAsm()
312 VLDR.F32 s0,[r1,#0*16+0*4] in MTX44TransposeAsm()
313 VLDR.F32 s1,[r1,#1*16+0*4] in MTX44TransposeAsm()
314 VLDR.F32 s2,[r1,#2*16+0*4] in MTX44TransposeAsm()
315 VLDR.F32 s3,[r1,#3*16+0*4] in MTX44TransposeAsm()
316 VLDR.F32 s4,[r1,#0*16+1*4] in MTX44TransposeAsm()
317 VLDR.F32 s5,[r1,#1*16+1*4] in MTX44TransposeAsm()
318 VLDR.F32 s6,[r1,#2*16+1*4] in MTX44TransposeAsm()
319 VLDR.F32 s7,[r1,#3*16+1*4] in MTX44TransposeAsm()
320 VLDR.F32 s8,[r1,#0*16+2*4] in MTX44TransposeAsm()
321 VLDR.F32 s9,[r1,#1*16+2*4] in MTX44TransposeAsm()
322 VLDR.F32 s10,[r1,#2*16+2*4] in MTX44TransposeAsm()
323 VLDR.F32 s11,[r1,#3*16+2*4] in MTX44TransposeAsm()
324 VLDR.F32 s12,[r1,#0*16+3*4] in MTX44TransposeAsm()
325 VLDR.F32 s13,[r1,#1*16+3*4] in MTX44TransposeAsm()
326 VLDR.F32 s14,[r1,#2*16+3*4] in MTX44TransposeAsm()
327 VLDR.F32 s15,[r1,#3*16+3*4] in MTX44TransposeAsm()
338 VLDMIA r1,{s0-s15} // The entire pM matrix is put in the [S0-S15] registers in VEC3TransformAsm()