1 /*---------------------------------------------------------------------------*
2 Project: TwlSDK - inlucde - SCFG
3 File: scfg.h
4
5 Copyright 2007-2008 Nintendo. All rights reserved.
6
7 These coded instructions, statements, and computer programs contain
8 proprietary information of Nintendo of America Inc. and/or Nintendo
9 Company Ltd., and are protected by Federal copyright law. They may
10 not be disclosed to third parties or copied or duplicated in any form,
11 in whole or in part, without the prior written consent of Nintendo.
12
13 $Date:: 2008-10-08#$
14 $Rev: 8902 $
15 $Author: yada $
16 *---------------------------------------------------------------------------*/
17 #ifndef TWL_COMMON_SCFG_H_
18 #define TWL_COMMON_SCFG_H_
19
20 #include <twl/misc.h>
21 #include <twl/types.h>
22
23 #include <nitro/os/common/system.h>
24 #include <twl/hw/common/mmap_wramEnv.h>
25 #include <twl/hw/common/mmap_shared.h>
26 #ifdef SDK_ARM9
27 #include <twl/hw/ARM9/ioreg.h>
28 #else // SDK_ARM7
29 #include <twl/hw/ARM7/ioreg.h>
30 #endif
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 //--------------------------------------------------------------------------------
36 //---------------- register SCFG_ROM
37 //---- SystemROM select
38 // (written as ARM9, but ARM7 is compatible ARM9)
39 typedef enum
40 {
41 SCFG_SYSTEM_ROM_FOR_TWL = (0 << REG_SCFG_A9ROM_RSEL_SHIFT),
42 SCFG_SYSTEM_ROM_FOR_NITRO = (1 << REG_SCFG_A9ROM_RSEL_SHIFT)
43 } SCFGSystemRomType;
44
45 #define SCFG_SYSTEM_ROM_MASK (REG_SCFG_A9ROM_RSEL_MASK)
46
47 //---- SecureROM cut-off flag
48 // (written as ARM9, but ARM7 is compatible ARM9)
49 typedef enum
50 {
51 SCFG_SECURE_ROM_ACCESSIBLE = (0 << REG_SCFG_A9ROM_SEC_SHIFT),
52 SCFG_SECURE_ROM_INACCESSIBLE = (1 << REG_SCFG_A9ROM_SEC_SHIFT)
53 } SCFGSecureRomAccessible;
54
55 #define SCFG_SECURE_ROM_ACCESSIBLE_MASK (REG_SCFG_A9ROM_SEC_MASK)
56
57 //---------------- register SCFG_CLK
58 #define SCFG_CLOCK_SUPPLY_WRAM (REG_SCFG_CLK_WRAMHCLK_MASK)
59 #ifdef SDK_ARM9
60 #define SCFG_CAMERA_CKI_FLAG (REG_SCFG_CLK_CAMCKI_MASK)
61 #define SCFG_CLOCK_SUPPLY_CAMERA (REG_SCFG_CLK_CAMHCLK_MASK)
62 #define SCFG_CLOCK_SUPPLY_DSP (REG_SCFG_CLK_DSPHCLK_MASK)
63
64 typedef enum
65 {
66 SCFG_CPU_SPEED_1X = (0 << REG_SCFG_CLK_CPUSPD_SHIFT),
67 SCFG_CPU_SPEED_2X = (1 << REG_SCFG_CLK_CPUSPD_SHIFT)
68 } SCFGCpuSpeed;
69
70 #define SCFG_CPU_SPEED_MASK (REG_SCFG_CLK_CPUSPD_MASK)
71 #endif
72
73 //---------------- register SCFG_RST
74 #ifdef SDK_ARM9
75 #define SCFG_DSP_RESET_SET (0 << REG_SCFG_RST_DSPRSTB_SHIFT)
76 #define SCFG_DSP_RESET_RELEASE (1 << REG_SCFG_RST_DSPRSTB_SHIFT)
77 #define SCFG_DSP_RESET_MASK (REG_SCFG_RST_DSPRSTB_MASK)
78 #endif
79
80 //---------------- register SCFG_EXT
81 #define SCFG_CONFIG_ENABLE (1 << REG_SCFG_EXT_CFG_SHIFT)
82 #define SCFG_CONFIG_DISABLE (0 << REG_SCFG_EXT_CFG_SHIFT)
83 #define SCFG_CONFIG_ENABLE_MASK (REG_SCFG_EXT_CFG_MASK)
84
85 #define SCFG_WRAM_ACCESS (1 << REG_SCFG_EXT_WRAM_SHIFT) // read only in ARM9
86
87 #ifdef SDK_ARM9
88 #define SCFG_DSP_ACCESS (1 << REG_SCFG_EXT_DSP_SHIFT)
89 #define SCFG_CAMERA_ACCESS (1 << REG_SCFG_EXT_CAM_SHIFT)
90 #define SCFG_NDMA_ACCESS (1 << REG_SCFG_EXT_DMAC_SHIFT)
91 #endif
92
93 #define SCFG_EXPANDED_VRAM (1 << REG_SCFG_EXT_VRAM_SHIFT)
94 #define SCFG_EXPANDED_LCDC (1 << REG_SCFG_EXT_LCDC_SHIFT)
95 #define SCFG_EXPANDED_INTC (1 << REG_SCFG_EXT_INTC_SHIFT)
96
97 typedef enum
98 {
99 SCFG_PSRAM_BOUNDARY_4MB = (0 << REG_SCFG_EXT_PSRAM_SHIFT),
100 SCFG_PSRAM_BOUNDARY_4MB_2 = (1 << REG_SCFG_EXT_PSRAM_SHIFT), // treated as 4MB
101 SCFG_PSRAM_BOUNDARY_16MB = (2 << REG_SCFG_EXT_PSRAM_SHIFT),
102 SCFG_PSRAM_BOUNDARY_32MB = (3 << REG_SCFG_EXT_PSRAM_SHIFT)
103 } SCFGPsramBoundary;
104
105 #define SCFG_PSRAM_BOUNDARY_MASK (REG_SCFG_EXT_PSRAM_MASK)
106
107
108 #define SCFG_FIXED_CARD (1 << REG_SCFG_EXT_MC_SHIFT)
109 #ifdef SDK_ARM9
110 #define SCFG_FIXED_DIVIDER (1 << REG_SCFG_EXT_DIV_SHIFT)
111 #define SCFG_FIXED_2DENGINE (1 << REG_SCFG_EXT_G2DE_SHIFT)
112 #define SCFG_FIXED_RENDERER (1 << REG_SCFG_EXT_REN_SHIFT)
113 #define SCFG_FIXED_GEOMETRY (1 << REG_SCFG_EXT_GEO_SHIFT)
114 #endif
115 #define SCFG_FIXED_DMAC (1 << REG_SCFG_EXT_DMA_SHIFT)
116
117
118 typedef enum
119 {
120 SCFG_CARD_DETECT_MODE_0 = 0,
121 SCFG_CARD_DETECT_MODE_1 = 1,
122 SCFG_CARD_DETECT_MODE_2 = 2,
123 SCFG_CARD_DETECT_MODE_3 = 3
124 } SCFGCardDetectMode;
125
126 #define SCFG_CARD_DETECT_MODE_MASK 3
127
128
129 typedef enum
130 {
131 SCFG_CARD_DETECT_CHATTERING_LOW = 0,
132 SCFG_CARD_DETECT_CHATTERING_HIGH = 1
133 } SCFGCardDetectChattering;
134
135 #define SCFG_CARD_DETECT_CHATTERING_MASK 1
136
137 //---------------- register SCFG_OP
138 #define SCFG_OP_PRODUCT 0
139 #define SCFG_OP_A9_A7_DEV 1
140 #define SCFG_OP_A9_DEV 2
141 #define SCFG_OP_PROM 3
142
143
144 #define SCFGi_CHANGEBIT_8( addr, flag, eval, orval ) \
145 do { *(u8*)(addr) = (u8)( ((*(u8*)(addr)) & (0xff ^ (flag))) | ((eval)? (flag): 0) | orval ); } while(0)
146
147 #define SCFGi_CHANGEBIT_16( addr, flag, eval, orval ) \
148 do { *(u16*)(addr) = (u16)( ((*(u16*)(addr)) & (0xffff ^ (flag))) | ((eval)? (flag): 0) | orval ); } while(0)
149
150 #define SCFGi_CHANGEBIT_32( addr, flag, eval, orval ) \
151 do { *(u32*)(addr) = (u32)( ((*(u32*)(addr)) & (0xffffffff ^ (flag))) | ((eval)? (flag): 0) | orval ); } while(0)
152
153 #define SCFGi_CLEARBIT_8( addr, flag ) SCFGi_CHANGEBIT_8( (addr), (flag), 0, 0 )
154 #define SCFGi_CLEARBIT_16( addr, flag ) SCFGi_CHANGEBIT_16( (addr), (flag), 0, 0 )
155 #define SCFGi_CLEARBIT_32( addr, flag ) SCFGi_CHANGEBIT_32( (addr), (flag), 0, 0 )
156
157
158 //================================================================================
159 // for PXI system
160 //================================================================================
161 //---- PXI command field
162 #define SCFG_PXI_COMMAND_MASK 0x03f00000
163 #define SCFG_PXI_COMMAND_SHIFT 20
164 #define SCFG_PXI_ORDINAL_MASK 0x000f0000
165 #define SCFG_PXI_ORDINAL_SHIFT 16
166 #define SCFG_PXI_DATA_MASK 0x0000ffff
167 #define SCFG_PXI_DATA_SHIFT 0
168
169 typedef enum {
170 SCFGi_PXI_COMMAND_READ = 1,
171 SCFGi_PXI_COMMAND_READ_OP = 2
172 }
173 SCFGPxiCommand;
174
175 typedef void (*SCFGCallback)( u64, void* );
176
177
178 #ifdef SDK_ARM9
179 //================================================================================
180 // for register SCFG_ROM
181 //================================================================================
182 /*---------------------------------------------------------------------------*
183 Name: SCFG_GetSystemRomType
184
185 Description: get ARM9 System ROM type
186
187 Arguments: None
188
189 Returns: SCFG_SYSTEM_ROM_FOR_TWL : use TWL-CPU 64KB ROM
190 SCFG_SYSTEM_ROM_FOR_NITRO : use NITRO-CPU 8KB ROM
191 *---------------------------------------------------------------------------*/
SCFG_GetSystemRomType(void)192 static inline SCFGSystemRomType SCFG_GetSystemRomType(void)
193 {
194 return (*(u32*)(HW_SYS_CONF_BUF + HWi_WSYS08_OFFSET) & HWi_WSYS08_ROM_ARM9RSEL_MASK)? SCFG_SYSTEM_ROM_FOR_NITRO: SCFG_SYSTEM_ROM_FOR_TWL;
195 }
196 //- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
197 #define SCFG_GetSystemRomType_ARM9() SCFG_GetSystemRomType()
198
199 /*---------------------------------------------------------------------------*
200 Name: SCFG_IsSecureRomAccessible
201
202 Description: check if the ARM9 secure ROM is accessible from AHB
203
204 Arguments: None
205
206 Returns: TRUE : accessible
207 FALSE : inaccessible
208 *---------------------------------------------------------------------------*/
SCFG_IsSecureRomAccessible(void)209 static inline BOOL SCFG_IsSecureRomAccessible(void)
210 {
211 return (*(u32*)(HW_SYS_CONF_BUF + HWi_WSYS08_OFFSET) & HWi_WSYS08_ROM_ARM9SEC_MASK)? FALSE: TRUE;
212 }
213 //- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
214 #define SCFG_IsSecureRomAccessible_ARM9() SCFG_IsSecureRomAccessible()
215
216 //================================================================================
217 // for register SCFG_CLK
218 //================================================================================
219 /*---------------------------------------------------------------------------*
220 Name: SCFG_SetCameraCKIClock
221
222 Description: set CAM_CKI clock for camera
223
224 Arguments: sw : TRUE : CAM_CKI enable (output 16.76MHz)
225 FALSE : CAM_CKI disable (output low level)
226
227 Returns: None
228 *---------------------------------------------------------------------------*/
SCFG_SetCameraCKIClock(BOOL sw)229 static inline void SCFG_SetCameraCKIClock( BOOL sw )
230 {
231 SCFGi_CHANGEBIT_16( ®_SCFG_CLK, SCFG_CAMERA_CKI_FLAG, sw, 0 );
232 }
233
234 /*---------------------------------------------------------------------------*
235 Name: SCFG_IsCameraCKIClockEnable
236
237 Description: check if CAM_CKI clock for camera is enable status
238
239 Arguments: None
240
241 Returns: TRUE : enable
242 FALSE : disable
243 *---------------------------------------------------------------------------*/
SCFG_IsCameraCKIClockEnable(void)244 static inline BOOL SCFG_IsCameraCKIClockEnable(void)
245 {
246 return (BOOL)((reg_SCFG_CLK & SCFG_CAMERA_CKI_FLAG)? TRUE: FALSE);
247 }
248
249 /*---------------------------------------------------------------------------*
250 Name: SCFG_IsClockSuppliedToWram
251
252 Description: check if clock to the new shared WRAM block is supplied
253
254 Arguments: None
255
256 Returns: TRUE : clock is supplied
257 FALSE : clock is stopped
258 *---------------------------------------------------------------------------*/
SCFG_IsClockSuppliedToWram(void)259 static inline BOOL SCFG_IsClockSuppliedToWram(void)
260 {
261 return (BOOL)((reg_SCFG_CLK & SCFG_CLOCK_SUPPLY_WRAM)? TRUE: FALSE);
262 }
263
264 /*---------------------------------------------------------------------------*
265 Name: SCFG_SupplyClockToCamera
266
267 Description: control to supply clock to the CAMERA I/F block
268
269 Arguments: TRUE : supply clock
270 FALSE : stop clock
271
272 Returns: None
273 *---------------------------------------------------------------------------*/
SCFG_SupplyClockToCamera(BOOL sw)274 static inline void SCFG_SupplyClockToCamera( BOOL sw )
275 {
276 SCFGi_CHANGEBIT_16( ®_SCFG_CLK, SCFG_CLOCK_SUPPLY_CAMERA, sw, 0 );
277 }
278
279 /*---------------------------------------------------------------------------*
280 Name: SCFG_IsClockSuppliedToCamera
281
282 Description: check if clock to the CAMERA I/F block is supplied
283
284 Arguments: None
285
286 Returns: TRUE : clock is supplied
287 FALSE : clock is stopped
288 *---------------------------------------------------------------------------*/
SCFG_IsClockSuppliedToCamera(void)289 static inline BOOL SCFG_IsClockSuppliedToCamera(void)
290 {
291 return (BOOL)((reg_SCFG_CLK & SCFG_CLOCK_SUPPLY_CAMERA)? TRUE: FALSE);
292 }
293
294 /*---------------------------------------------------------------------------*
295 Name: SCFG_SupplyClockToDSP
296
297 Description: control to supply clock to the DSP block
298
299 Arguments: TRUE : supply clockenable
300 FALSE : stop clock
301
302 Returns: None
303 *---------------------------------------------------------------------------*/
SCFG_SupplyClockToDSP(BOOL sw)304 static inline void SCFG_SupplyClockToDSP( BOOL sw )
305 {
306 SCFGi_CHANGEBIT_16( ®_SCFG_CLK, SCFG_CLOCK_SUPPLY_DSP, sw, 0 );
307 }
308
309 /*---------------------------------------------------------------------------*
310 Name: SCFG_IsClockSuppliedToDSP
311
312 Description: check if clock to DSP block is supplied
313
314 Arguments: None
315
316 Returns: TRUE : clock is supplied
317 FALSE : clock is stopped
318 *---------------------------------------------------------------------------*/
SCFG_IsClockSuppliedToDSP(void)319 static inline BOOL SCFG_IsClockSuppliedToDSP(void)
320 {
321 return (BOOL)((reg_SCFG_CLK & SCFG_CLOCK_SUPPLY_DSP)? TRUE: FALSE);
322 }
323
324 /*---------------------------------------------------------------------------*
325 Name: SCFG_SetCpuSpeed
326
327 Description: set ARM9 CPU speed
328
329 Arguments: cpuSpeed : SCFG_CPU_SPEED_1X : same as NITRO (67.03MHz)
330 SCFG_CPU_SPEED_2X : doubled against NITRO (134.06MHz)
331 Returns: None
332 *---------------------------------------------------------------------------*/
333 void SCFG_SetCpuSpeed( SCFGCpuSpeed cpuSpeed );
334
335 /*---------------------------------------------------------------------------*
336 Name: SCFG_GetCpuSpeed
337
338 Description: get ARM9 CPU speed
339
340 Arguments: None
341
342 Returns: SCFG_CPU_SPEED_1X : same as NITRO (67.03MHz)
343 SCFG_CPU_SPEED_2X : doubled against NITRO (134.06MHz)
344 *---------------------------------------------------------------------------*/
SCFG_GetCpuSpeed(void)345 static inline SCFGCpuSpeed SCFG_GetCpuSpeed(void)
346 {
347 return (SCFGCpuSpeed)(reg_SCFG_CLK & SCFG_CPU_SPEED_MASK);
348 }
349
350 //================================================================================
351 // for register SCFG_RST
352 //================================================================================
353 /*---------------------------------------------------------------------------*
354 Name: SCFGi_SendResetToDSP
355
356 Description: do reset to DSP block
357
358 Arguments: sw: TRUE : do reset
359 FALSE : release reset
360
361 Returns: None
362 *---------------------------------------------------------------------------*/
SCFGi_SendResetToDSP(BOOL sw)363 static inline void SCFGi_SendResetToDSP( BOOL sw )
364 {
365 SCFGi_CHANGEBIT_16( ®_SCFG_RST, SCFG_DSP_RESET_MASK, sw, 0 );
366 }
367
368 /*---------------------------------------------------------------------------*
369 Name: SCFG_ResetDSP
370
371 Description: do reset to DSP block
372
373 Arguments: None
374
375 Returns: None
376 *---------------------------------------------------------------------------*/
SCFG_ResetDSP(void)377 static inline void SCFG_ResetDSP( void )
378 {
379 SCFGi_SendResetToDSP( FALSE );
380 }
381
382 /*---------------------------------------------------------------------------*
383 Name: SCFG_ReleaseResetDSP
384
385 Description: release to reset to DSP block
386
387 Arguments: None
388
389 Returns: None
390 *---------------------------------------------------------------------------*/
SCFG_ReleaseResetDSP(void)391 static inline void SCFG_ReleaseResetDSP( void )
392 {
393 SCFGi_SendResetToDSP( TRUE );
394 }
395
396 /*---------------------------------------------------------------------------*
397 Name: SCFG_IsDSPReset
398
399 Description: check if reset status to DSP block
400
401 Arguments: None
402
403 Returns: TRUE : reset
404 FALSE : released
405 *---------------------------------------------------------------------------*/
SCFG_IsDSPReset(void)406 static inline BOOL SCFG_IsDSPReset(void)
407 {
408 return (BOOL)((reg_SCFG_RST & SCFG_DSP_RESET_MASK)? FALSE: TRUE);
409 }
410
411 //================================================================================
412 // for register SCFG_EXT
413 //================================================================================
414 /*---------------------------------------------------------------------------*
415 Name: SCFG_SetConfigBlockInaccessible
416
417 Description: (for ARM9)
418 cut off ARM9 configure block to be inaccessible from CPU
419 (for ARM7)
420 cut off ARM7 configure block to be inaccessible from CPU
421
422 Arguments: None
423
424 Returns: None
425 *---------------------------------------------------------------------------*/
SCFG_SetConfigBlockInaccessible(void)426 static inline void SCFG_SetConfigBlockInaccessible(void)
427 {
428 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_CONFIG_ENABLE_MASK, 0, SCFG_CONFIG_DISABLE );
429 }
430
431 /*---------------------------------------------------------------------------*
432 Name: SCFG_IsConfigBlockAccessible
433
434 Description: (for ARM9)
435 check if ARM9 configure block is accessible from CPU
436 (for ARM7)
437 check if ARM7 configure block is accessible from CPU
438
439 Arguments: None
440
441 Returns: TRUE : accessible
442 FALSE : inaccessible
443 *---------------------------------------------------------------------------*/
SCFG_IsConfigBlockAccessible(void)444 static inline BOOL SCFG_IsConfigBlockAccessible(void)
445 {
446 return (BOOL)((reg_SCFG_EXT & SCFG_CONFIG_ENABLE_MASK)? TRUE: FALSE);
447 }
448
449 /*---------------------------------------------------------------------------*
450 Name: SCFG_IsWramAccessible
451
452 Description: check if shared WRAM_A,B,C is accessible
453
454 Arguments: None
455
456 Returns: TRUE : accesssable from the bus which is specified
457 in another register
458 FALSE : inaccessible from any bus
459 *---------------------------------------------------------------------------*/
SCFG_IsWramAccessible(void)460 static inline BOOL SCFG_IsWramAccessible(void)
461 {
462 return (BOOL)((reg_SCFG_EXT & SCFG_WRAM_ACCESS)? TRUE: FALSE);
463 }
464
465 #define SCFG_IsWRAMAccessible SCFG_IsWramAccessible
466
467 /*---------------------------------------------------------------------------*
468 Name: SCFG_SetDSPAccessible
469
470 Description: set DSP block to be accessible
471
472 Arguments: sw : TRUE : set to be accessible
473 FALSE : set to be inaccessible
474
475 Returns: None
476 *---------------------------------------------------------------------------*/
SCFG_SetDSPAccessible(BOOL sw)477 static inline void SCFG_SetDSPAccessible( BOOL sw )
478 {
479 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_DSP_ACCESS, sw, 0 );
480 }
481 /*---------------------------------------------------------------------------*
482 Name: SCFG_IsDSPccessible
483
484 Description: check if DSP block is accessible
485
486 Arguments: None
487
488 Returns: TRUE : accesssable from AHB
489 FALSE : inaccessible
490 *---------------------------------------------------------------------------*/
SCFG_IsDSPAccessible(void)491 static inline BOOL SCFG_IsDSPAccessible(void)
492 {
493 return (BOOL)((reg_SCFG_EXT & SCFG_DSP_ACCESS)? TRUE: FALSE);
494 }
495 /*---------------------------------------------------------------------------*
496 Name: SCFG_SetCameraAccessible
497
498 Description: set Camera block to be accessible
499
500 Arguments: sw : TRUE : set to be accessible
501 FALSE : set to be inaccessible
502
503 Returns: None
504 *---------------------------------------------------------------------------*/
SCFG_SetCameraAccessible(BOOL sw)505 static inline void SCFG_SetCameraAccessible( BOOL sw )
506 {
507 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_CAMERA_ACCESS, sw, 0 );
508 }
509 /*---------------------------------------------------------------------------*
510 Name: SCFG_IsCameraAccessible
511
512 Description: check if Camera I/F block is accesible
513
514 Arguments: None
515
516 Returns: TRUE : accesssable from AHB
517 FALSE : inaccessible
518 *---------------------------------------------------------------------------*/
SCFG_IsCameraAccessible(void)519 static inline BOOL SCFG_IsCameraAccessible(void)
520 {
521 return (BOOL)((reg_SCFG_EXT & SCFG_CAMERA_ACCESS)? TRUE: FALSE);
522 }
523 /*---------------------------------------------------------------------------*
524 Name: SCFG_SetNDmaAccessible
525
526 Description: set new DMA block to be accessible
527
528 Arguments: sw : TRUE : set to be accessible
529 FALSE : set to be inaccessible
530
531 Returns: None
532 *---------------------------------------------------------------------------*/
SCFG_SetNDmaAccessible(BOOL sw)533 static inline void SCFG_SetNDmaAccessible( BOOL sw )
534 {
535 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_NDMA_ACCESS, sw, 0 );
536 }
537 /*---------------------------------------------------------------------------*
538 Name: SCFG_IsNDmaAccessible
539
540 Description: check if new DMA block is accessible
541
542 Arguments: None
543
544 Returns: TRUE : accesssable from AHB
545 FALSE : inaccessible
546 *---------------------------------------------------------------------------*/
SCFG_IsNDmaAccessible(void)547 static inline BOOL SCFG_IsNDmaAccessible(void)
548 {
549 return (BOOL)((reg_SCFG_EXT & SCFG_NDMA_ACCESS)? TRUE: FALSE);
550 }
551
552 /*---------------------------------------------------------------------------*
553 Name: SCFG_SetIntcExpanded
554
555 Description: set ARM9 INTC circuit to be expanded
556
557 Arguments: sw : TRUE : expand circuit
558 FALSE : not expand (same as Nitro CPU)
559
560 Returns: None
561 *---------------------------------------------------------------------------*/
SCFG_SetIntcExpanded(BOOL sw)562 static inline void SCFG_SetIntcExpanded( BOOL sw )
563 {
564 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_EXPANDED_INTC, sw, 0 );
565 }
566 /*---------------------------------------------------------------------------*
567 Name: SCFG_IsIntcExpanded
568
569 Description: check if ARM9 INTC circuit is expanded
570
571 Arguments: None
572
573 Returns: TRUE : expanded
574 FALSE : not expanded (same as Nitro CPU)
575 *---------------------------------------------------------------------------*/
SCFG_IsIntcExpanded(void)576 static inline BOOL SCFG_IsIntcExpanded(void)
577 {
578 return (BOOL)((reg_SCFG_EXT & SCFG_EXPANDED_INTC)? TRUE: FALSE);
579 }
580
581 /*---------------------------------------------------------------------------*
582 Name: SCFG_SetLCDCExpanded
583
584 Description: set LCDC circuit to be expanded
585
586 Arguments: sw : TRUE : expand circuit
587 FALSE : not expand (same as Nitro CPU)
588
589 Returns: None
590 *---------------------------------------------------------------------------*/
SCFG_SetLCDCExpanded(BOOL sw)591 static inline void SCFG_SetLCDCExpanded( BOOL sw )
592 {
593 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_EXPANDED_LCDC, sw, 0 );
594
595 //---- changed SCFG data in shared area
596 SCFGi_CHANGEBIT_32( HW_SYS_CONF_BUF + HWi_WSYS04_OFFSET, HWi_WSYS04_EXT_LCDC_MASK, sw, 0 );
597 }
598 /*---------------------------------------------------------------------------*
599 Name: SCFG_IsLCDCExpanded
600
601 Description: check if LCDC circuit is expanded
602
603 Arguments: None
604
605 Returns: TRUE : expanded
606 FALSE : not expanded (same as Nitro CPU)
607 *---------------------------------------------------------------------------*/
SCFG_IsLCDCExpanded(void)608 static inline BOOL SCFG_IsLCDCExpanded(void)
609 {
610 return (BOOL)((reg_SCFG_EXT & SCFG_EXPANDED_LCDC)? TRUE: FALSE);
611 }
612
613 /*---------------------------------------------------------------------------*
614 Name: SCFG_SetVramExpanded
615
616 Description: set VRAM access to be expanded
617
618 Arguments: sw : TRUE : expand circuit
619 FALSE : not expand (same as Nitro CPU)
620
621 Returns: None
622 *---------------------------------------------------------------------------*/
SCFG_SetVramExpanded(BOOL sw)623 static inline void SCFG_SetVramExpanded( BOOL sw )
624 {
625 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_EXPANDED_VRAM, sw, 0 );
626
627 //---- changed SCFG data in shared area
628 SCFGi_CHANGEBIT_32( HW_SYS_CONF_BUF + HWi_WSYS04_OFFSET, HWi_WSYS04_EXT_VRAM_MASK, sw, 0 );
629 }
630
631 #define SCFG_SetVRAMExpanded SCFG_SetVramExpanded
632
633 /*---------------------------------------------------------------------------*
634 Name: SCFG_IsVRamExpanded
635
636 Description: check if VRAM access is expanded
637
638 Arguments: None
639
640 Returns: TRUE : expanded
641 FALSE : not expanded (same as Nitro CPU)
642 *---------------------------------------------------------------------------*/
SCFG_IsVramExpanded(void)643 static inline BOOL SCFG_IsVramExpanded(void)
644 {
645 return (BOOL)((reg_SCFG_EXT & SCFG_EXPANDED_VRAM)? TRUE: FALSE);
646 }
647
648 #define SCFG_IsVRAMExpanded SCFG_IsVramExpanded
649
650 /*---------------------------------------------------------------------------*
651 Name: SCFG_SetPsramBoundary
652
653 Description: set the boundary for PSRAM access
654
655 Arguments: boundary: SCFG_PSRAM_BOUNDARY_4MB : 4MB
656 SCFG_PSRAM_BOUNDARY_16MB : 16MB
657 SCFG_PSRAM_BOUNDARY_32MB : 32MB
658
659 Returns: None
660 *---------------------------------------------------------------------------*/
SCFG_SetPsramBoundary(SCFGPsramBoundary boundary)661 static inline void SCFG_SetPsramBoundary( SCFGPsramBoundary boundary )
662 {
663 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_PSRAM_BOUNDARY_MASK, 0, boundary );
664
665 //---- changed SCFG data in shared area
666 SCFGi_CHANGEBIT_32( HW_SYS_CONF_BUF + HWi_WSYS04_OFFSET, HWi_WSYS04_EXT_PSRAM_MASK, 0, boundary );
667 }
668
669 /*---------------------------------------------------------------------------*
670 Name: SCFG_GetPsramBoundary
671
672 Description: get the setting of the boundary for PSRAM access
673
674 Arguments: None
675
676 Returns: SCFG_PSRAM_BOUNDARY_4MB : 4MB
677 SCFG_PSRAM_BOUNDARY_16MB : 16MB
678 SCFG_PSRAM_BOUNDARY_32MB : 32MB
679 *---------------------------------------------------------------------------*/
SCFG_GetPsramBoundary(void)680 static inline SCFGPsramBoundary SCFG_GetPsramBoundary(void)
681 {
682 return (SCFGPsramBoundary)(reg_SCFG_EXT & SCFG_PSRAM_BOUNDARY_MASK);
683 }
684
685 /*---------------------------------------------------------------------------*
686 Name: SCFG_SetCardFixed
687
688 Description: set the Card I/F circuit to be fixed
689
690 Arguments: sw : TRUE : fixed circuit
691 FALSE : not fixed (same as Nitro CPU)
692
693 Returns: None
694 *---------------------------------------------------------------------------*/
SCFG_SetCardFixed(BOOL sw)695 static inline void SCFG_SetCardFixed( BOOL sw )
696 {
697 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_FIXED_CARD, sw, 0 );
698
699 //---- changed SCFG data in shared area
700 SCFGi_CHANGEBIT_32( HW_SYS_CONF_BUF + HWi_WSYS04_OFFSET, HWi_WSYS04_EXT_MC_MASK, sw, 0 );
701 }
702 /*---------------------------------------------------------------------------*
703 Name: SCFG_IsCardFixed
704
705 Description: Check if the Card I/F circuit is fixed.
706
707 Arguments: None
708
709 Returns: TRUE : fixed
710 FALSE : same as NITRO CPU
711 *---------------------------------------------------------------------------*/
SCFG_IsCardFixed(void)712 static inline BOOL SCFG_IsCardFixed(void)
713 {
714 return (BOOL)((reg_SCFG_EXT & SCFG_FIXED_CARD)? TRUE: FALSE);
715 }
716
717 /*---------------------------------------------------------------------------*
718 Name: SCFG_SetDividerFixed
719
720 Description: set the divider circuit to be fixed
721
722 Arguments: sw : TRUE : fixed circuit
723 FALSE : not fixed (same as Nitro CPU)
724
725 Returns: None
726 *---------------------------------------------------------------------------*/
SCFG_SetDividerFixed(BOOL sw)727 static inline void SCFG_SetDividerFixed( BOOL sw )
728 {
729 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_FIXED_DIVIDER, sw, 0 );
730 }
731 /*---------------------------------------------------------------------------*
732 Name: SCFG_IsDividerFixed
733
734 Description: Check if the divider circuit is fixed.
735
736 Arguments: None
737
738 Returns: TRUE : fixed
739 FALSE : same as NITRO CPU
740 *---------------------------------------------------------------------------*/
SCFG_IsDividerFixed(void)741 static inline BOOL SCFG_IsDividerFixed(void)
742 {
743 return (BOOL)((reg_SCFG_EXT & SCFG_FIXED_DIVIDER)? TRUE: FALSE);
744 }
745
746 /*---------------------------------------------------------------------------*
747 Name: SCFG_Set2DEngineFixed
748
749 Description: set the 2D graphic engine circuit to be fixed
750
751 Arguments: sw : TRUE : fixed circuit
752 FALSE : not fixed (same as Nitro CPU)
753
754 Returns: None
755 *---------------------------------------------------------------------------*/
SCFG_Set2DEngineFixed(BOOL sw)756 static inline void SCFG_Set2DEngineFixed( BOOL sw )
757 {
758 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_FIXED_2DENGINE, sw, 0 );
759 }
760 /*---------------------------------------------------------------------------*
761 Name: SCFG_Is2DEngineFixed
762
763 Description: Check if the 2D graphic engine circuit is fixed.
764
765 Arguments: None
766
767 Returns: TRUE : fixed
768 FALSE : same as NITRO CPU
769 *---------------------------------------------------------------------------*/
SCFG_Is2DEngineFixed(void)770 static inline BOOL SCFG_Is2DEngineFixed(void)
771 {
772 return (BOOL)((reg_SCFG_EXT & SCFG_FIXED_2DENGINE)? TRUE: FALSE);
773 }
774
775 /*---------------------------------------------------------------------------*
776 Name: SCFG_SetRendererFixed
777
778 Description: set the renderer circuit to be fixed
779
780 Arguments: sw : TRUE : fixed circuit
781 FALSE : not fixed (same as Nitro CPU)
782
783 Returns: None
784 *---------------------------------------------------------------------------*/
SCFG_SetRendererFixed(BOOL sw)785 static inline void SCFG_SetRendererFixed( BOOL sw )
786 {
787 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_FIXED_RENDERER, sw, 0 );
788 }
789 /*---------------------------------------------------------------------------*
790 Name: SCFG_IsRendererFixed
791
792 Description: Check if the renderer circuit is fixed.
793
794 Arguments: None
795
796 Returns: TRUE : fixed
797 FALSE : same as NITRO CPU
798 *---------------------------------------------------------------------------*/
SCFG_IsRendererFixed(void)799 static inline BOOL SCFG_IsRendererFixed(void)
800 {
801 return (BOOL)((reg_SCFG_EXT & SCFG_FIXED_RENDERER)? TRUE: FALSE);
802 }
803
804 /*---------------------------------------------------------------------------*
805 Name: SCFG_SetGeometryFixed
806
807 Description: set the geometory circuit to be fixed
808
809 Arguments: sw : TRUE : fixed circuit
810 FALSE : not fixed (same as Nitro CPU)
811
812 Returns: None
813 *---------------------------------------------------------------------------*/
SCFG_SetGeometryFixed(BOOL sw)814 static inline void SCFG_SetGeometryFixed( BOOL sw )
815 {
816 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_FIXED_GEOMETRY, sw, 0 );
817 }
818 /*---------------------------------------------------------------------------*
819 Name: SCFG_IsGeometryFixed
820
821 Description: Check if the geometory circuit is fixed.
822
823 Arguments: None
824
825 Returns: TRUE : fixed
826 FALSE : same as NITRO CPU
827 *---------------------------------------------------------------------------*/
SCFG_IsGeometryFixed(void)828 static inline BOOL SCFG_IsGeometryFixed(void)
829 {
830 return (BOOL)((reg_SCFG_EXT & SCFG_FIXED_GEOMETRY)? TRUE: FALSE);
831 }
832
833 /*---------------------------------------------------------------------------*
834 Name: SCFG_SetDmacFixed
835
836 Description: set the former DMAC circuit to be fixed
837
838 Arguments: sw : TRUE : fixed circuit
839 FALSE : not fixed (same as Nitro CPU)
840
841 Returns: None
842 *---------------------------------------------------------------------------*/
SCFG_SetDmacFixed(BOOL sw)843 static inline void SCFG_SetDmacFixed( BOOL sw )
844 {
845 SCFGi_CHANGEBIT_32( ®_SCFG_EXT, SCFG_FIXED_DMAC, sw, 0 );
846 }
847 /*---------------------------------------------------------------------------*
848 Name: SCFG_IsDmacFixed
849
850 Description: Check if the former DMAC circuit is fix.
851
852 Arguments: None
853
854 Returns: TRUE : fixed
855 FALSE : same as NITRO CPU
856 *---------------------------------------------------------------------------*/
SCFG_IsDmacFixed(void)857 static inline BOOL SCFG_IsDmacFixed(void)
858 {
859 return (BOOL)((reg_SCFG_EXT & SCFG_FIXED_DMAC)? TRUE: FALSE);
860 }
861
862 //================================================================================
863 // for register MI_MC
864 //================================================================================
865 /*---------------------------------------------------------------------------*
866 Name: SCFG_GetCardDetectMode
867
868 Description: Get card detect mode. (see manual)
869
870 Arguments: slot : SCFG_CARD_SLOT_1 : slot 1
871 SCFG_CARD_SLOT_2 : slot 2
872
873 Returns: SCFG_CARD_DETECT_MODE_0 : detect mode 0
874 SCFG_CARD_DETECT_MODE_1 : detect mode 1
875 SCFG_CARD_DETECT_MODE_2 : detect mode 2
876 SCFG_CARD_DETECT_MODE_3 : detect mode 3
877 *---------------------------------------------------------------------------*/
SCFG_GetCardDetectMode(int slot)878 static inline SCFGCardDetectMode SCFG_GetCardDetectMode( int slot )
879 {
880 #pragma unused(slot)
881 int shift = 2;
882 return (SCFGCardDetectMode)((reg_MI_MC & (SCFG_CARD_DETECT_MODE_MASK << shift) ) >> shift);
883 }
884
885 /*---------------------------------------------------------------------------*
886 Name: SCFG_GetCardDetectForChattering
887
888 Description: Get CDET after chattering removal
889
890 Arguments: slot : SCFG_CARD_SLOT_1 : slot 1
891 SCFG_CARD_SLOT_2 : slot 2
892
893 Returns: SCFG_CARD_DETECT_CHATTERING_LOW : low
894 SCFG_CARD_DETECT_CHATTERING_HIGH : high
895 *---------------------------------------------------------------------------*/
SCFG_GetCardDetectForChattering(int slot)896 static inline SCFGCardDetectChattering SCFG_GetCardDetectForChattering( int slot )
897 {
898 #pragma unused(slot)
899 int shift = 0;
900 return (SCFGCardDetectChattering)((reg_MI_MC & (SCFG_CARD_DETECT_CHATTERING_MASK << shift) ) >> shift);
901 }
902 #endif
903
904
905 //================================================================================
906 // Init
907 //================================================================================
908 /*---------------------------------------------------------------------------*
909 Name: SCFG_Init
910
911 Description: initialize scfg
912
913 Arguments: None
914
915 Returns: None
916 *---------------------------------------------------------------------------*/
917 void SCFG_Init(void);
918
919 //================================================================================
920 // FUSE
921 //================================================================================
922 /*---------------------------------------------------------------------------*
923 Name: SCFG_ReadFuseDataAsync
924
925 Description: (ARM9)
926 send a read command to ARM7
927 (ARM7)
928 read fuse data
929
930 The result will be returned to 1st argument of callback.
931
932 Arguments: callback : callback
933 arg : callback argument
934
935 Returns: (ARM9)
936 TRUE : success to send a command
937 FALSE : failed (locked.)
938 (ARM7)
939 always TRUE
940 *---------------------------------------------------------------------------*/
941 BOOL SCFG_ReadFuseDataAsync( SCFGCallback callback, void* arg );
942
943 /*---------------------------------------------------------------------------*
944 Name: SCFG_ReadFuseData
945
946 Description: (ARM9)
947 read fuse data from ARM7.
948 wait till finish to read
949 (ARM7)
950 read fuse data
951
952 Arguments: None
953
954 Returns: (ARM9)
955 0 : failed
956 >0 : fuse data
957 (ARM7)
958 (u64)-1 : failed
959 other : fuse data
960 *---------------------------------------------------------------------------*/
961 u64 SCFG_ReadFuseData( void );
962
963 #ifdef SDK_ARM9
964 /*---------------------------------------------------------------------------*
965 Name: SCFG_ReadBondingOptionAsync
966
967 Description: send a bonding option read command to ARM7
968 The result will be returned to 1st argument of callback.
969
970 Arguments: callback : callback
971 arg : callback argument
972
973 Returns: TRUE : success to send a command
974 FALSE : failed (locked.)
975 *---------------------------------------------------------------------------*/
976 BOOL SCFG_ReadBondingOptionAsync( SCFGCallback callback, void* arg );
977
978 /*---------------------------------------------------------------------------*
979 Name: SCFG_ReadBondingOption
980
981 Description: read bonding option information from ARM7.
982 wait till finish to read
983
984 Arguments: None
985
986 Returns: 0xffff : failed
987 0 ~ 3 : bonding option information
988 *---------------------------------------------------------------------------*/
989 u16 SCFG_ReadBondingOption( void );
990 #endif
991
992 //--------------------------------------------------------------------------------
993 #ifdef __cplusplus
994 } /* extern "C" */
995 #endif
996
997 /* TWL_COMMON_SCFG_H_ */
998 #endif
999