1 /*---------------------------------------------------------------------------* 2 Project: TwlSDK - include - twl - HW - ARM9 3 File: mmap_tcm.h 4 5 Copyright 2007-2008 Nintendo. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 $Date:: 2008-09-17#$ 14 $Rev: 8556 $ 15 $Author: okubata_ryoma $ 16 *---------------------------------------------------------------------------*/ 17 #ifndef TWL_HW_ARM9_MMAP_TCM_H_ 18 #define TWL_HW_ARM9_MMAP_TCM_H_ 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 /*---------------------------------------------------------------------------*/ 23 24 /*---------------------------------------------------------------------------* 25 Size definition in DTCM 26 *---------------------------------------------------------------------------*/ 27 //---- system reserved stack size 28 #define HW_SVC_STACK_SIZE 0x40 // 64 bytes 29 30 //---- system reserved work buffer size 31 #define HW_DTCM_SYSRV_SIZE 0x40 // 64 bytes 32 33 //---- IRQ stack size 34 #ifndef SDK_ASM 35 #include <nitro/types.h> 36 extern u32 SDK_IRQ_STACKSIZE[]; 37 #define HW_DTCM_IRQ_STACK_SIZE ((u32)SDK_IRQ_STACKSIZE) 38 #else 39 .extern SDK_IRQ_STACKSIZE 40 #define HW_DTCM_IRQ_STACK_SIZE SDK_IRQ_STACKSIZE 41 #endif 42 43 #define HW_SYS_AND_IRQ_STACK_SIZE_MAX (HW_DTCM_SIZE - HW_SVC_STACK_SIZE - HW_DTCM_SYSRV_SIZE) 44 45 /*---------------------------------------------------------------------------* 46 Structure of DTCM 47 *---------------------------------------------------------------------------*/ 48 #ifndef SDK_ASM 49 #include <nitro/types.h> 50 51 typedef volatile struct 52 { 53 //---- stack/heap area 54 u8 sys_and_irq_stack[HW_SYS_AND_IRQ_STACK_SIZE_MAX]; // 0000-3f80 system & irq stack 55 u8 svc_stack[HW_SVC_STACK_SIZE]; // 3f80-3fbf svc stack 56 57 //---- system reserved area 58 u8 reserved[HW_DTCM_SYSRV_SIZE - 8]; // 3fc0-3ff7 ???? 59 u32 intr_check; // 3ff8-3ffb intr_check for svc 60 void *intr_vector; // 3ffc-3fff intr handler 61 62 } 63 OS_DTCM; 64 #endif 65 66 /*---------------------------------------------------------------------------* 67 Other definition 68 *---------------------------------------------------------------------------*/ 69 //---- stack address ( for initial stack pointer ) 70 #define HW_DTCM_SYS_STACK_DEFAULT HW_DTCM 71 #define HW_DTCM_SYS_STACK_DEFAULT_END HW_DTCM_IRQ_STACK 72 #define HW_DTCM_IRQ_STACK (HW_DTCM_IRQ_STACK_END - HW_DTCM_IRQ_STACK_SIZE) 73 #define HW_DTCM_IRQ_STACK_END HW_DTCM_SVC_STACK 74 #define HW_DTCM_SVC_STACK (HW_DTCM_SVC_STACK_END - HW_SVC_STACK_SIZE) 75 #define HW_DTCM_SVC_STACK_END HW_DTCM_SYSRV 76 77 //---- system reserved area 78 #define HW_DTCM_SYSRV (HW_DTCM + HW_DTCM_SIZE - HW_DTCM_SYSRV_SIZE) 79 #define HW_INTR_CHECK_BUF (HW_DTCM_SYSRV + HW_DTCM_SYSRV_OFS_INTR_CHECK) 80 #define HW_INTR_VECTOR_BUF (HW_DTCM_SYSRV + HW_DTCM_SYSRV_OFS_INTR_VECTOR) 81 82 //---- offset in system reserved area 83 #define HW_DTCM_SYSRV_OFS_DEBUGGER 0x00 84 #define HW_DTCM_SYSRV_OFS_RESERVED2 0x1c 85 #define HW_DTCM_SYSRV_OFS_RESERVED 0x20 86 #define HW_DTCM_SYSRV_OFS_INTR_CHECK 0x38 87 #define HW_DTCM_SYSRV_OFS_INTR_VECTOR 0x3c 88 89 /*---------------------------------------------------------------------------* 90 Definition for Arena 91 *---------------------------------------------------------------------------*/ 92 //---- default address for DTCM Arena 93 #define HW_DTCM_ARENA_LO_DEFAULT HW_DTCM 94 #define HW_DTCM_ARENA_HI_DEFAULT HW_DTCM 95 96 //---- default address for ITCM Arena 97 #define HW_ITCM_ARENA_LO_DEFAULT HW_ITCM 98 #define HW_ITCM_ARENA_HI_DEFAULT HW_ITCM_END 99 100 /*---------------------------------------------------------------------------*/ 101 #ifdef __cplusplus 102 } /* extern "C" */ 103 #endif 104 #endif /* TWL_HW_ARM9_MMAP_TCM_H_ */ 105