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13
14<h1>ICInvalidateRange</h1>
15
16<h2>Syntax</h2>
17<dl><dd><pre class="construction">
18#include &lt;revolution/os.h&gt;
19
20void ICInvalidateRange(void* startAddr, u32 nBytes);
21</pre></dd></dl>
22
23<H2>Arguments</H2>
24<TABLE class="arguments" border="1" >
25  <TBODY>
26    <TR>
27<TH><STRONG><EM><CODE>startAddr</CODE></EM></STRONG></TH>
28<TD>Effective address (not the physical address) .</TD>
29    </TR>
30    <TR>
31<TH><STRONG><EM><CODE>nBytes</CODE></EM></STRONG></TH>
32<TD>Size of range to invalidate.</TD>
33    </TR>
34  </TBODY>
35</TABLE>
36
37<H2>Return Values</H2>
38<P>None.</P>
39
40<h2>Description</h2>
41<p>Invalidates a specified range in the instruction cache. The cache data block hit in the instruction cache for the specified range is invalidated. The <SPAN class="argument">startAddr</SPAN> argument is truncated at a 32-byte boundary. The end address, <SPAN class="argument">startAddr</SPAN> + <SPAN class="argument">nBytes</SPAN>, is rounded up to the nearest 32-byte boundary.( Note that if the cache is disabled or frozen (through <a href="ICFreeze.html"><code>ICFreeze</code></a>), this command will still execute. Furthermore, invalidation requests <strong>are not sent</strong> to the L2 or data caches.</p>
42
43<h2>See Also</h2>
44<P class="reference">
45<A href="../toc.html#Cache" target="contents">Cache Functions</A>,
46<a href="DCFlushRange.html">DCFlushRange</a>,
47<a href="DCInvalidateRange.html">DCInvalidateRange</a>,
48<a href="DCStoreRange.html">DCStoreRange</a>
49</p>
50
51<h2>Revision History</h2>
52<P>
532006/03/01 Initial version.<br>
54</p>
55
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