1 /*---------------------------------------------------------------------------*
2 Project: Horizon
3 File: math_Matrix33.cpp
4
5 Copyright (C)2009-2012 Nintendo Co., Ltd. All rights reserved.
6
7 These coded instructions, statements, and computer programs contain
8 proprietary information of Nintendo of America Inc. and/or Nintendo
9 Company Ltd., and are protected by Federal copyright law. They may
10 not be disclosed to third parties or copied or duplicated in any form,
11 in whole or in part, without the prior written consent of Nintendo.
12
13 $Rev: 46347 $
14 *---------------------------------------------------------------------------*/
15
16 #include <nn/math.h>
17
18 #include <cmath>
19 #include <nn/math/ARMv6/math_Matrix33.h>
20
21 #if !defined(NN_MATH_AS_INLINE)
22 #include <nn/math/ARMv6/inline/math_Matrix33.ipp>
23 #endif
24
25 namespace nn {
26 namespace math {
27 namespace ARMv6 {
28
29 #include <nn/hw/ARM/code32.h>
30
31 /* Please see man pages for details
32
33
34 */
35
36 NN_FUNC_ATTR_PRIVATE_SECTION
MTX33CopyAsm(MTX33 *,const MTX33 *)37 asm MTX33* MTX33CopyAsm(MTX33*, const MTX33*)
38 {
39 VLDMIA r1!,{s0-s4} // Segment and load to shorten stall times due to data hazards
40 MOV r2, r0 //
41 VLDMIA r1,{s5-s8}
42 VSTMIA r2!,{s0-s4} // Store result
43 VSTMIA r2,{s5-s8} // Store result
44 BX lr // Return
45 }
46
47 NN_FUNC_ATTR_PRIVATE_SECTION
MTX33MAddAsm(MTX33 *,f32,const MTX33 *,const MTX33 *)48 asm MTX33* MTX33MAddAsm(MTX33* , f32, const MTX33*, const MTX33*)
49 {
50 VLDMIA r2,{s1-s9} // The entire p2 matrix is put in the [S4-S15] registers
51 VLDMIA r1!,{s10-s15} // Matrix p1 is put into the [S16-S23] registers
52
53 VMLA.F32 s1,s10,s0
54 VMLA.F32 s2,s11,s0
55 VMLA.F32 s3,s12,s0
56
57 VLDMIA r1,{s10-s12} // Continuation of p1
58
59 VMLA.F32 s4,s13,s0
60 VMLA.F32 s5,s14,s0
61 VMLA.F32 s6,s15,s0
62
63 VMLA.F32 s7,s10,s0
64 VMLA.F32 s8,s11,s0
65 VMLA.F32 s9,s12,s0
66
67 VSTMIA r0,{s1-s9} // Store result
68 BX lr // Return
69
70 }
71
72 NN_FUNC_ATTR_PRIVATE_SECTION
VEC3TransformAsm(VEC3 *,const MTX33 *,const VEC3 *)73 asm VEC3* VEC3TransformAsm(VEC3*, const MTX33*, const VEC3*)
74 {
75 VLDMIA r1,{s0-s8} // First line of matrix pM to register [S0-S2]
76 VLDMIA r2,{s9-s11} // All vectors are put in the [S10-S12] registers
77
78 VMUL.F32 s12,s0,s9
79 VMUL.F32 s13,s3,s9
80 VMUL.F32 s14,s6,s9
81
82 VMLA.F32 s12,s1,s10
83 VMLA.F32 s13,s4,s10
84 VMLA.F32 s14,s7,s10
85
86 VMLA.F32 s12,s2,s11
87 VMLA.F32 s13,s5,s11
88 VMLA.F32 s14,s8,s11
89
90 VSTMIA r0,{s12-s14} // Store result
91
92 BX lr // Return
93
94 }
95
96 #include <nn/hw/ARM/codereset.h>
97
98 } // namespace ARMv6
99 } // namespace math
100 } // namespace nn
101