1 /*---------------------------------------------------------------------------* 2 Project: Horizon 3 File: VFPv2_reg.h 4 5 Copyright (C)2009-2012 Nintendo Co., Ltd. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 $Rev: 46347 $ 14 *---------------------------------------------------------------------------*/ 15 16 #ifndef NN_HW_ARM_VFPV2_REG_H_ 17 #define NN_HW_ARM_VFPV2_REG_H_ 18 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 23 24 //---------------------------------------------------------------------- 25 // VFP Control Registers 26 //---------------------------------------------------------------------- 27 28 // Floating-Point Exception Register 29 30 #define HW_FPEXC_EXCEPTION_STATE 0x80000000 // in exception state 31 #define HW_FPEXC_VFP_ENABLE 0x40000000 // VFP enable 32 #define HW_FPEXC_FPINST2_VALID 0x10000000 // FPINST2 instruction valid flag 33 34 #define HW_FPEXC_VEC_ITR_MASK 0x00000700 // Vector iteration count 35 36 #define HW_FPEXC_INPUT_EXCEPTION 0x00000080 // Input exception flag 37 #define HW_FPEXC_POTENT_UNDERFLOW 0x00000008 // Potential underflow flag 38 #define HW_FPEXC_POTENT_OVERFLOW 0x00000004 // Potential overflow flag 39 #define HW_FPEXC_POTENT_INVALID 0x00000001 // Potential invalid operation flag 40 41 #define HW_FPEXC_VEC_ITR_SFT 8 42 43 44 // Floating-Point Status and Control Register 45 46 #define HW_FPSCR_N_FLAG 0x80000000 // Negative/Less than flag 47 #define HW_FPSCR_Z_FLAG 0x40000000 // Zero flag 48 #define HW_FPSCR_C_FLAG 0x20000000 // Carry/Borrow/Extend flag 49 #define HW_FPSCR_V_FLAG 0x10000000 // Overflow flag 50 51 #define HW_FPSCR_DEFAULT_NAN_MODE 0x02000000 // Default NaN mode (for std mode & fast mode) 52 #define HW_FPSCR_FLUSH_TO_ZERO_MODE 0x01000000 // Flush-to-zero mode (for std mode & fast mode) 53 #define HW_FPSCR_ROUND_MODE_MASK 0x00c00000 // Rounding mode 54 #define HW_FPSCR_VEC_STRIDE_MASK 0x00300000 // Vector stride 55 #define HW_FPSCR_VEC_LENGTH_MASK 0x00070000 // Vector length 56 57 #define HW_FPSCR_IDE_ENABLE 0x00008000 // Input Subnormal exception enable 58 #define HW_FPSCR_IXE_ENABLE 0x00001000 // Inexact exception enable 59 #define HW_FPSCR_UFE_ENABLE 0x00000800 // Underflow exception enable 60 #define HW_FPSCR_OFE_ENABLE 0x00000400 // Overflow exception enable 61 #define HW_FPSCR_DZE_ENABLE 0x00000200 // Division by Zero exception enable 62 #define HW_FPSCR_IOE_ENABLE 0x00000100 // Invalid Operation exception enable 63 64 #define HW_FPSCR_IDC 0x00000080 // Input Subnormal cumulative flag 65 #define HW_FPSCR_IXC 0x00000010 // Inexact cumulative flag 66 #define HW_FPSCR_UFC 0x00000008 // Underflow cumulative flag 67 #define HW_FPSCR_OFC 0x00000004 // Overflow cumulative flag 68 #define HW_FPSCR_DZC 0x00000002 // Division by Zero cumulative flag 69 #define HW_FPSCR_IOC 0x00000001 // Invalid Operation cumulative flag 70 71 #define HW_FPSCR_ROUND_MODE_SFT 22 72 #define HW_FPSCR_VEC_STRIDE_SFT 20 73 #define HW_FPSCR_VEC_LENGTH_SFT 16 74 75 #define HW_FPSCR_ROUND_NEAR_MODE 0 // Round to nearest mode 76 #define HW_FPSCR_ROUND_PLUS_MODE 1 // Round toward plus infinity mode 77 #define HW_FPSCR_ROUND_MINUS_MODE 2 // Round toward minus infinity mode 78 #define HW_FPSCR_ROUND_ZERO_MODE 3 // Round toward zero mode 79 80 #define HW_FPSCR_VEC_STRIDE_1 0 // Vector stride 1 81 #define HW_FPSCR_VEC_STRIDE_2 3 // Vector stride 2 82 83 #define HW_FPSCR_VEC_LENGTH_1 0 // Vector length 1 84 #define HW_FPSCR_VEC_LENGTH_2 1 // Vector length 2 85 #define HW_FPSCR_VEC_LENGTH_3 2 // Vector length 3 86 #define HW_FPSCR_VEC_LENGTH_4 3 // Vector length 4 87 #define HW_FPSCR_VEC_LENGTH_5 4 // Vector length 5 88 #define HW_FPSCR_VEC_LENGTH_6 5 // Vector length 6 89 #define HW_FPSCR_VEC_LENGTH_7 6 // Vector length 7 90 #define HW_FPSCR_VEC_LENGTH_8 7 // Vector length 8 91 92 93 // Floating-Point Instruction Register 94 95 // Floating-Point Instruction Register 2 96 97 98 #ifdef __cplusplus 99 } // extern "C" 100 #endif 101 102 // NN_HW_ARM_VFPV2_REG_H_ 103 #endif 104