1 /*---------------------------------------------------------------------------*
2 Project: Horizon
3 File: math_Matrix33.cpp
4
5 Copyright (C)2009 Nintendo Co., Ltd. All rights reserved.
6
7 These coded instructions, statements, and computer programs contain
8 proprietary information of Nintendo of America Inc. and/or Nintendo
9 Company Ltd., and are protected by Federal copyright law. They may
10 not be disclosed to third parties or copied or duplicated in any form,
11 in whole or in part, without the prior written consent of Nintendo.
12
13 $Rev: 24870 $
14 *---------------------------------------------------------------------------*/
15
16 #include <nn/math.h>
17
18 #include <cmath>
19 #include <nn/math/ARMv6/math_Matrix33.h>
20
21 #if !defined(NN_MATH_AS_INLINE)
22 #include <nn/math/ARMv6/inline/math_Matrix33.ipp>
23 #endif
24
25 namespace nn {
26 namespace math {
27 namespace ARMv6 {
28
29 #include <nn/hw/ARM/code32.h>
30
31 /*!
32 @name 行列
33 @{
34 */
35
36 NN_FUNC_ATTR_PRIVATE_SECTION
MTX33CopyAsm(MTX33 *,const MTX33 *)37 asm MTX33* MTX33CopyAsm(MTX33*, const MTX33*)
38 {
39 VLDMIA r1,{s0-s8} // レジスタ[S4-S15]に行列p2を全て入れる
40 VSTMIA r0,{s0-s8} // 結果をストア
41 BX lr // 戻る
42 }
43
44 NN_FUNC_ATTR_PRIVATE_SECTION
MTX33MAddAsm(MTX33 *,f32,const MTX33 *,const MTX33 *)45 asm MTX33* MTX33MAddAsm(MTX33* , f32, const MTX33*, const MTX33*)
46 {
47 VLDMIA r2,{s1-s9} // レジスタ[S4-S15]に行列p2を全て入れる
48 VLDMIA r1!,{s10-s15} // レジスタ[S16-S23]に行列p1を入れる
49
50 VMLA.F32 s1,s10,s0
51 VMLA.F32 s2,s11,s0
52 VMLA.F32 s3,s12,s0
53
54 VLDMIA r1,{s10-s12} // p1の続き
55
56 VMLA.F32 s4,s13,s0
57 VMLA.F32 s5,s14,s0
58 VMLA.F32 s6,s15,s0
59
60 VMLA.F32 s7,s10,s0
61 VMLA.F32 s8,s11,s0
62 VMLA.F32 s9,s12,s0
63
64 VSTMIA r0,{s1-s9} // 結果をストア
65 BX lr // 戻る
66
67 }
68
69 NN_FUNC_ATTR_PRIVATE_SECTION
VEC3TransformAsm(VEC3 *,const MTX33 *,const VEC3 *)70 asm VEC3* VEC3TransformAsm(VEC3*, const MTX33*, const VEC3*)
71 {
72 VLDMIA r1,{s0-s8} // レジスタ[S0-S2]に行列pMの１行目
73 VLDMIA r2,{s9-s11} // レジスタ[S10-S12]にベクトルを全て入れる
74
75 VMUL.F32 s12,s0,s9
76 VMUL.F32 s13,s3,s9
77 VMUL.F32 s14,s6,s9
78
79 VMLA.F32 s12,s1,s10
80 VMLA.F32 s13,s4,s10
81 VMLA.F32 s14,s7,s10
82
83 VMLA.F32 s12,s2,s11
84 VMLA.F32 s13,s5,s11
85 VMLA.F32 s14,s8,s11
86
87 VSTMIA r0,{s12-s14} // 結果をストア
88
89 BX lr // 戻る
90
91 }
92
93 #include <nn/hw/ARM/codereset.h>
94
95 } // namespace ARMv6
96 } // namespace math
97 } // namespace nn
98