1 /*---------------------------------------------------------------------------* 2 Project: PICA register macro header 3 File: gx_MacroTexture.h 4 5 Copyright (C)2010 Nintendo Co., Ltd. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 $Revision: 34957 $ 14 *---------------------------------------------------------------------------*/ 15 #ifndef NN_GX_CTR_PICA_MACRO_TEXTURE_H_ 16 #define NN_GX_CTR_PICA_MACRO_TEXTURE_H_ 17 18 #include <nn/gx/CTR/gx_MacroCommon.h> 19 20 /* Please see man pages for details 21 22 23 */ 24 25 /////////////////////////////////// 26 // Texture address 27 28 // PICA_REG_TEXTURE0_ADDR1 0x085 29 // PICA_REG_TEXTURE0_ADDR2 0x086 30 // PICA_REG_TEXTURE0_ADDR3 0x087 31 // PICA_REG_TEXTURE0_ADDR4 0x088 32 // PICA_REG_TEXTURE0_ADDR5 0x089 33 // PICA_REG_TEXTURE0_ADDR6 0x08a 34 // PICA_REG_TEXTURE2_ADDR 0x09d 35 // PICA_REG_TEXTURE1_ADDR 0x095 36 #define PICA_CMD_DATA_TEXTURE_ADDR( addr ) \ 37 ( (u32)(addr) >> 3 ) 38 39 /* 40 struct CommandTexCubeMap 41 { 42 CMD_PADDING(22); 43 u32 CubeMap : 6; 44 CMD_PADDING(4); 45 }; 46 */ 47 48 /* Please see man pages for details 49 50 */ 51 enum PicaDataTexture 52 { 53 // 54 PICA_DATA_TEXTURE_2D = 0x0, 55 // 56 PICA_DATA_TEXTURE_CUBE_MAP_POSITIVE_X = 0x0, 57 // 58 PICA_DATA_TEXTURE_CUBE_MAP_NEGATIVE_X = 0x1, 59 // 60 PICA_DATA_TEXTURE_CUBE_MAP_POSITIVE_Y = 0x2, 61 // 62 PICA_DATA_TEXTURE_CUBE_MAP_NEGATIVE_Y = 0x3, 63 // 64 PICA_DATA_TEXTURE_CUBE_MAP_POSITIVE_Z = 0x4, 65 // 66 PICA_DATA_TEXTURE_CUBE_MAP_NEGATIVE_Z = 0x5 67 }; 68 69 // PICA_REG_TEXTURE0_ADDR1 0x085 70 #define PICA_CMD_DATA_TEXTURE_CUBE_MAP_ADDR(cubeMapAddr) \ 71 ( (cubeMapAddr) & 0x3fffff ) 72 73 /////////////////////////////////// 74 // Texture combiner 75 // TexEnv 76 77 /* 78 struct CommandTexEnvSrc 79 { 80 u32 srcRgb0 : 4; 81 u32 srcRgb1 : 4; 82 u32 srcRgb2 : 4; 83 CMD_PADDING(4); 84 u32 srcAlpha0 : 4; 85 u32 srcAlpha1 : 4; 86 u32 srcAlpha2 : 4; 87 CMD_PADDING(4); 88 }; 89 */ 90 91 /* Please see man pages for details 92 93 94 95 */ 96 enum PicaDataTexEnvSrc 97 { 98 // 99 PICA_DATA_TEX_ENV_SRC_RGBA_PRIMARY_COLOR = 0x0, 100 // 101 PICA_DATA_TEX_ENV_SRC_RGBA_FRAGMENT_PRIMARY_COLOR_DMP = 0x1, 102 // 103 PICA_DATA_TEX_ENV_SRC_RGBA_FRAGMENT_SECONDARY_COLOR_DMP = 0x2, 104 // 105 PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE0 = 0x3, 106 // 107 PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE1 = 0x4, 108 // 109 PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE2 = 0x5, 110 // 111 PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE3 = 0x6, 112 // 113 PICA_DATA_TEX_ENV_SRC_RGBA_PREVIOUS_BUFFER_DMP = 0xd, 114 // 115 PICA_DATA_TEX_ENV_SRC_RGBA_CONSTANT = 0xe, 116 // 117 PICA_DATA_TEX_ENV_SRC_RGBA_PREVIOUS = 0xf 118 }; 119 120 #define PICA_TEX_ENV_SRC_RGB0_SHIFT 0 121 #define PICA_TEX_ENV_SRC_RGB1_SHIFT 4 122 #define PICA_TEX_ENV_SRC_RGB2_SHIFT 8 123 #define PICA_TEX_ENV_SRC_ALPHA0_SHIFT 16 124 #define PICA_TEX_ENV_SRC_ALPHA1_SHIFT 20 125 #define PICA_TEX_ENV_SRC_ALPHA2_SHIFT 24 126 127 // PICA_REG_TEX_ENV0 0x0c0 128 // PICA_REG_TEX_ENV1 0x0c8 129 // PICA_REG_TEX_ENV2 0x0d0 130 // PICA_REG_TEX_ENV3 0x0d8 131 // PICA_REG_TEX_ENV4 0x0f0 132 // PICA_REG_TEX_ENV5 0x0f8 133 #define PICA_CMD_DATA_TEX_ENV_SRC( srcRgb0, srcRgb1, srcRgb2, \ 134 srcAlpha0, srcAlpha1, srcAlpha2 ) \ 135 ( (srcRgb0) << PICA_TEX_ENV_SRC_RGB0_SHIFT | \ 136 (srcRgb1) << PICA_TEX_ENV_SRC_RGB1_SHIFT | \ 137 (srcRgb2) << PICA_TEX_ENV_SRC_RGB2_SHIFT | \ 138 (srcAlpha0) << PICA_TEX_ENV_SRC_ALPHA0_SHIFT | \ 139 (srcAlpha1) << PICA_TEX_ENV_SRC_ALPHA1_SHIFT | \ 140 (srcAlpha2) << PICA_TEX_ENV_SRC_ALPHA2_SHIFT ) 141 142 /* 143 struct CommandTexEnvOperand 144 { 145 u32 operandRg0 : 4; 146 u32 operandRg1 : 4; 147 u32 operandRg2 : 4; 148 u32 operandAlpha0 : 3; 149 CMD_PADDING(1); 150 u32 operandAlpha1 : 3; 151 CMD_PADDING(1); 152 u32 operandAlpha2 : 3; 153 CMD_PADDING(9); 154 }; 155 */ 156 157 /* Please see man pages for details 158 159 160 161 */ 162 enum PicaDataTexEnvOperand 163 { 164 // 165 PICA_DATA_OPE_RGB_SRC_COLOR = 0x0, 166 // 167 PICA_DATA_OPE_RGB_ONE_MINUS_SRC_COLOR = 0x1, 168 // 169 PICA_DATA_OPE_RGB_SRC_ALPHA = 0x2, 170 // 171 PICA_DATA_OPE_RGB_ONE_MINUS_SRC_ALPHA = 0x3, 172 // 173 PICA_DATA_OPE_RGB_SRC_R_DMP = 0x4, 174 // 175 PICA_DATA_OPE_RGB_ONE_MINUS_SRC_R_DMP = 0x5, 176 // 177 PICA_DATA_OPE_RGB_SRC_G_DMP = 0x8, 178 // 179 PICA_DATA_OPE_RGB_ONE_MINUS_SRC_G_DMP = 0x9, 180 // 181 PICA_DATA_OPE_RGB_SRC_B_DMP = 0xc, 182 // 183 PICA_DATA_OPE_RGB_ONE_MINUS_SRC_B_DMP = 0xd, 184 // 185 PICA_DATA_OPE_ALPHA_SRC_ALPHA = 0x0, 186 // 187 PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_ALPHA = 0x1, 188 // 189 PICA_DATA_OPE_ALPHA_SRC_R_DMP = 0x2, 190 // 191 PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_R_DMP = 0x3, 192 // 193 PICA_DATA_OPE_ALPHA_SRC_G_DMP = 0x4, 194 // 195 PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_G_DMP = 0x5, 196 // 197 PICA_DATA_OPE_ALPHA_SRC_B_DMP = 0x6, 198 // 199 PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_B_DMP = 0x7 200 }; 201 202 203 #define PICA_TEX_ENV_OPE_RGB0_SHIFT 0 204 #define PICA_TEX_ENV_OPE_RGB1_SHIFT 4 205 #define PICA_TEX_ENV_OPE_RGB2_SHIFT 8 206 #define PICA_TEX_ENV_OPE_ALPHA0_SHIFT 12 207 #define PICA_TEX_ENV_OPE_ALPHA1_SHIFT 16 208 #define PICA_TEX_ENV_OPE_ALPHA2_SHIFT 20 209 210 // PICA_REG_TEX_ENV0_OPERAND 0x0c1 211 // PICA_REG_TEX_ENV1_OPERAND 0x0c9 212 // PICA_REG_TEX_ENV2_OPERAND 0x0d1 213 // PICA_REG_TEX_ENV3_OPERAND 0x0d9 214 // PICA_REG_TEX_ENV4_OPERAND 0x0f1 215 // PICA_REG_TEX_ENV5_OPERAND 0x0f9 216 #define PICA_CMD_DATA_TEX_ENV_OPERAND(operandRgb0, operandRgb1, operandRgb2, \ 217 operandAlpha0, operandAlpha1, operandAlpha2) \ 218 ( (operandRgb0) << PICA_TEX_ENV_OPE_RGB0_SHIFT | \ 219 (operandRgb1) << PICA_TEX_ENV_OPE_RGB1_SHIFT | \ 220 (operandRgb2) << PICA_TEX_ENV_OPE_RGB2_SHIFT | \ 221 (operandAlpha0) << PICA_TEX_ENV_OPE_ALPHA0_SHIFT | \ 222 (operandAlpha1) << PICA_TEX_ENV_OPE_ALPHA1_SHIFT | \ 223 (operandAlpha2) << PICA_TEX_ENV_OPE_ALPHA2_SHIFT ) 224 225 /* 226 struct CommandTexEnvCombine 227 { 228 u32 combineRgb : 4; 229 CMD_PADDING(12); 230 u32 combineAlpha : 4; 231 CMD_PADDING(12); 232 }; 233 */ 234 235 /* Please see man pages for details 236 237 238 239 */ 240 enum PicaDataTexEnvCombine 241 { 242 // 243 PICA_DATA_TEX_ENV_COMBINE_REPLACE = 0x0, 244 // 245 PICA_DATA_TEX_ENV_COMBINE_MODULATE = 0x1, 246 // 247 PICA_DATA_TEX_ENV_COMBINE_ADD = 0x2, 248 // 249 PICA_DATA_TEX_ENV_COMBINE_ADD_SIGNED = 0x3, 250 // 251 PICA_DATA_TEX_ENV_COMBINE_INTERPOLATE = 0x4, 252 // 253 PICA_DATA_TEX_ENV_COMBINE_SUBTRACT = 0x5, 254 // 255 PICA_DATA_TEX_ENV_COMBINE_DOT3_RGB = 0x6, 256 // 257 PICA_DATA_TEX_ENV_COMBINE_DOT3_RGBA = 0x7, 258 // 259 PICA_DATA_TEX_ENV_COMBINE_MULT_ADD_DMP = 0x8, 260 // 261 PICA_DATA_TEX_ENV_COMBINE_ADD_MULT_DMP = 0x9 262 }; 263 264 // PICA_REG_TEX_ENV0_COMBINE 0x0c2 265 // PICA_REG_TEX_ENV1_COMBINE 0x0ca 266 // PICA_REG_TEX_ENV2_COMBINE 0x0d2 267 // PICA_REG_TEX_ENV3_COMBINE 0x0da 268 // PICA_REG_TEX_ENV4_COMBINE 0x0f2 269 // PICA_REG_TEX_ENV5_COMBINE 0x0fa 270 #define PICA_CMD_DATA_TEX_ENV_COMBINE( combineRgb, combineAlpha ) \ 271 ( (combineRgb) | (combineAlpha) << 16 ) 272 273 /* 274 struct CommandTexEnvConst 275 { 276 u32 constRgb1 : 8; 277 u32 constRgb2 : 8; 278 u32 constRgb3 : 8; 279 u32 constRgb4 : 8; 280 }; 281 */ 282 // PICA_REG_TEX_ENV0_COLOR 0x0c3 283 // PICA_REG_TEX_ENV1_COLOR 0x0cb 284 // PICA_REG_TEX_ENV2_COLOR 0x0d3 285 // PICA_REG_TEX_ENV3_COLOR 0x0db 286 // PICA_REG_TEX_ENV4_COLOR 0x0f3 287 // PICA_REG_TEX_ENV5_COLOR 0x0fb 288 #define PICA_CMD_DATA_TEX_ENV_CONST( constRgb0, constRgb1, constRgb2, constRgb3 ) \ 289 ((constRgb0) | (constRgb1) << 8 | (constRgb2) << 16 | (constRgb3) << 24) 290 291 /* 292 struct CommandTexEnvScale 293 { 294 u32 scaleRgb : 2; 295 CMD_PADDING(14); 296 u32 scaleAlpha : 2; 297 CMD_PADDING(14); 298 }; 299 */ 300 301 /* Please see man pages for details 302 303 304 305 */ 306 enum PicaDataTexEnvScale 307 { 308 // 309 PICA_DATA_TEX_ENV_SCALE_1 = 0x0, 310 // 311 PICA_DATA_TEX_ENV_SCALE_2 = 0x1, 312 // 313 PICA_DATA_TEX_ENV_SCALE_4 = 0x2 314 }; 315 316 // PICA_REG_TEX_ENV0_SCALE 0x0c4 317 // PICA_REG_TEX_ENV1_SCALE 0x0cc 318 // PICA_REG_TEX_ENV2_SCALE 0x0d4 319 // PICA_REG_TEX_ENV3_SCALE 0x0dc 320 // PICA_REG_TEX_ENV4_SCALE 0x0f4 321 // PICA_REG_TEX_ENV5_SCALE 0x0fc 322 #define PICA_CMD_DATA_TEX_ENV_SCALE( scaleRgb, scaleAlpha ) \ 323 ( (scaleRgb) | (scaleAlpha) << 16 ) 324 325 #define PICA_CMD_DATA_TEX_ENV_BUFFER_COLOR_WHITE 0xffffffff 326 #define PICA_CMD_DATA_TEX_ENV_BUFFER_COLOR_BLACK 0x00000000 327 328 // PICA_REG_TEX_ENV_BUF_COLOR 0x0fd 329 #define PICA_CMD_DATA_COLOR( color8 ) \ 330 ( (color8.r) | (color8.g) << 8 | (color8.b) << 16 | (color8.a) << 24 ) 331 332 /* 333 struct CommandTexEnvBufInput 334 { 335 CMD_PADDING(8); 336 u32 bufInput1 : 4; // 1 bit in this field 337 CMD_PADDING(4); 338 u32 bufInput2 : 4; // 1 bin in this field 339 CMD_PADDING(12); 340 }; 341 */ 342 343 344 /* Please see man pages for details 345 346 347 348 */ 349 enum PicaDataTexEnvBufferInput 350 { 351 // 352 PICA_DATA_TEX_ENV_BUFFER_INPUT_PREVIOUS_BUFFER_DMP = 0x0, 353 // 354 PICA_DATA_TEX_ENV_BUFFER_INPUT_PREVIOUS = 0x1 355 }; 356 357 // PICA_REG_TEX_ENV_BUF_INPUT 0x0e0 358 // i is index of dmp_TexEnv[i]. The values are 1, 2, 3, 4 only. 359 360 #define PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(i, bufInput0, bufInput1) \ 361 ((bufInput0) << 7+(i) | (bufInput1) << 11+(i)) 362 363 // 0x0e0 [15:8] 364 #define PICA_CMD_SET_TEX_ENV_BUFFER_INPUT(bufInput0_0, bufInput0_1, \ 365 bufInput1_0, bufInput1_1, \ 366 bufInput2_0, bufInput2_1, \ 367 bufInput3_0, bufInput3_1) \ 368 ( PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(1, bufInput0_0, bufInput0_1) | \ 369 PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(2, bufInput1_0, bufInput1_1) | \ 370 PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(3, bufInput2_0, bufInput2_1) | \ 371 PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(4, bufInput3_0, bufInput3_1) ) , \ 372 PICA_CMD_HEADER_SINGLE_BE(PICA_REG_GAS_FOG_MODE, 0x2) 373 374 /////////////////////////////////// 375 // Shadow Textrue 376 // 377 /* 378 struct CommandTextureShadow 379 { 380 u32 perspectiveShadow : 1; 381 u32 shadowZBias : 23; 382 u32 shadowZScale : 8; 383 }; 384 */ 385 386 // PICA_REG_TEXTURE0_SHADOW 0x08b 387 #define PICA_CMD_DATA_TEXTURE_SHADOW(perspectiveShadow, shadowZBias, shadowZScale) \ 388 (( (perspectiveShadow) ? 0 : 1) | (shadowZBias) << 1 | (shadowZScale) << 24) 389 390 /////////////////////////////////// 391 // Texture Sampler 392 // Texture Texcoord 393 // Texture Cache Clear 394 /* 395 struct CommandTextureFunc 396 { 397 u32 type0_0 : 1; 398 u32 type1 : 1; 399 u32 type2 : 1; 400 CMD_PADDING(1); // 0x0 401 CMD_PADDING(4); 402 u32 texcoord3 : 2; 403 u32 type3 : 1; 404 CMD_PADDING(1); 405 CMD_PADDING(1); // 0x1 406 u32 texcoord2 : 1; 407 CMD_PADDING(2); 408 u32 clear : 1; 409 CMD_PADDING(15); 410 411 }; 412 */ 413 414 // Texture Sampler 415 416 /* Please see man pages for details 417 418 419 420 */ 421 enum PicaDataTexture0SamplerType 422 { 423 // 424 PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_2D = 0x0, 425 // 426 PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_CUBE_MAP = 0x1, 427 // 428 PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_SHADOW_2D_DMP = 0x2, 429 // 430 PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_PROJECTION_DMP = 0x3, 431 // 432 PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_SHADOW_CUBE_DMP = 0x4, 433 // 434 PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_FALSE = 0x5, 435 // 436 PICA_DATA_TEXTURE0_SAMPLER_TYPE_FALSE = 0x5 437 }; 438 439 /* Please see man pages for details 440 441 442 443 */ 444 enum PicaDataTexture1SamplerType 445 { 446 // 447 PICA_DATA_TEXTURE1_SAMPLER_TYPE_FALSE = 0x0, 448 // 449 PICA_DATA_TEXTURE1_SAMPLER_TYPE_TEXTURE_2D = 0x1 450 }; 451 452 /* Please see man pages for details 453 454 455 456 */ 457 enum PicaDataTexture2SamplerType 458 { 459 // 460 PICA_DATA_TEXTURE2_SAMPLER_TYPE_FALSE = 0x0, 461 // 462 PICA_DATA_TEXTURE2_SAMPLER_TYPE_TEXTURE_2D = 0x1 463 }; 464 465 /* Please see man pages for details 466 467 468 469 */ 470 enum PicaDataTexture3SamplerType 471 { 472 // 473 PICA_DATA_TEXTURE3_SAMPLER_TYPE_FALSE = 0x0, 474 // 475 PICA_DATA_TEXTURE3_SAMPLER_TYPE_TEXTURE_PROCEDURAL_DMP = 0x1 476 }; 477 478 479 /* Please see man pages for details 480 481 482 483 */ 484 enum PicaDataTexture2TexCoord 485 { 486 // 487 PICA_DATA_TEXTURE2_TEXCOORD_TEXTURE1 = 0x1, 488 // 489 PICA_DATA_TEXTURE2_TEXCOORD_TEXTURE2 = 0x0 490 }; 491 492 /* Please see man pages for details 493 494 495 496 */ 497 enum PicaDataTexture3TexCoord 498 { 499 // 500 PICA_DATA_TEXTURE3_TEXCOORD_TEXTURE0 = 0x0, 501 // 502 PICA_DATA_TEXTURE3_TEXCOORD_TEXTURE1 = 0x1, 503 // 504 PICA_DATA_TEXTURE3_TEXCOORD_TEXTURE2 = 0x2 505 }; 506 507 // PICA_REG_TEXTURE_FUNC 0x080 508 #define PICA_CMD_DATA_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType, \ 509 texture3Texcoord, texture3SamplerType, \ 510 texture2Texcoord, clearTextureCache) \ 511 ( ((texture0SamplerType == PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_FALSE) ? 0 : 1) | \ 512 ((texture1SamplerType) ? 1 : 0) << 1 | \ 513 ((texture2SamplerType) ? 1 : 0) << 2 | \ 514 0 << 3 | \ 515 (texture3Texcoord) << 8 | \ 516 ((texture3SamplerType) ? 1 : 0) << 10 | \ 517 1 << 12 | \ 518 ((texture2Texcoord) ? 1 : 0) << 13 | \ 519 (clearTextureCache) << 16 | \ 520 0 << 17 ) 521 522 #define PICA_CMD_SET_TEXTURE_FUNC_CLEAR(texture0SamplerType, texture1SamplerType, texture2SamplerType, \ 523 texture3SamplerType, texture2Texcoord, texture3Texcoord) \ 524 PICA_CMD_DATA_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType, \ 525 texture3Texcoord, texture3SamplerType, \ 526 texture2Texcoord, 0x1), \ 527 PICA_CMD_HEADER_SINGLE_BE( PICA_REG_TEXTURE_FUNC, 0xB ), \ 528 1 << 16, \ 529 PICA_CMD_HEADER_SINGLE_BE( PICA_REG_TEXTURE_FUNC, 0x4 ) 530 531 #define PICA_CMD_SET_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType, \ 532 texture3SamplerType, texture2Texcoord, texture3Texcoord) \ 533 PICA_CMD_DATA_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType, \ 534 texture3Texcoord, texture3SamplerType, \ 535 texture2Texcoord, 0x0), \ 536 PICA_CMD_HEADER_SINGLE_BE( PICA_REG_TEXTURE_FUNC, 0xB ) 537 538 /////////////////////////////////// 539 // Procedural Texture 540 // 541 /* 542 struct CommandProcTex0 543 { 544 u32 ptClampU : 3; 545 u32 ptClampV : 4; 546 u32 ptRgbMap : 4; 547 u32 ptAlphaMap : 4; 548 u32 ptAlphaSeparate : 1; 549 u32 ptNoiseEnable : 1; 550 u32 ptShiftU : 2; 551 u32 ptShiftV : 2; 552 u32 ptTexBias1 : 8; 553 CMD_PADDING(3); 554 }; 555 */ 556 557 /* Please see man pages for details 558 559 560 561 */ 562 enum PicaDataProcTexMap 563 { 564 // 565 PICA_DATA_PROCTEX_U_DMP = 0x0, 566 // 567 PICA_DATA_PROCTEX_U2_DMP = 0x1, 568 // 569 PICA_DATA_PROCTEX_V_DMP = 0x2, 570 // 571 PICA_DATA_PROCTEX_V2_DMP = 0x3, 572 // 573 PICA_DATA_PROCTEX_ADD_DMP = 0x4, 574 // 575 PICA_DATA_PROCTEX_ADD2_DMP = 0x5, 576 // 577 PICA_DATA_PROCTEX_ADDSQRT2_DMP = 0x6, 578 // 579 PICA_DATA_PROCTEX_MIN_DMP = 0x7, 580 // 581 PICA_DATA_PROCTEX_MAX_DMP = 0x8, 582 // 583 PICA_DATA_PROCTEX_RMAX_DMP = 0x9 584 }; 585 586 /* Please see man pages for details 587 588 589 590 */ 591 enum PicaDataProcTexClamp 592 { 593 // 594 PICA_DATA_PROCTEX_CLAMP_TO_ZERO_DMP = 0x0, 595 // 596 PICA_DATA_PROCTEX_CLAMP_TO_EDGE = 0x1, 597 // 598 PICA_DATA_PROCTEX_SYMMETRICAL_REPEAT_DMP = 0x2, 599 // 600 PICA_DATA_PROCTEX_MIRRORED_REPEAT = 0x3, 601 // 602 PICA_DATA_PROCTEX_PULSE_DMP = 0x4 603 }; 604 605 /* Please see man pages for details 606 607 608 609 */ 610 enum PicaDataProcTexShift 611 { 612 // 613 PICA_DATA_PROCTEX_NONE_DMP = 0x0, 614 // 615 PICA_DATA_PROCTEX_ODD_DMP = 0x1, 616 // 617 PICA_DATA_PROCTEX_EVEN_DMP = 0x2 618 }; 619 620 // PICA_REG_TEXTURE3_PROCTEX0 0x0a8 621 #define PICA_CMD_DATA_PROCTEX0(ptClampU, ptClampV, \ 622 ptRgbMap, ptAlphaMap, ptAlphaSeparate, \ 623 ptNoiseEnable, ptShiftU, ptShiftV, ptTexBiasF16Low8) \ 624 ( (ptClampU) | \ 625 (ptClampV) << 3 | \ 626 (ptRgbMap) << 6 | \ 627 (ptAlphaMap) << 10 | \ 628 (ptAlphaSeparate ? 1 : 0) << 14 | \ 629 (ptNoiseEnable ? 1 : 0) << 15 | \ 630 (ptShiftU) << 16 | \ 631 (ptShiftV) << 18 | \ 632 (ptTexBiasF16Low8) << 20 ) 633 634 635 636 // PICA_REG_TEXTURE3_PROCTEX1 0x0a9 637 #define PICA_CMD_DATA_PROCTEX1(ptNoiseU1, ptNoiseU2) \ 638 ( (ptNoiseU1) << 16 | (ptNoiseU2) ) 639 640 // PICA_REG_TEXTURE3_PROCTEX2 0x0aa 641 #define PICA_CMD_DATA_PROCTEX2(ptNoiseV1, ptNoiseV2) \ 642 ( (ptNoiseV1) << 16 | (ptNoiseV2) ) 643 644 // PICA_REG_TEXTURE3_PROCTEX3 0x0ab 645 #define PICA_CMD_DATA_PROCTEX3(ptNoiseU0, ptNoiseV0) \ 646 ( (ptNoiseU0) | (ptNoiseV0) << 16 ) 647 648 /* 649 struct CommandProcTex4 650 { 651 u32 ptMinFilter : 3; 652 CMD_PADDING(8); // 0x60 653 u32 ptTexWidth : 8; 654 u32 ptTexBias2 : 8; 655 CMD_PADDING(5); 656 }; 657 */ 658 659 /* Please see man pages for details 660 661 662 663 */ 664 enum PicaDataProcTexFilter 665 { 666 // 667 PICA_DATA_PROCTEX_NEAREST = 0x0, 668 // 669 PICA_DATA_PROCTEX_LINEAR = 0x1, 670 // 671 PICA_DATA_PROCTEX_NEAREST_MIPMAP_NEAREST = 0x2, 672 // 673 PICA_DATA_PROCTEX_LINEAR_MIPMAP_NEAREST = 0x3, 674 // 675 PICA_DATA_PROCTEX_NEAREST_MIPMAP_LINEAR = 0x4, 676 // 677 PICA_DATA_PROCTEX_LINEAR_MIPMAP_LINEAR = 0x5 678 }; 679 680 // PICA_REG_TEXTURE3_PROCTEX4 0x0ac 681 #define PICA_CMD_DATA_PROCTEX4(ptMinFilter, ptTexWidth, ptTexBiasF16Hi8) \ 682 ( (ptMinFilter) | \ 683 0x60 << 3 | \ 684 (ptTexWidth) << 11 | \ 685 (ptTexBiasF16Hi8) << 19 ) 686 687 /* 688 struct CommandProcTex5 689 { 690 u32 ptTexOffset : 8; 691 CMD_PADDING(24); // 0xe0c080 692 }; 693 */ 694 695 // PICA_REG_TEXTURE3_PROCTEX5 0x0ad 696 #define PICA_CMD_DATA_PROCTEX5(ptTexOffset) \ 697 ( (ptTexOffset) | 0xe0c08000 ) 698 699 /////////////////////////////////// 700 // Procedural texture Reference Table 701 /* 702 struct CommandProTexRefTab 703 { 704 u32 index : 8; 705 u32 attrib : 4; 706 CMD_PADDING(20); 707 }; 708 */ 709 710 711 /* Please see man pages for details 712 713 714 715 */ 716 enum PicaDataProcTexRefTable 717 { 718 // 719 PICA_DATA_PROCTEX_NOISE_REF_TABLE = 0x0, 720 // 721 PICA_DATA_PROCTEX_RGB_MAP_REF_TABLE = 0x2, 722 // 723 PICA_DATA_PROCTEX_ALPHA_MAP_REF_TABLE = 0x3, 724 // 725 PICA_DATA_PROCTEX_COLOR_REF_TABLE = 0x4, 726 // 727 PICA_DATA_PROCTEX_COLOR_DIFF_REF_TABLE = 0x5 728 }; 729 730 // PICA_REG_PROCTEX_LUT 0x0af 731 #define PICA_CMD_DATA_PROCTEX_LUT(index, refTable) \ 732 ((index) | (refTable) << 8) 733 734 // PICA_REG_PROCTEX_LUT_DATA0 0x0b0 735 // PICA_REG_PROCTEX_LUT_DATA1 0x0b1 736 // PICA_REG_PROCTEX_LUT_DATA2 0x0b2 737 // PICA_REG_PROCTEX_LUT_DATA3 0x0b3 738 // PICA_REG_PROCTEX_LUT_DATA4 0x0b4 739 // PICA_REG_PROCTEX_LUT_DATA5 0x0b5 740 // PICA_REG_PROCTEX_LUT_DATA6 0x0b6 741 // PICA_REG_PROCTEX_LUT_DATA7 0x0b7 742 #define PICA_CMD_DATA_PROCTEX_LUT_DATA(data) (data) 743 744 /////////////////////////////////// 745 // Texture Resolution 746 /* 747 struct CommandTexSize 748 { 749 u32 height : 16; 750 u32 width : 16; 751 }; 752 */ 753 754 // PICA_REG_TEXTURE0_SIZE 0x082 755 // PICA_REG_TEXTURE1_SIZE 0x092 756 // PICA_REG_TEXTURE2_SIZE 0x09a 757 #define PICA_CMD_DATA_TEXTURE_SIZE( width, height ) \ 758 ( (height) | (width) << 16 ) 759 760 /////////////////////////////////// 761 // Texture Format 762 763 /* Please see man pages for details 764 765 766 767 */ 768 enum PicaDataTextureFormat 769 { 770 // 771 PICA_DATA_TEXTURE_FORMAT_RGBA_UNSIGNED_BYTE = 0x0, 772 // 773 PICA_DATA_TEXTURE_FORMAT_SHADOW_UNSIGNED_INT = 0x0, 774 // 775 PICA_DATA_TEXTURE_FORMAT_GAS_DMP_UNSIGNED_SHORT = 0x0, 776 // 777 PICA_DATA_TEXTURE_FORMAT_RGB_UNSIGNED_BYTE = 0x1, 778 // 779 PICA_DATA_TEXTURE_FORMAT_RGBA_UNSIGNED_SHORT_5_5_5_1 = 0x2, 780 // 781 PICA_DATA_TEXTURE_FORMAT_RGB_UNSIGNED_SHORT_5_6_5 = 0x3, 782 // 783 PICA_DATA_TEXTURE_FORMAT_RGBA_UNSIGNED_SHORT_4_4_4_4 = 0x4, 784 // 785 PICA_DATA_TEXTURE_FORMAT_LUMINANCE_ALPHA_UNSIGNED_BYTE = 0x5, 786 // 787 PICA_DATA_TEXTURE_FORMAT_HILO8_DMP_UNSIGNED_BYTE = 0x6, 788 // 789 PICA_DATA_TEXTURE_FORMAT_LUMINANCE_UNSIGNED_BYTE = 0x7, 790 // 791 PICA_DATA_TEXTURE_FORMAT_ALPHA_UNSIGNED_BYTE = 0x8, 792 // 793 PICA_DATA_TEXTURE_FORMAT_LUMINANCE_ALPHA_UNSIGNED_BYTE_4_4_DMP = 0x9, 794 // 795 PICA_DATA_TEXTURE_FORMAT_LUMINANCE_UNSIGNED_4BITS_DMP = 0xa, 796 // 797 PICA_DATA_TEXTURE_FORMAT_ALPHA_UNSIGNED_4BITS_DMP = 0xb, 798 // 799 PICA_DATA_TEXTURE_FORMAT_ETC1_RGB8_NATIVE_DMP = 0xc, 800 // 801 PICA_DATA_TEXTURE_FORMAT_ETC1_ALPHA_RGB8_A4_NATIVE_DMP = 0xd 802 }; 803 804 // PICA_REG_TEXTURE0_FORMAT 0x08e 805 // PICA_REG_TEXTURE1_FORMAT 0x096 806 // PICA_REG_TEXTURE2_FORMAT 0x09e 807 #define PICA_CMD_DATA_TEXTURE_FORMAT_TYPE( type ) (type) 808 809 /////////////////////////////////// 810 // Texture Wrap Mode 811 // Texture Wrap Filter 812 // Texture Sampler 813 // Texture Format 814 // Texture Shadow Enable 815 /* 816 struct CommandTex0WrapFilter 817 { 818 CMD_PADDING(1); 819 u32 magFilter : 1; 820 u32 minFilter1 : 1; 821 CMD_PADDING(1); 822 u32 isETC1 : 2; 823 CMD_PADDING(2); 824 u32 wrapT : 3; 825 CMD_PADDING(1); 826 u32 wrapS : 3; 827 CMD_PADDING(1); 828 CMD_PADDING(2); // set to 0 [17:16] 829 CMD_PADDING(2); 830 u32 enable : 1; 831 CMD_PADDING(3); 832 u32 minFilter2 : 1; 833 CMD_PADDING(3); 834 u32 type1_1 : 3; 835 CMD_PADDING(1); 836 }; 837 */ 838 839 840 /* Please see man pages for details 841 842 843 844 */ 845 enum PicaDataTextureMagFilter 846 { 847 // 848 PICA_DATA_TEXTURE_MAG_FILTER_NEAREST = 0x0, 849 // 850 PICA_DATA_TEXTURE_MAG_FILTER_LINEAR = 0x1 851 }; 852 853 854 /* Please see man pages for details 855 856 857 858 */ 859 enum PicaDataTextureMinFilter 860 { 861 // 862 PICA_DATA_TEXTURE_MIN_FILTER_NEAREST = 0x0, 863 // 864 PICA_DATA_TEXTURE_MIN_FILTER_NEAREST_MIPMAP_NEAREST = 0x1, 865 // 866 PICA_DATA_TEXTURE_MIN_FILTER_NEAREST_MIPMAP_LINEAR = 0x2, 867 // 868 PICA_DATA_TEXTURE_MIN_FILTER_LINEAR = 0x3, 869 // 870 PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_NEAREST = 0x4, 871 // 872 PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_LINEAR = 0x5 873 }; 874 875 #define PICA_CMD_DATA_TEXTURE_MIN_FILTER0(texture0MinFilter) \ 876 ( ( ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR ) || \ 877 ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_NEAREST ) || \ 878 ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_LINEAR ) ) \ 879 ? 1 : 0 ) 880 881 #define PICA_CMD_DATA_TEXTURE_MIN_FILTER1(texture0MinFilter) \ 882 ( ( ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_NEAREST_MIPMAP_LINEAR ) || \ 883 ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_LINEAR ) ) \ 884 ? 1 : 0 ) 885 886 /* Please see man pages for details 887 888 889 890 */ 891 enum PicaDataTextureWrap 892 { 893 // 894 PICA_DATA_TEXTURE_WRAP_CLAMP_TO_EDGE = 0, 895 // 896 PICA_DATA_TEXTURE_WRAP_CLAMP_TO_BORDER = 1, 897 // 898 PICA_DATA_TEXTURE_WRAP_REPEAT = 2, 899 // 900 PICA_DATA_TEXTURE_WRAP_MIRRORED_REPEAT = 3 901 }; 902 903 904 #define PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 905 textureFormat, textureWrapT, textureWrapS, \ 906 useShadowTexture, textureSamplerType ) \ 907 ( (textureMagFilter) << 1 | \ 908 PICA_CMD_DATA_TEXTURE_MIN_FILTER0(textureMinFilter) << 2 | \ 909 ((textureFormat == PICA_DATA_TEXTURE_FORMAT_ETC1_RGB8_NATIVE_DMP) ? 2 : 0 ) << 4 | \ 910 (textureWrapT) << 8 | \ 911 (textureWrapS) << 12 | \ 912 0 << 16 | \ 913 (useShadowTexture) << 20 | \ 914 PICA_CMD_DATA_TEXTURE_MIN_FILTER1(textureMinFilter) << 24 | \ 915 (textureSamplerType) << 28 ) 916 917 #define PICA_CMD_DATA_TEXTURE0_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 918 textureFormat, textureWrapT, textureWrapS, \ 919 useShadowTexture, textureSamplerType ) \ 920 PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 921 textureFormat, textureWrapT, textureWrapS, \ 922 useShadowTexture, textureSamplerType ) 923 924 #define PICA_CMD_DATA_TEXTURE1_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 925 textureFormat, textureWrapT, textureWrapS) \ 926 PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 927 textureFormat, textureWrapT, textureWrapS, \ 928 0x0, 0x0) 929 930 #define PICA_CMD_DATA_TEXTURE2_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 931 textureFormat, textureWrapT, textureWrapS ) \ 932 PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter, \ 933 textureFormat, textureWrapT, textureWrapS, \ 934 0x0, 0x0) 935 936 /* 937 struct CommandTex12WrapFilter 938 { 939 CMD_PADDING(1); 940 u32 magFilter : 1; 941 u32 minFilter1 : 1; 942 CMD_PADDING(1); 943 u32 isETC1 : 2; 944 CMD_PADDING(2); 945 u32 wrapT : 3; 946 CMD_PADDING(1); 947 u32 wrapS : 3; 948 CMD_PADDING(2); // set to 0 [17:16] 949 CMD_PADDING(7); 950 u32 minFilter2 : 1; 951 CMD_PADDING(7); 952 }; 953 */ 954 955 /////////////////////////////////// 956 // Texture LOD Level 957 // Texture LOD Bias 958 /* 959 struct CommandTexLODLev 960 { 961 u32 bias : 12; 962 u32 max : 4; 963 CMD_PADDING(4); 964 u32 min : 4; 965 CMD_PADDING(4); 966 }; 967 */ 968 969 // PICA_REG_TEXTURE0_LOD 0x084 970 // PICA_REG_TEXTURE1_LOD 0x094 971 // PICA_REG_TEXTURE2_LOD 0x09c 972 #define PICA_CMD_DATA_TEXTURE_LOD_LEVEL(lodBias, maxLodLevel, minLodLevel) \ 973 ( (lodBias) | \ 974 (maxLodLevel) << 16 | \ 975 (((minLodLevel) < 0) ? 0 : (minLodLevel)) << 24 ) 976 977 /////////////////////////////////// 978 // Texture Border Color 979 980 // PICA_REG_TEXTURE0_BORDER_COLOR 0x081 981 // PICA_REG_TEXTURE1_BORDER_COLOR 0x091 982 // PICA_REG_TEXTURE2_BORDER_COLOR 0x099 983 #define PICA_CMD_DATA_BORDER_COLOR( color8 ) \ 984 ( (color8.r) | \ 985 (color8.g) << 8 | \ 986 (color8.b) << 16 | \ 987 (color8.a) << 24 ) 988 989 /* 990 991 */ 992 993 #endif // NN_GX_CTR_PICA_MACRO_TEXTURE_H_ 994