Searched refs:REG_G3X_VECMTX_RESULT_5_DECIMAL_m5_SHIFT (Results 1 – 2 of 2) sorted by relevance
3978 #define REG_G3X_VECMTX_RESULT_5_DECIMAL_m5_SHIFT 0 macro3987 ((u32)(decimal_m5) << REG_G3X_VECMTX_RESULT_5_DECIMAL_m5_SHIFT))