Searched refs:REG_G3X_VECMTX_RESULT_0_INTEGER_m0_SHIFT (Results 1 – 2 of 2) sorted by relevance
3859 #define REG_G3X_VECMTX_RESULT_0_INTEGER_m0_SHIFT 12 macro3871 ((u32)(integer_m0) << REG_G3X_VECMTX_RESULT_0_INTEGER_m0_SHIFT) | \