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Searched refs:CTRDG_BACKUP_COM_ADR1 (Results 1 – 5 of 5) sorted by relevance

/TwlSDK-5.5/build/libraries/ctrdg/ARM9/src/
Dctrdg_flash_MX29L010.c120 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashChipCoreMX()
122 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x80; in CTRDGi_EraseFlashChipCoreMX()
123 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashChipCoreMX()
125 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x10; in CTRDGi_EraseFlashChipCoreMX()
174 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashSectorCoreMX()
176 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x80; in CTRDGi_EraseFlashSectorCoreMX()
177 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashSectorCoreMX()
212 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_ProgramFlashByteMX()
214 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xa0; in CTRDGi_ProgramFlashByteMX()
Dctrdg_flash_LE39FW512.c29 #define CTRDG_BACKUP_COM_ADR1 (CTRDG_AGB_FLASH_ADR+0x00005555) macro
137 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashChipCoreLE()
139 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x80; in CTRDGi_EraseFlashChipCoreLE()
140 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashChipCoreLE()
142 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x10; in CTRDGi_EraseFlashChipCoreLE()
183 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashSectorCoreLE()
185 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x80; in CTRDGi_EraseFlashSectorCoreLE()
186 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashSectorCoreLE()
210 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_ProgramFlashByteLE()
212 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xa0; in CTRDGi_ProgramFlashByteLE()
Dctrdg_flash_common.c58 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_SetFlashBankMx()
60 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xb0; in CTRDGi_SetFlashBankMx()
72 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_ReadFlashID()
74 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x90; in CTRDGi_ReadFlashID()
91 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_ReadFlashID()
93 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xf0; in CTRDGi_ReadFlashID()
96 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xf0; in CTRDGi_ReadFlashID()
169 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xf0; // Command reset in CTRDGi_PollingSR512kCOMMON()
215 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xf0; // Command reset in CTRDGi_PollingSR1MCOMMON()
230 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xf0; // Command reset in CTRDGi_PollingSR1MCOMMON()
Dctrdg_flash_AT29LV512.c23 #define CTRDG_BACKUP_COM_ADR1 (CTRDG_AGB_FLASH_ADR+0x00005555) macro
132 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashChipCoreAT()
134 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x80; in CTRDGi_EraseFlashChipCoreAT()
135 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashChipCoreAT()
137 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0x10; in CTRDGi_EraseFlashChipCoreAT()
183 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_EraseFlashSectorCoreAT()
185 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xa0; in CTRDGi_EraseFlashSectorCoreAT()
265 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xaa; in CTRDGi_WriteFlashSectorCoreAT()
267 *(vu8 *)CTRDG_BACKUP_COM_ADR1 = 0xa0; in CTRDGi_WriteFlashSectorCoreAT()
/TwlSDK-5.5/include/nitro/ctrdg/ARM9/
Dctrdg_backup.h44 #define CTRDG_BACKUP_COM_ADR1 (CTRDG_AGB_FLASH_ADR+0x00005555) macro