Searched refs:REG_VECMTX_RESULT_0_ADDR (Results 1 – 3 of 3) sorted by relevance
390 MI_Copy36B((void *)(REG_VECMTX_RESULT_0_ADDR), &m->_00); in G3X_GetVectorMtx()392 m->_00 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 0); in G3X_GetVectorMtx()393 m->_01 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 1); in G3X_GetVectorMtx()394 m->_02 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 2); in G3X_GetVectorMtx()396 m->_10 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 3); in G3X_GetVectorMtx()397 m->_11 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 4); in G3X_GetVectorMtx()398 m->_12 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 5); in G3X_GetVectorMtx()400 m->_20 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 6); in G3X_GetVectorMtx()401 m->_21 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 7); in G3X_GetVectorMtx()402 m->_22 = *((fx32 *)REG_VECMTX_RESULT_0_ADDR + 8); in G3X_GetVectorMtx()
757 #define REG_VECMTX_RESULT_0_ADDR (HW_REG_BASE + REG_VECMTX_RESULT_0_OFFSE… macro758 …reg_G3X_VECMTX_RESULT_0 (*(const REGType32v *) REG_VECMTX_RESULT_0_ADDR)