Searched refs:REG_G3X_VECMTX_RESULT_7_DECIMAL_m7_SHIFT (Results 1 – 2 of 2) sorted by relevance
4024 #define REG_G3X_VECMTX_RESULT_7_DECIMAL_m7_SHIFT 0 macro4033 ((u32)(decimal_m7) << REG_G3X_VECMTX_RESULT_7_DECIMAL_m7_SHIFT))