Searched refs:REG_G3X_VECMTX_RESULT_0_DECIMAL_m0_SHIFT (Results 1 – 2 of 2) sorted by relevance
3863 #define REG_G3X_VECMTX_RESULT_0_DECIMAL_m0_SHIFT 0 macro3872 ((u32)(decimal_m0) << REG_G3X_VECMTX_RESULT_0_DECIMAL_m0_SHIFT))