Searched refs:HW_WRAM_BASE (Results 1 – 2 of 2) sorted by relevance
71 #define HW_WRAM_BASE 0x03000000 macro85 #define HW_WRAM_0 (HW_WRAM_BASE + HW_WRAM_A_SIZE)94 #define HW_WRAM_B (HW_WRAM_BASE + HW_WRAM_B_OFFSET)100 #define HW_WRAM_C (HW_WRAM_BASE + HW_WRAM_C_OFFSET)
495 …return HW_WRAM_BASE + (((wramReg & REG_MI_MBK6_WA_SADDR_MASK) >> REG_MI_MBK6_WA_SADDR_SHIFT) << 16… in MI_GetWramMapStart_A()504 …return HW_WRAM_BASE + (((wramReg & REG_MI_MBK7_WB_SADDR_MASK) >> REG_MI_MBK7_WB_SADDR_SHIFT) << 15… in MI_GetWramMapStart_B()513 …return HW_WRAM_BASE + (((wramReg & REG_MI_MBK8_WC_SADDR_MASK) >> REG_MI_MBK8_WC_SADDR_SHIFT) << 15… in MI_GetWramMapStart_C()545 …return (HW_WRAM_BASE-1) + (((wramReg & REG_MI_MBK6_WA_EADDR_MASK) >> REG_MI_MBK6_WA_EADDR_SHIFT) <… in MI_GetWramMapEnd_A()554 …return (HW_WRAM_BASE-1) + (((wramReg & REG_MI_MBK7_WB_EADDR_MASK) >> REG_MI_MBK7_WB_EADDR_SHIFT) <… in MI_GetWramMapEnd_B()563 …return (HW_WRAM_BASE-1) + (((wramReg & REG_MI_MBK8_WC_EADDR_MASK) >> REG_MI_MBK8_WC_EADDR_SHIFT) <… in MI_GetWramMapEnd_C()