| /TwlSDK-5.2.1/build/libraries/mi/common.TWL/src/ |
| D | mi_sharedWram.c | 108 void MIi_SetWramBank( MIWramPos wram, int num, MIWramProc proc, MIWramOffset offset, MIWramEnable e… in MIi_SetWramBank() argument
115 SDK_ASSERT( 0<=wram && wram<3 ); in MIi_SetWramBank()
116 (f[wram])( num, proc, offset, enable ); in MIi_SetWramBank()
146 static vu8 MIi_GetWramBank( MIWramPos wram, int num ) in MIi_GetWramBank() argument
153 SDK_ASSERT( 0<=wram && wram<3 ); in MIi_GetWramBank()
154 return (f[wram])( num ); in MIi_GetWramBank()
196 void MIi_SetWramBankMaster( MIWramPos wram, int num, MIWramProc proc ) in MIi_SetWramBankMaster() argument
202 SDK_ASSERT( 0<=wram && wram<3 ); in MIi_SetWramBankMaster()
203 (f[wram])( num, proc ); in MIi_SetWramBankMaster()
244 void MIi_SetWramBankEnable( MIWramPos wram, int num, MIWramEnable enable ) in MIi_SetWramBankEnable() argument
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| /TwlSDK-5.2.1/include/twl/mi/common/ |
| D | sharedWram.h | 175 void MIi_SetWramBank( MIWramPos wram, int num, MIWramProc proc, MIWramOffset offset, MIWramEnable e…
180 void MIi_SetWramBankMaster( MIWramPos wram, int num, MIWramProc proc );
185 void MIi_SetWramBankEnable( MIWramPos wram, int num, MIWramEnable enable );
200 vu8 MIi_GetWramBank( MIWramPos wram, int num );
218 MIWramProc MI_GetWramBankMaster( MIWramPos wram, int num );
249 MIWramOffset MI_GetWramBankOffset( MIWramPos wram, int num );
267 MIWramEnable MI_GetWramBankEnable( MIWramPos wram, int num );
316 u32 MI_GetWramMapStart( MIWramPos wram );
334 u32 MI_GetWramMapEnd( MIWramPos wram );
351 MIWramImage MI_GetWramMapImage( MIWramPos wram );
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| /TwlSDK-5.2.1/include/twl/dsp/ARM9/ |
| D | process.h | 171 SDK_INLINE int DSP_GetProcessSlotFromSegment(const DSPProcessContext *context, MIWramPos wram, int … in DSP_GetProcessSlotFromSegment() argument
173 …return (wram == MI_WRAM_B) ? context->slotOfSegmentCode[segment] : context->slotOfSegmentData[segm… in DSP_GetProcessSlotFromSegment()
187 SDK_INLINE void* DSP_ConvertProcessAddressFromDSP(const DSPProcessContext *context, MIWramPos wram,… in DSP_ConvertProcessAddressFromDSP() argument
191 int slot = DSP_GetProcessSlotFromSegment(context, wram, segment); in DSP_ConvertProcessAddressFromDSP()
193 return (u8*)MI_GetWramMapStart(wram) + slot * DSP_WRAM_SLOT_SIZE + mod * 2; in DSP_ConvertProcessAddressFromDSP()
207 u32 DSP_AttachProcessMemory(DSPProcessContext *context, MIWramPos wram, int slots);
219 void DSP_DetachProcessMemory(DSPProcessContext *context, MIWramPos wram, int slots);
234 BOOL DSP_SwitchProcessMemory(DSPProcessContext *context, MIWramPos wram, u32 address, u32 length, M…
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| /TwlSDK-5.2.1/build/libraries/dsp/ARM9.TWL/src/ |
| D | dsp_process.c | 194 static BOOL DSPi_CommitWram(DSPProcessContext *context, MIWramPos wram, int segment, MIWramProc to) in DSPi_CommitWram() argument
197 int slot = DSP_GetProcessSlotFromSegment(context, wram, segment); in DSPi_CommitWram()
199 if (!MI_IsWramSlotUsed(wram, slot) || in DSPi_CommitWram()
200 MI_FreeWramSlot(wram, slot, MI_WRAM_SIZE_32KB, MI_GetWramBankMaster(wram, slot)) > 0) in DSPi_CommitWram()
203 void *physicalAddr = (void *)MI_AllocWramSlot(wram, slot, MI_WRAM_SIZE_32KB, to); in DSPi_CommitWram()
207 … vu8 *bank = &((vu8*)((wram == MI_WRAM_B) ? REG_MBK_B0_ADDR : REG_MBK_C0_ADDR))[slot]; in DSPi_CommitWram()
325 MIWramPos wram = wrams[i]; in DSPi_MapAndLoadProcessImageCallback() local
337 if (DSP_GetProcessSlotFromSegment(context, wram, dstofs / DSP_WRAM_SLOT_SIZE) == -1) in DSPi_MapAndLoadProcessImageCallback()
340 u16 *slots = (wram == MI_WRAM_B) ? &context->slotB : &context->slotC; in DSPi_MapAndLoadProcessImageCallback()
341 … int *segbits = (wram == MI_WRAM_B) ? &context->segmentCode : &context->segmentData; in DSPi_MapAndLoadProcessImageCallback()
[all …]
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| /TwlSDK-5.2.1/include/twl/hw/ARM9/tmp/ |
| D | ioreg_CFG.h | 117 #define REG_CFG_CLK_FIELD( cam_cki, wram, cam, dsp, arm2x ) \ argument
120 ((u32)(wram) << REG_CFG_CLK_WRAM_SHIFT) | \
233 #define REG_CFG_TWL_EX_FIELD( cfg_e, wram, mc_b, dsp, cam, dma4 ) \ argument
236 ((u32)(wram) << REG_CFG_TWL_EX_WRAM_SHIFT) | \
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| /TwlSDK-5.2.1/include/nitro/specfiles/ |
| D | ARM7-TEG.lsf | 21 # Add .wram
58 Object * (.wram)
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| D | ARM7-TS.lcf.template | 18 # Added .wram.bss
45 # Added * (.wram) on static segment
174 <FOREACH.STATIC.OBJECTS=.wram>
175 <STATIC.OBJECT=.wram:t>
177 <FOREACH.STATIC.LIBRARIES=.wram>
178 <STATIC.LIBRARY=.wram:t>
297 <FOREACH.AUTOLOAD.OBJECTS=.wram>
298 <AUTOLOAD.OBJECT=.wram:t>
300 <FOREACH.AUTOLOAD.LIBRARIES=.wram>
301 <AUTOLOAD.LIBRARY=.wram:t>
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| D | ARM7-TS.lcf | 30 # Add .wram section
70 * (.wram)
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| D | ARM7-TEG.lcf | 27 # Add .wram section
82 * (.wram)
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| D | ARM7-TEG.lcf.template | 39 # Added * (.wram) on static segment
208 <FOREACH.STATIC.OBJECTS=.wram>
209 <STATIC.OBJECT=.wram:t>
211 <FOREACH.STATIC.LIBRARIES=.wram>
212 <STATIC.LIBRARY=.wram:t>
331 <FOREACH.AUTOLOAD.OBJECTS=.wram>
332 <AUTOLOAD.OBJECT=.wram:t>
334 <FOREACH.AUTOLOAD.LIBRARIES=.wram>
335 <AUTOLOAD.LIBRARY=.wram:t>
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| D | ARM7-TS.lsf | 75 Object * (.wram)
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| /TwlSDK-5.2.1/include/twl/hw/ARM9/ |
| D | ioreg_SCFG.h | 195 #define REG_SCFG_EXT_FIELD( cfg, wram, mc_b, dsp, cam, dmac, psram, vram, lcdc, intc, mc, div, g2de… argument
198 ((u32)(wram) << REG_SCFG_EXT_WRAM_SHIFT) | \
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| /TwlSDK-5.2.1/include/twl/specfiles/ |
| D | ARM7-TS.lsf | 42 Object * (.wram)
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| D | ARM7-TS.lcf.template | 277 <FOREACH.AUTOLOAD.OBJECTS=.wram>
278 <AUTOLOAD.OBJECT=.wram:t>
280 <FOREACH.AUTOLOAD.LIBRARIES=.wram>
281 <AUTOLOAD.LIBRARY=.wram:t>
324 <FOREACH.AUTOLOAD.OBJECTS=.wram>
325 <AUTOLOAD.OBJECT=.wram.bss:t>
327 <FOREACH.AUTOLOAD.LIBRARIES=.wram>
328 <AUTOLOAD.LIBRARY=.wram.bss:t>
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| /TwlSDK-5.2.1/build/tools/makelcf/ |
| D | spec.l | 179 <PARAM>(WRAM|wram|Wram) {
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| /TwlSDK-5.2.1/build/tools/makelcf.TWL/ |
| D | spec.l | 100 <PARAM>(WRAM|wram|Wram) {
|