Searched refs:REG_G3X_VECMTX_RESULT_7_INTEGER_m7_SHIFT (Results 1 – 2 of 2) sorted by relevance
4020 #define REG_G3X_VECMTX_RESULT_7_INTEGER_m7_SHIFT 12 macro4032 ((u32)(integer_m7) << REG_G3X_VECMTX_RESULT_7_INTEGER_m7_SHIFT) | \