Searched refs:HW_C1_ICACHE_ENABLE (Results 1 – 4 of 4) sorted by relevance
| /TwlSDK-5.2.1/build/libraries/os/ARM9/src/ |
| D | os_cache.c | 392 and r0, r1, #HW_C1_ICACHE_ENABLE in IC_Enable()
394 orr r1, r1, #HW_C1_ICACHE_ENABLE in IC_Enable()
411 and r0, r1, #HW_C1_ICACHE_ENABLE in IC_Disable()
413 bic r1, r1, #HW_C1_ICACHE_ENABLE in IC_Disable()
432 movne r2, #HW_C1_ICACHE_ENABLE in IC_Restore()
435 and r0, r1, #HW_C1_ICACHE_ENABLE in IC_Restore()
437 bic r1, r1, #HW_C1_ICACHE_ENABLE in IC_Restore()
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| /TwlSDK-5.2.1/include/nitro/hw/common/ |
| D | armArch.h | 90 #define HW_C1_ICACHE_ENABLE 0x00001000 // Enable instruction cache macro
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| /TwlSDK-5.2.1/build/libraries/init/ARM9/src/ |
| D | crt0.c | 453 ldr r1, =HW_C1_ICACHE_ENABLE | HW_C1_DCACHE_ENABLE \ in init_cp15()
618 ldr r1,=HW_C1_ICACHE_ENABLE | HW_C1_DCACHE_ENABLE | HW_C1_CACHE_ROUND_ROBIN \ in init_cp15()
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| /TwlSDK-5.2.1/build/libraries/init/ARM9.TWL/src/ |
| D | crt0.FLX.c | 444 | HW_C1_ICACHE_ENABLE \ in INITi_InitCoprocessor()
624 ldr r1, = HW_C1_ICACHE_ENABLE \ in INITi_InitRegion()
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