Searched refs:REG_MI_NDMA0BCNT_PS_SHIFT (Results 1 – 2 of 2) sorted by relevance
148 #define MI_NDMA_INTERVAL_PS_1 (0UL << REG_MI_NDMA0BCNT_PS_SHIFT) // system clock (3…149 #define MI_NDMA_INTERVAL_PS_4 (1UL << REG_MI_NDMA0BCNT_PS_SHIFT) // system clock x 4150 #define MI_NDMA_INTERVAL_PS_16 (2UL << REG_MI_NDMA0BCNT_PS_SHIFT) // system clock x 16151 #define MI_NDMA_INTERVAL_PS_64 (3UL << REG_MI_NDMA0BCNT_PS_SHIFT) // system clock x 64
1034 #define REG_MI_NDMA0BCNT_PS_SHIFT 16 macro1045 ((u32)(ps) << REG_MI_NDMA0BCNT_PS_SHIFT) | \