Searched refs:REG_MI_DMA0CNT_I_SHIFT (Results 1 – 3 of 3) sorted by relevance
210 #define REG_MI_DMA0CNT_I_SHIFT 30 macro242 ((u32)(i) << REG_MI_DMA0CNT_I_SHIFT) | \
46 #define MI_DMA_IF_ENABLE (1UL << REG_MI_DMA0CNT_I_SHIFT) // interrupt enable47 #define MI_DMA_IF_DISABLE (0UL << REG_MI_DMA0CNT_I_SHIFT) // interrupt enable
690 #define REG_MI_DMA0CNT_I_SHIFT 30 macro722 ((u32)(i) << REG_MI_DMA0CNT_I_SHIFT) | \