Searched refs:REG_GXFIFO_ADDR (Results 1 – 7 of 7) sorted by relevance
| /TwlSDK-5.1.0/build/libraries/mi/common/src/ |
| D | mi_dma_gxcommand.c | 86 MIi_DmaSetParameters(dmaNo, currentSrc, (u32)REG_GXFIFO_ADDR, MI_CNT_SEND32(length), 0); in MI_SendGXCommand()
195 …MIi_DmaSetParameters(MIi_GXDmaParams.dmaNo, src, (u32)REG_GXFIFO_ADDR, MI_CNT_SEND32_IF(length), 0… in MIi_FIFOCallback()
200 … MIi_DmaSetParameters(MIi_GXDmaParams.dmaNo, src, (u32)REG_GXFIFO_ADDR, MI_CNT_SEND32(length), 0); in MIi_FIFOCallback()
259 MIi_DmaSetParameters(dmaNo, (u32)src, (u32)REG_GXFIFO_ADDR, MI_CNT_GXCOPY(commandLength), 0); in MI_SendGXCommandFast()
311 MIi_DmaSetParameters(dmaNo, (u32)src, (u32)REG_GXFIFO_ADDR, MI_CNT_GXCOPY_IF(commandLength), 0); in MI_SendGXCommandAsyncFast()
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| /TwlSDK-5.1.0/build/libraries/mi/common.TWL/src/ |
| D | mi_ndma_gxcommand.c | 87 …ig_Dev(MIi_NDMA_TYPE_GXCOPY, ndmaNo, (const void*)currentSrc, (void*)REG_GXFIFO_ADDR, 0/*not used*… in MI_SendNDmaGXCommand()
202 (void*)REG_GXFIFO_ADDR, in MIi_FIFOCallback()
269 (void*)REG_GXFIFO_ADDR, in MI_SendNDmaGXCommandFast()
324 (void*)REG_GXFIFO_ADDR, in MI_SendNDmaGXCommandAsyncFast()
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| /TwlSDK-5.1.0/build/libraries/mi/common/include/ |
| D | dma_red.h | 291 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
298 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR ( \
306 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
313 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
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| /TwlSDK-5.1.0/build/libraries/os/common/include/ |
| D | dma_red.h | 291 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
298 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR ( \
306 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
313 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
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| /TwlSDK-5.1.0/build/libraries/init/common/include/ |
| D | dma_red.h | 291 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
298 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR ( \
306 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
313 __MI_DmaSetAsync(dmaNo, srcp, REG_GXFIFO_ADDR, ( \
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| /TwlSDK-5.1.0/include/twl/hw/ARM9/ |
| D | ioreg_G3X.h | 589 #define REG_GXFIFO_ADDR (HW_REG_BASE + REG_GXFIFO_OFFSET) macro
590 #define reg_G3X_GXFIFO (*( REGType32v *) REG_GXFIFO_ADDR)
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| /TwlSDK-5.1.0/include/nitro/hw/ARM9/ |
| D | ioreg_G3X.h | 589 #define REG_GXFIFO_ADDR (HW_REG_BASE + REG_GXFIFO_OFFSET) macro
590 #define reg_G3X_GXFIFO (*( REGType32v *) REG_GXFIFO_ADDR)
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