Home
last modified time | relevance | path

Searched refs:MI_WRAM_B_MAX_NUM (Results 1 – 6 of 6) sorted by relevance

/TwlSDK-5.1.0/build/libraries/mi/common.TWL/src/
Dmi_sharedWram.c92 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MIi_SetWramBank_B()
136 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MIi_GetWramBank_B()
184 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MIi_SetWramBankMaster_B()
232 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MIi_SetWramBankEnable_B()
276 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MI_GetWramBankMaster_B()
328 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MI_GetWramBankOffset_B()
367 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MI_GetWramBankEnable_B()
648 SDK_ASSERT( 0<=num && num<MI_WRAM_B_MAX_NUM ); in MI_IsWramSlotLocked_B()
734 u16 wram[3][MI_WRAM_B_MAX_NUM];
854 for( n=0; n<MI_WRAM_B_MAX_NUM; n++ ) in MIi_InitWramManager()
[all …]
/TwlSDK-5.1.0/build/libraries/dsp/ARM9.TWL/src/
Ddsp_process.c344 if (slot >= MI_WRAM_B_MAX_NUM) in DSPi_MapAndLoadProcessImageCallback()
414 for (segment = 0; segment < MI_WRAM_B_MAX_NUM; ++segment) in DSP_InitProcessContext()
493 for (segment = 0; segment < MI_WRAM_B_MAX_NUM; ++segment) in DSP_AttachProcessMemory()
531 for (segment = 0; segment < MI_WRAM_B_MAX_NUM; ++segment) in DSP_DetachProcessMemory()
594 const u32 dspMemSize = DSP_ADDR_TO_DSP(DSP_WRAM_SLOT_SIZE) * MI_WRAM_B_MAX_NUM; in DSP_MapAndLoadProcessImage()
941 for (segment = 0; segment < MI_WRAM_B_MAX_NUM; ++segment) in DSPi_MapProcessSlotDefault()
946 if (slot >= MI_WRAM_B_MAX_NUM) in DSPi_MapProcessSlotDefault()
985 for (segment = 0; segment < MI_WRAM_B_MAX_NUM; ++segment) in DSP_IsProcessMemoryReady()
1120 const u32 dspMemSize = DSP_ADDR_TO_DSP(DSP_WRAM_SLOT_SIZE) * MI_WRAM_B_MAX_NUM; in DSP_LoadProcessImage()
/TwlSDK-5.1.0/build/demos.TWL/mi/wramManager-1/src/
Dmain.c172 for( n=0; n<MI_WRAM_B_MAX_NUM; n++ ) in DisplayWramStatus()
177 for( n=0; n<MI_WRAM_B_MAX_NUM; n++ ) in DisplayWramStatus()
/TwlSDK-5.1.0/include/twl/dsp/ARM9/
Dprocess.h192 SDK_ASSERT((slot >= 0) && (slot < MI_WRAM_B_MAX_NUM)); in DSP_ConvertProcessAddressFromDSP()
/TwlSDK-5.1.0/include/twl/mi/common/
DsharedWram.h36 #define MI_WRAM_B_MAX_NUM 8 macro
396 else if (slot < MI_WRAM_B_MAX_NUM + MI_WRAM_C_MAX_NUM) in MIi_AddressToWramSlot()
/TwlSDK-5.1.0/build/libraries/dsp/common/src/
Ddsp_if.c546 for (segment = 0; segment < MI_WRAM_B_MAX_NUM; ++segment) in DSPi_MapProcessSlotAsStraight()