Searched refs:MI_DMA_ENABLE (Results 1 – 8 of 8) sorted by relevance
106 MI_DMA_ENABLE | MI_DMA_TIMING_IMM | \115 MI_DMA_ENABLE | MI_DMA_TIMING_IMM | \155 MI_DMA_ENABLE | MI_DMA_TIMING_IMM | \162 MI_DMA_ENABLE | MI_DMA_TIMING_IMM | \200 MI_DMA_ENABLE | MI_DMA_TIMING_H_BLANK | \208 MI_DMA_ENABLE | MI_DMA_TIMING_H_BLANK | \238 MI_DMA_ENABLE | MI_DMA_TIMING_V_BLANK | \245 MI_DMA_ENABLE | MI_DMA_TIMING_V_BLANK | \274 MI_DMA_ENABLE | MI_DMA_TIMING_DISP_MMEM | \292 MI_DMA_ENABLE | MI_DMA_TIMING_GXFIFO | \[all …]
148 #define MIi_DUMMY_CNT ( MI_DMA_ENABLE | MI_DMA_SRC_FIX | MI_DMA_DEST_FIX | MI_DMA_16BIT_BUS | …
245 #define MIi_DUMMY_CNT ( MI_DMA_ENABLE | MI_DMA_SRC_FIX | MI_DMA_DEST_FIX | MI_DMA_16BIT_BUS | …
44 #define MI_DMA_ENABLE (1UL << REG_MI_DMA0CNT_E_SHIFT) // DMA enable macro117 #define MI_DMA_IMM16ENABLE ( MI_DMA_ENABLE | MI_DMA_TIMING_IMM | MI_DMA_16BIT_BUS )118 #define MI_DMA_IMM32ENABLE ( MI_DMA_ENABLE | MI_DMA_TIMING_IMM | MI_DMA_32BIT_BUS )179 # define MI_CNT_HBCOPY16(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_H_BLANK | MI_DMA_SRC_INC | MI_DM…180 # define MI_CNT_HBCOPY32(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_H_BLANK | MI_DMA_SRC_INC | MI_DM…186 #define MI_CNT_VBCOPY16(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_V_BLANK | MI_DMA_SRC_INC | MI_DM…187 #define MI_CNT_VBCOPY32(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_V_BLANK | MI_DMA_SRC_INC | MI_DM…193 #define MI_CNT_CARDRECV32(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_CARD | MI_DMA_SRC_FIX | MI_DMA_D…198 # define MI_CNT_MMCOPY(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_DISP_MMEM | MI_DMA_SRC_INC | MI_…203 # define MI_CNT_GXCOPY(size) ( MI_DMA_ENABLE | MI_DMA_TIMING_GXFIFO | MI_DMA_SRC_INC | MI_DMA…
1261 *dmaCntp &= ~MI_DMA_ENABLE; in MI_StopDma()1319 *dmaCntp |= MI_DMA_ENABLE; in MI_DmaRestart()1357 if ((dmaCnt & MI_DMA_ENABLE) == 0) in MIi_CheckAnotherAutoDMA()