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Searched refs:HW_DCACHE_SIZE (Results 1 – 4 of 4) sorted by relevance

/TwlSDK-5.1.0/include/nitro/hw/common/
DarmArch.h27 #define HW_DCACHE_SIZE 0x1000 // Data cache macro
/TwlSDK-5.1.0/build/libraries/os/ARM9/src/
Dos_cache.c130 cmp r0, #HW_DCACHE_SIZE/4 in DC_StoreAll()
163 cmp r0, #HW_DCACHE_SIZE/4 in DC_FlushAll()
/TwlSDK-5.1.0/build/libraries/os/common/src/
Dos_reset.c797 cmp r0, #(HW_DCACHE_SIZE / 4) in OSi_ReloadTwlRomData()
/TwlSDK-5.1.0/build/libraries/init/ARM9.TWL/src/
Dcrt0.FLX.c412 cmp r2, #HW_DCACHE_SIZE / 4 in INITi_InitCoprocessor()