Home
last modified time | relevance | path

Searched refs:c2 (Results 1 – 3 of 3) sorted by relevance

/CTR-SDK-1.3.0/CTR_SDK/include/nn/util/
Dutil_Result.h84 #define NN_UTIL_RETURN_IF_FAILED_2(result, c1, c2) NN_UTIL_RETURN_IF_FAILED_BASE(result,c1,c2,,,) argument
85 #define NN_UTIL_RETURN_IF_FAILED_3(result, c1, c2, c3) NN_UTIL_RETURN_IF_FAILED_BASE(result,c1,c2,c… argument
86 #define NN_UTIL_RETURN_IF_FAILED_4(result, c1, c2, c3, c4) NN_UTIL_RETURN_IF_FAILED_BASE(result,c1,… argument
87 #define NN_UTIL_RETURN_IF_FAILED_5(result, c1, c2, c3, c4, c5) NN_UTIL_RETURN_IF_FAILED_BASE(result… argument
/CTR-SDK-1.3.0/CTR_SDK/include/nn/hw/ARM/
Dreg_access.h66 #define HW_GET_CP15_C2(o,v) HW_INST_MRC(p15,0,c2,c0,o,v) // Opcode_1 and CRm are fixed
99 #define HW_SET_CP15_C2(o,v) HW_INST_MCR(p15,0,c2,c0,o,v) // Opcode_1 and CRm are fixed
129 #define HW_GET_CP15_ISAR0(v) HW_INST_MRC(p15,0,c0,c2,0,v)
130 #define HW_GET_CP15_ISAR1(v) HW_INST_MRC(p15,0,c0,c2,1,v)
131 #define HW_GET_CP15_ISAR2(v) HW_INST_MRC(p15,0,c0,c2,2,v)
132 #define HW_GET_CP15_ISAR3(v) HW_INST_MRC(p15,0,c0,c2,3,v)
133 #define HW_GET_CP15_ISAR4(v) HW_INST_MRC(p15,0,c0,c2,4,v)
139 #define HW_GET_CP15_TTB0(v) HW_INST_MRC(p15,0,c2,c0,0,v)
140 #define HW_GET_CP15_TTB1(v) HW_INST_MRC(p15,0,c2,c0,1,v)
141 #define HW_GET_CP15_TTB_CONTROL(v) HW_INST_MRC(p15,0,c2,c0,2,v)
[all …]
/CTR-SDK-1.3.0/CTR_SDK/include/nn/gx/CTR/
Dgx_MacroShader.h445 #define PICA_CMD_SET_VS_FIXED_ATTR(order, c0, c1, c2) \ argument
448 (u32)(c2), PICA_CMD_DATA_ZERO()