1 /*---------------------------------------------------------------------------*
2   Project:  TwlSDK - include - twl - HW - ARM9
3   File:     mmap_main.h
4 
5   Copyright 2007-2008 Nintendo.  All rights reserved.
6 
7   These coded instructions, statements, and computer programs contain
8   proprietary information of Nintendo of America Inc. and/or Nintendo
9   Company Ltd., and are protected by Federal copyright law.  They may
10   not be disclosed to third parties or copied or duplicated in any form,
11   in whole or in part, without the prior written consent of Nintendo.
12 
13   $Date:: 2008-09-17#$
14   $Rev: 8556 $
15   $Author: okubata_ryoma $
16  *---------------------------------------------------------------------------*/
17 #ifndef TWL_HW_ARM9_MMAP_MAIN_H_
18 #define TWL_HW_ARM9_MMAP_MAIN_H_
19 #ifdef  __cplusplus
20 extern  "C" {
21 #endif
22 /*---------------------------------------------------------------------------*/
23 
24 /*---------------------------------------------------------------------------*
25     MEMORY MAP of MAIN MEMORY
26  *---------------------------------------------------------------------------*/
27 /*
28         Retail NITRO         Retail TWL           Development TWL
29   32M -+---------------+----+---------------+----+---------------+- 0x0e000000
30        |               |    |               |    | System        |
31        |               |    |               |    | Reserved      |
32        |               |    |               |    |---------------+- 0x0dfc0000
33        |               |    |               |    | Debugger Work |
34        |               |    | No Device     |    |---------------+- 0x0df00000
35        |               |    | ( N/A )       |    | Main          |
36        |               |    |               |    | Processor     |
37        |               |    |               |    | Extra         |
38        |               |    |               |    | Reserved      |
39   16M -+ Indefinite    +----+---------------+----+---------------+- 0x0d000000
40        |               |    | Wrap around   |    | Wrap around   |
41        |               |    | 0x02000000 -  |    | 0x02000000 -  |
42        |               |    |  0x02ffffff   |    |  0x02ffffff   |
43        |               |    | ( N/A )       |    | ( N/A )       |
44     0 -+---------------+----+---------------+----+---------------+- 0x0c000000
45 
46 
47   16M -+---------------+----+---------------+----+---------------+- 0x03000000
48        | System Shared |    | System Shared |    | System Shared |
49        +---------------+----+---------------+----+---------------+- 0x02fff680
50        | User Shared   |    | User Shared   |    | User Shared   |
51        +---------------+----+---------------+----+---------------+- 0x02fff000
52        |               |    | System Shared |    | System Shared |
53        | Sub Processor |    +---------------+----+---------------+- 0x02ffc000
54        | Reserved      |    | Sub Processor |    | Sub Processor |
55        |               |    | Reserved      |    | Reserved      |
56        +------------+  |    +------------+  |    +------------+  +- 0x02fe4000
57        |Default DTCM|  |    |Default DTCM|  |    |Default DTCM|  |
58        +-+----------+--+----+------------+  +    +------------+  +- 0x02fe0000
59        | |Main         |    |               |    |               |
60        |W|Processor    |    +---------------+----+---------------+- 0x02f80000
61        |R|Reserved     |    |               |    |               |
62   12M -+A+-------------+----+               +----+               +- 0x02c00000
63        |P|System Shared|    |               |    |               |
64        | +-------------+    | Main          |    | Main          |
65        |A|User Shared  |    | Processor     |    | Processor     |
66        |R+-------------+    | Reserved      |    | Reserved      |
67        |O|Sub Processor|    |               |    |               |
68        |U|Reserved     |    |               |    |               |
69        |N+-------------+    |  for          |    |  for          |
70        |D|Main         |    |               |    |               |
71        | |Processor    |    | TWL Private   |    | TWL Private   |
72        |/|Reserved     |    | Static Data   |    | Static Data   |
73    8M -+ +-------------+----+               +----+               +- 0x02800000
74        |N|System Shared|    |  or           |    |  or           |
75        |O+-------------+    |               |    |               |
76        |T|User Shared  |    | Arena         |    | Arena         |
77        | +-------------+    |               |    |               |
78        |A|Sub Processor|    |               |    |               |
79        |V|Reserved     |    |               |    |               |
80        |A+-------------+    |               |    |               |
81        |I|Main         |    |               |    |               |
82        |L|Processor    |    |               |    |               |
83        |A|Reserved     |    |               |    |               |
84    4M -+B+-------------+----+               +----+               +- 0x02400000
85        |L|System Shared|    |               |    |               |
86        |E+-------------+    |               |    |               |
87        | |User Shared  |    |               |    |               |
88        | +-------------+    |               |    |               |
89        | |Sub Processor|    |               |    |               |
90        | |Reserved     |    |               |    |               |
91        +-+-------------+----+ - - - - - - - +----+ - - - - - - - +- 0x023e0000
92        |               |    |               |    |               |
93        | Main          |    | Main          |    | Main          |
94        | Processor     |    | Processor     |    | Processor     |
95        | Reserved      |    | Reserved      |    | Reserved      |
96        |               |    |               |    |               |
97     0 -+------------+--+----+------------+--+----+------------+--+- 0x02000000
98        |Default ITCM|       |Default ITCM|       |Default ITCM|
99        +------------+       +------------+       +------------+   - 0x01ff8000
100 */
101 
102 #define HW_MAIN_MEM_MAIN_SIZE       0x003e0000      // 3.875 MB
103 #define HW_MAIN_MEM_SUB_SIZE        0x0001f000      // 124 KB
104 #define HW_MAIN_MEM_SHARED_SIZE     0x00001000      // 4 KB
105 
106 #define HW_MAIN_MEM_MAIN            (HW_MAIN_MEM)
107 #define HW_MAIN_MEM_MAIN_END        (HW_MAIN_MEM_MAIN + HW_MAIN_MEM_MAIN_SIZE)
108 #define HW_MAIN_MEM_SUB             (HW_MAIN_MEM_SUB_END - HW_MAIN_MEM_SUB_SIZE)
109 #define HW_MAIN_MEM_SUB_END         (HW_MAIN_MEM_EX_END - HW_MAIN_MEM_SHARED_SIZE)
110 
111 #define HW_MAIN_MEM_SHARED          (HW_MAIN_MEM_SHARED_END - HW_MAIN_MEM_SHARED_SIZE)
112 #define HW_MAIN_MEM_SHARED_END      (HW_TWL_MAIN_MEM_END)
113 
114 #define HW_MAIN_MEM_IM_SHARED_SIZE  (HW_MAIN_MEM_SHARED_SIZE)
115 #define HW_MAIN_MEM_IM_SHARED       (HW_MAIN_MEM_IM_SHARED_END - HW_MAIN_MEM_IM_SHARED_SIZE)
116 #define HW_MAIN_MEM_IM_SHARED_END   (HW_MAIN_MEM + 0x00800000)
117 
118 #define HW_TWL_MAIN_MEM_MAIN_SIZE   0x00f80000      // 15.5 MB
119 #define HW_TWL_MAIN_MEM_SUB_SIZE    0x0007c000      // 496 KB
120 #define HW_TWL_MAIN_MEM_SHARED_SIZE 0x00004000      // 16 KB
121 
122 #define HW_TWL_MAIN_MEM_MAIN        (HW_TWL_MAIN_MEM)
123 #define HW_TWL_MAIN_MEM_MAIN_END    (HW_TWL_MAIN_MEM_MAIN + HW_TWL_MAIN_MEM_MAIN_SIZE)
124 #define HW_TWL_MAIN_MEM_SUB         (HW_TWL_MAIN_MEM_SUB_END - HW_TWL_MAIN_MEM_SUB_SIZE)
125 #define HW_TWL_MAIN_MEM_SUB_END     (HW_TWL_MAIN_MEM_SHARED)
126 #define HW_TWL_MAIN_MEM_SHARED      (HW_TWL_MAIN_MEM_SHARED_END - HW_TWL_MAIN_MEM_SHARED_SIZE)
127 #define HW_TWL_MAIN_MEM_SHARED_END  (HW_TWL_MAIN_MEM_END)
128 
129 
130 /*----------------------------------------------------------------------*
131     memory area for parameter buffer
132  *----------------------------------------------------------------------*/
133 #define HW_MAIN_MEM_PARAMETER_BUF		0x02000000
134 #define HW_MAIN_MEM_PARAMETER_BUF_SIZE	0x4000
135 #define HW_MAIN_MEM_PARAMETER_BUF_END	(HW_MAIN_MEM_PARAMETER_BUF + HW_MAIN_MEM_PARAMETER_BUF_SIZE )
136 
137 /*----------------------------------------------------------------------*
138     memory area debugger uses
139  *----------------------------------------------------------------------*/
140 //---- debugger for NITRO
141 #define HW_MAIN_MEM_DEBUGGER_OFFSET 0x700000
142 #define HW_MAIN_MEM_DEBUGGER_SIZE   0x080000
143 #define HW_MAIN_MEM_DEBUGGER        (HW_MAIN_MEM + HW_MAIN_MEM_DEBUGGER_OFFSET)
144 #define HW_MAIN_MEM_DEBUGGER_END    (HW_MAIN_MEM_DEBUGGER + HW_MAIN_MEM_DEBUGGER_SIZE)
145 
146 //---- debugger for TWL
147 #define HW_TWL_MAIN_MEM_DEBUGGER_OFFSET (HW_TWL_MAIN_MEM_DEBUGGER - HW_TWL_MAIN_MEM)
148 #define HW_TWL_MAIN_MEM_DEBUGGER_SIZE   0x0c0000
149 #define HW_TWL_MAIN_MEM_DEBUGGER        0x0df00000
150 #define HW_TWL_MAIN_MEM_DEBUGGER_END    (HW_TWL_MAIN_MEM_DEBUGGER + HW_TWL_MAIN_MEM_DEBUGGER_SIZE)
151 
152 
153 /*---------------------------------------------------------------------------*/
154 #ifdef __cplusplus
155 }   /* extern "C" */
156 #endif
157 #endif  /* TWL_HW_ARM9_MMAP_MAIN_H_ */
158