1 /*---------------------------------------------------------------------------* 2 Project: TwlSDK - include - twl - HW - ARM9 3 File: mmap_global.h 4 5 Copyright 2007-2008 Nintendo. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 $Date:: 2008-09-17#$ 14 $Rev: 8556 $ 15 $Author: okubata_ryoma $ 16 *---------------------------------------------------------------------------*/ 17 #ifndef TWL_HW_ARM9_MMAP_GLOBAL_H_ 18 #define TWL_HW_ARM9_MMAP_GLOBAL_H_ 19 #ifdef __cplusplus 20 extern "C" { 21 #endif 22 /*---------------------------------------------------------------------------*/ 23 24 /*---------------------------------------------------------------------------* 25 GLOBAL MEMORY MAP 26 *---------------------------------------------------------------------------*/ 27 28 //----------------------------- ITCM 29 #define HW_ITCM_IMAGE 0x01000000 30 #define HW_ITCM 0x01ff8000 31 #define HW_ITCM_SIZE 0x8000 32 #define HW_ITCM_END (HW_ITCM + HW_ITCM_SIZE) 33 34 //----------------------------- DTCM 35 #ifndef SDK_ASM 36 #include <nitro/types.h> 37 extern u32 SDK_AUTOLOAD_DTCM_START[]; 38 #define HW_DTCM ((u32)SDK_AUTOLOAD_DTCM_START) 39 #else 40 .extern SDK_AUTOLOAD_DTCM_START 41 #define HW_DTCM SDK_AUTOLOAD_DTCM_START 42 #endif 43 #define HW_DTCM_SIZE 0x4000 44 #define HW_DTCM_END (HW_DTCM + HW_DTCM_SIZE) 45 46 //----------------------------- MAIN on NITRO hardware 47 #define HW_MAIN_MEM 0x02000000 48 #define HW_MAIN_MEM_SIZE 0x00400000 49 #define HW_MAIN_MEM_EX_SIZE 0x00800000 50 #define HW_MAIN_MEM_END (HW_MAIN_MEM + HW_MAIN_MEM_SIZE) 51 #define HW_MAIN_MEM_EX_END (HW_MAIN_MEM + HW_MAIN_MEM_EX_SIZE) 52 53 //----------------------------- MAIN on TWL hardware 54 #define HW_TWL_MAIN_MEM_SIZE 0x01000000 55 #define HW_TWL_MAIN_MEM_EX_SIZE 0x01000000 56 57 #define HW_TWL_MAIN_MEM 0x02000000 58 #define HW_TWL_MAIN_MEM_END (HW_TWL_MAIN_MEM + HW_TWL_MAIN_MEM_SIZE) 59 #define HW_TWL_MAIN_MEM_IMAGE 0x0c000000 60 #define HW_TWL_MAIN_MEM_IMAGE_END (HW_TWL_MAIN_MEM_IMAGE + HW_TWL_MAIN_MEM_SIZE) 61 #define HW_TWL_MAIN_MEM_EX 0x0d000000 62 #define HW_TWL_MAIN_MEM_EX_END (HW_TWL_MAIN_MEM_EX + HW_TWL_MAIN_MEM_EX_SIZE) 63 64 //----------------------------- WRAM_AREA 65 #define HW_WRAM_AREA 0x03000000 66 #define HW_WRAM_AREA_HALF (HW_WRAM_AREA+(HW_WRAM_AREA_SIZE/2)) 67 #define HW_WRAM_AREA_END 0x04000000 68 #define HW_WRAM_AREA_SIZE (HW_WRAM_AREA_END-HW_WRAM_AREA) 69 70 //----------------------------- Shared WRAMs 71 #define HW_WRAM_BASE 0x03000000 72 #define HW_WRAM_0_SIZE 0x4000 73 #define HW_WRAM_1_SIZE 0x4000 74 #define HW_WRAM_SIZE (HW_WRAM_0_SIZE + HW_WRAM_1_SIZE) 75 #ifdef SDK_BB 76 #define HW_WRAM_A_SIZE 0x20000 77 #define HW_WRAM_B_SIZE 0x20000 78 #define HW_WRAM_C_SIZE 0x20000 79 #else 80 #define HW_WRAM_A_SIZE 0x40000 81 #define HW_WRAM_B_SIZE 0x40000 82 #define HW_WRAM_C_SIZE 0x40000 83 #endif 84 85 #define HW_WRAM_0 (HW_WRAM_BASE + HW_WRAM_A_SIZE) 86 #define HW_WRAM_0_END (HW_WRAM_0 + HW_WRAM_0_SIZE) 87 #define HW_WRAM_1 HW_WRAM_0_END 88 #define HW_WRAM_1_END (HW_WRAM_1 + HW_WRAM_1_SIZE) 89 #define HW_WRAM HW_WRAM_0 90 #define HW_WRAM_END HW_WRAM_1_END 91 92 #define HW_WRAM_B_OFFSET 0x0740000 93 #define HW_WRAM_C_OFFSET 0x0700000 94 #define HW_WRAM_B (HW_WRAM_BASE + HW_WRAM_B_OFFSET) 95 #ifdef SDK_BB 96 #define HW_WRAM_B_END (HW_WRAM_B + (HW_WRAM_B_SIZE * 2)) 97 #else 98 #define HW_WRAM_B_END (HW_WRAM_B + HW_WRAM_B_SIZE) 99 #endif 100 #define HW_WRAM_C (HW_WRAM_BASE + HW_WRAM_C_OFFSET) 101 #ifdef SDK_BB 102 #define HW_WRAM_C_END (HW_WRAM_C + (HW_WRAM_C_SIZE * 2)) 103 #else 104 #define HW_WRAM_C_END (HW_WRAM_C + HW_WRAM_C_SIZE) 105 #endif 106 #define HW_WRAM_B_OR_C_MIRROR HW_WRAM_B_END 107 #ifdef SDK_BB 108 #define HW_WRAM_B_OR_C_MIRROR_END (HW_WRAM_B_OR_C_MIRROR + (HW_WRAM_B_SIZE * 2)) // HW_WRAM_B_SIZE==HW_WRAM_C_SIZE 109 #else 110 #define HW_WRAM_B_OR_C_MIRROR_END (HW_WRAM_B_OR_C_MIRROR + HW_WRAM_B_SIZE) // HW_WRAM_B_SIZE==HW_WRAM_C_SIZE 111 #endif 112 113 //----------------------------- IOs 114 #define HW_IOREG 0x04000000 115 #define HW_IOREG_END 0x05000000 116 #define HW_REG_BASE HW_IOREG // alias 117 118 //----------------------------- VRAMs 119 #define HW_BG_PLTT 0x05000000 120 #define HW_BG_PLTT_END 0x05000200 121 #define HW_BG_PLTT_SIZE (HW_BG_PLTT_END - HW_BG_PLTT) 122 #define HW_OBJ_PLTT 0x05000200 123 #define HW_OBJ_PLTT_END 0x05000400 124 #define HW_OBJ_PLTT_SIZE (HW_OBJ_PLTT_END - HW_OBJ_PLTT) 125 #define HW_PLTT HW_BG_PLTT 126 #define HW_PLTT_END HW_OBJ_PLTT_END 127 #define HW_PLTT_SIZE (HW_PLTT_END - HW_PLTT) 128 #define HW_DB_BG_PLTT 0x05000400 129 #define HW_DB_BG_PLTT_END 0x05000600 130 #define HW_DB_BG_PLTT_SIZE (HW_DB_BG_PLTT_END - HW_DB_BG_PLTT) 131 #define HW_DB_OBJ_PLTT 0x05000600 132 #define HW_DB_OBJ_PLTT_END 0x05000800 133 #define HW_DB_OBJ_PLTT_SIZE (HW_DB_OBJ_PLTT_END - HW_DB_OBJ_PLTT) 134 #define HW_DB_PLTT HW_DB_BG_PLTT 135 #define HW_DB_PLTT_END HW_DB_OBJ_PLTT_END 136 #define HW_DB_PLTT_SIZE (HW_DB_PLTT_END - HW_DB_PLTT) 137 #define HW_BG_VRAM 0x06000000 138 #define HW_BG_VRAM_END 0x06080000 139 #define HW_BG_VRAM_SIZE (HW_BG_VRAM_END - HW_BG_VRAM) 140 #define HW_DB_BG_VRAM 0x06200000 141 #define HW_DB_BG_VRAM_END 0x06220000 142 #define HW_DB_BG_VRAM_SIZE (HW_DB_BG_VRAM_END - HW_DB_BG_VRAM) 143 #define HW_OBJ_VRAM 0x06400000 144 #define HW_OBJ_VRAM_END 0x06440000 145 #define HW_OBJ_VRAM_SIZE (HW_OBJ_VRAM_END - HW_OBJ_VRAM) 146 #define HW_DB_OBJ_VRAM 0x06600000 147 #define HW_DB_OBJ_VRAM_END 0x06620000 148 #define HW_DB_OBJ_VRAM_SIZE (HW_DB_OBJ_VRAM_END - HW_DB_OBJ_VRAM) 149 #define HW_LCDC_VRAM 0x06800000 150 #define HW_LCDC_VRAM_END 0x068A4000 151 #define HW_LCDC_VRAM_SIZE (HW_LCDC_VRAM_END - HW_LCDC_VRAM) 152 #define HW_OAM 0x07000000 153 #define HW_OAM_END 0x07000400 154 #define HW_OAM_SIZE (HW_OAM_END - HW_OAM) 155 #define HW_DB_OAM 0x07000400 156 #define HW_DB_OAM_END 0x07000800 157 #define HW_DB_OAM_SIZE (HW_DB_OAM_END - HW_DB_OAM) 158 159 //----------------------------- Cartridge Bus 160 #define HW_CTRDG_ROM 0x08000000 161 #define HW_CTRDG_ROM_END 0x0a000000 162 #define HW_CTRDG_RAM 0x0a000000 163 #define HW_CTRDG_RAM_END 0x0a010000 164 165 //----------------------------- System ROM 166 #define HW_BIOS_SIZE 0x00002000 167 #define HW_BIOS 0xffff0000 168 #define HW_BIOS_END (HW_BIOS + HW_BIOS_SIZE) 169 #define HW_TWL_BIOS_SIZE 0x00010000 170 #define HW_TWL_BIOS HW_BIOS 171 #define HW_TWL_BIOS_END (HW_TWL_BIOS + HW_TWL_BIOS_SIZE) 172 173 #define HW_RESET_VECTOR HW_BIOS 174 175 //----------------------------- for request to ARM7 176 #define HW_EXT_WRAM_ARM7 0x06000000 177 #define HW_EXT_WRAM_ARM7_END 0x06040000 178 #define HW_EXT_WRAM_ARM7_SIZE (HW_EXT_WRAM_ARM7_END-HW_EXT_WRAM_ARM7) 179 180 /*---------------------------------------------------------------------------*/ 181 #ifdef __cplusplus 182 } /* extern "C" */ 183 #endif 184 #endif /* TWL_HW_ARM9_MMAP_GLOBAL_H_ */ 185