1<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 2<HTML> 3<HEAD> 4<META http-equiv="Content-Type" content="text/html; charset=windows-1252"> 5<META name="GENERATOR" content="IBM WebSphere Studio Homepage Builder Version 7.0.1.0 for Windows"> 6<META http-equiv="Content-Style-Type" content="text/css"> 7<TITLE>Protection Units — Overview </TITLE> 8<LINK rel="stylesheet" href="../../css/nitro.css" type="text/css"> 9</HEAD> 10<BODY> 11<H1 align="left">Protection Units — Overview <img src="../../image/NTR.gif" align="middle"><img src="../../image/TWL.gif" align="middle"></H1> 12<P>Protection units are a feature used for setting the usage status of the memory read/write attributes and the cache/write back, and for protecting the memory. Eight regions can be mapped in the memory space, and different attributes can be configured for each.</P> 13<P>Protection units can only be used on the ARM9 processor.</P> 14<H2>Enabling and Disabling Protection Units</H2> 15<P>The functions below enable or disable the protection units.</P> 16<P><a href="OS_EnableProtectionUnit.html"><code>OS_EnableProtectionUnit()</code></a><br /> <a href="OS_DisableProtectionUnit.html"><code>OS_DisableProtectionUnit()</code></a></P> 17<H2>Settings for Each Region</H2> 18<P>The following functions perform each of the protection region settings:<br /></P> 19<P><a href="OS_SetProtectionRegion.html"><code>OS_SetProtectionRegion()</code></a><br /> <a href="OS_SetProtectionRegion.html"><code>OS_SetProtectionRegionParam()</code></a></P> 20<P>The following functions get the settings:<br /></P> 21<P><a href="OS_GetProtectionRegion.html"><code>OS_GetProtectionRegionAddress()</code></a><br /> <a href="OS_GetProtectionRegion.html"><code>OS_GetProtectionRegionSize()</code></a><br /> <a href="OS_GetProtectionRegion.html"><code>OS_GetProtectionRegionParam()</code></a></P> 22<H2>Default Mapping in NITRO Mode <img src="../../image/NTR.gif" align="middle"></H2> 23<P>By default, each region is mapped as indicated below.<br />When the regions overlap, the higher region number has priority. <BR> 24</P> 25<TABLE border="1"> 26 <TBODY> 27 <TR> 28<TH width="55">Region Number</TH> 29<TH width="172">Usage</TH> 30<TH width="107">Base address</TH> 31<TH width="142">Size</TH> 32<TH width="45">Cache</TH> 33<TH width="45">Write Buffer</TH> 34 35<TH width="45">User Attribute (Command)</TH> 36<TH width="45">User Attribute (Data)</TH> 37 </TR> 38 <TR> 39 <TD width="55">-</TD> 40<TD width="172">Background</TD> 41<TD width="107">0x00000000</TD> 42<TD width="142">4GB<BR> ( 0x100000000 )</TD> 43 <TD align="center" width="47">X</TD> 44 <TD>X</TD> 45<TD width="63">NA</TD> 46<TD width="45">NA</TD> 47 </TR> 48 <TR> 49 <TD width="55">0</TD> 50<TD width="172">I/O register, VRAM, etc.</TD> 51<TD width="107"><code>HW_IOREG<br /> ( 0x04000000 )</code></TD> 52<TD width="142">64MB<BR> ( 0x4000000 )</TD> 53 <TD align="center" width="47">X</TD> 54 <TD>X</TD> 55<TD width="63">R/W</TD> 56<TD width="45">R/W</TD> 57 </TR> 58 <TR> 59 <TD width="55">1</TD> 60<TD width="172">Main memory, WRAM</TD> 61<TD width="107"><CODE>HW_MAIN_MEM_MAIN</CODE><BR> ( 0x02000000 )</TD> 62<TD width="142">4MB / 8MB<BR> ( 0x400000/0x800000 )<B><FONT color="#ff0033">(Caution 1)</FONT></B></TD> 63 <TD width="47">O</TD> 64 <TD>O</TD> 65<TD width="63">R/W</TD> 66<TD width="45">R/W</TD> 67 </TR> 68 <TR> 69 <TD width="55">2</TD> 70<TD width="172">Shared main memory image<BR> <FONT color="#ff0033"><B>(Caution 2)</B></FONT></TD> 71<TD width="107">HW_MAIN_MEM_IM_SHARED<BR> ( 0x027FF000 )</TD> 72<TD width="142">4KB <BR> ( 0x1000 )</TD> 73 <TD align="center" width="47">X</TD> 74 <TD>X</TD> 75<TD width="63">NA</TD> 76<TD width="45">R/W</TD> 77 </TR> 78 <TR> 79 <TD width="55">3</TD> 80<TD width="172">Game Pak</TD> 81<TD width="107"><CODE>HW_CTRDG_ROM</CODE><BR> ( 0x08000000 )</TD> 82<TD width="142">128MB<BR> ( 0x8000000 )</TD> 83 <TD align="center" width="47">X</TD> 84 <TD>X</TD> 85<TD width="63">NA</TD> 86<TD width="45">R/W</TD> 87 </TR> 88 <TR> 89 <TD width="55">4</TD> 90<TD width="172">DTCM</TD> 91<TD width="107">HW_DTCM<BR> ( 0x027E0000/0x2FE0000 ) <B><FONT color="#ff0033">(Caution 3)</FONT></B></TD> 92<TD width="142">16KB<BR> ( 0x4000 )</TD> 93 <TD align="center" width="47">X</TD> 94 <TD>X</TD> 95<TD width="63">NA</TD> 96<TD width="45">R/W</TD> 97 </TR> 98 <TR> 99 <TD width="55">5</TD> 100<TD width="172">ITCM</TD> 101<TD width="107"><CODE>HW_ITCM_IMAGE</CODE><BR> ( 0x01000000 ) <FONT color="#ff0033"><B>(Caution 4)</B></FONT></TD> 102<TD width="142">16MB<BR> ( 0x1000000 )</TD> 103 <TD align="center" width="47">X</TD> 104 <TD>X</TD> 105<TD width="63">R/W</TD> 106<TD width="45">R/W</TD> 107 </TR> 108 <TR> 109 <TD width="55">6</TD> 110<TD width="172">BIOS Reserved</TD> 111<TD width="107"><CODE>HW_BIOS</CODE><BR> ( 0xFFFF0000 )</TD> 112<TD width="142">32KB<BR> ( 0x8000 )</TD> 113 <TD align="center" width="47">O</TD> 114 <TD>X</TD> 115<TD width="63">R</TD> 116<TD width="45">R</TD> 117 </TR> 118 <TR> 119 <TD width="55">7</TD> 120<TD width="172">Shared Main Memory</TD> 121<TD width="107">HW_MAIN_MEM_SHARED<BR> ( 0x02FFF000 )</TD> 122<TD width="142">4KB <BR> ( 0x1000 )</TD> 123 <TD align="center" width="47">X</TD> 124 <TD>X</TD> 125<TD width="63">NA</TD> 126<TD width="45">R/W</TD> 127 </TR> 128 </TBODY> 129</TABLE> 130<P><BR> <font color="red"><strong>(CAUTION 1)</strong></font><br /> When using debug hardware, the size of protection region 1 (used to protect the main memory) becomes 8 MB by specifying <a href="../arena/OS_EnableMainExArena.html"><code>OS_EnableMainExArena()</code></a> before <a href="../arena/OS_InitArena.html"><code>OS_InitArena()</code></a> or <a href="../init/OS_Init.html"><code>OS_Init()</code></a>. For the actual device, it will always be 4 MB regardless of the setting described above.</P> 131<P>For compatibility with previous versions, the size of protection region 1 will be 8 MB (when using debug hardware) instead of the above specification if you compile OS library set to <code>NITRO_MEMSIZE=8M</code>.</P> 132<P><FONT color="#ff0033"><B>(CAUTION 2)</B></FONT><BR> Although this Protection Region 2 was used to protect the ARM7-dedicated region in main memory with NITRO-SDK (the predecessor to TWL-SDK), this is used for a different purpose with TWL-SDK: it is a shared main memory image. As a result, the ARM7-dedicated region in main memory is not protected. This region is actually independent from shared main memory, rather than a shared main memory image, when a HYBRID ROM is running in NITRO mode.</P> 133<P><B><FONT color="#ff0033">(CAUTION 3)</FONT></B><BR> The starting position of the DTCM is specified by the <code>lsf</code> file. This address is decided by the ROM type rather than the operating mode. The default value is <CODE>0x027E0000</CODE> for a NITRO ROM and <CODE>0x02FE0000</CODE> for a LIMITED ROM.</P> 134<P><B><FONT color="#ff0033">(CAUTION 4)</FONT></B><BR> Because accessing a NULL pointer will cause an exception, do not start from <code>0x00000000</code>.</P> 135<P><BR> The memory map is shown together with how protection regions are established.</P> 136<UL> 137<LI>Cases are divided based on the distinction between a NITRO ROM and a HYBRID ROM, and the main memory size installed on the operating platform.<BR> <BR> 138<LI>The FINAL build of a ROM assumes that 4 MB of memory is installed, and treats <CODE>MEMSIZE</CODE> as <CODE>4MB</CODE>. <BR> 139<LI><CODE>MEMSIZE</CODE> is treated as <CODE>4MB</CODE> when running in NITRO mode on the TWL system to match NITRO system behavior. <BR> 140<LI>A NITRO ROM running in NITRO mode will have a different DTCM position, and hence a different Protection Region 4 covering that position, than a HYBRID ROM running in NITRO mode. <BR> 141<LI>One of the differences between when <CODE>MEMSIZE</CODE> is <CODE>4MB</CODE> and <CODE>8MB</CODE> is the existence of regions after <CODE>0x02400000</CODE>. Therefore, the size of Region 1, which protects main memory, is also different. It ranges from <CODE>0x02000000</CODE> to <CODE>0x023FFFFF</CODE> when <CODE>MEMSIZE</CODE> is <CODE>4MB</CODE> and from <CODE>0x02000000</CODE> to <CODE>0x027FFFFF</CODE> when <CODE>MEMSIZE</CODE> is <CODE>8MB</CODE>. A <CODE>MEMSIZE</CODE> of <CODE>32MB</CODE> is the same as a <CODE>MEMSIZE</CODE> of <CODE>8MB</CODE>. 142</UL> 143<BR> 144<TABLE border="1"> 145 <TBODY> 146 <TR> 147<TD colspan="3" style="background-color:#304080;"><B><FONT color="#ffffff">Operations in NITRO Mode</FONT></B></TD> 148 </TR> 149 <TR> 150<TH>ROM Type</TH> 151<TH>Operating Platform</TH> 152<TH>Corresponding Item</TH> 153 </TR> 154 <TR> 155<TD rowspan="3">NIRO ROM</TD> 156<TD>Nintendo DS<BR> Nintendo DSi<BR> All FINALROM builds</TD> 157<TD>NITRO MODE (NITRO ROM):MEMSIZE=4MB</TD> 158 </TR> 159 <TR> 160<TD>IS-NITRO-DEBUGGER<BR> ENSATA EMULATOR</TD> 161<TD>NITRO MODE (NITRO ROM):MEMSIZE=8MB</TD> 162 </TR> 163 <TR> 164<TD>IS-TWL-DEBUGGER</TD> 165<TD>NITRO MODE (NITRO ROM):MEMSIZE=32MB</TD> 166 </TR> 167 <TR> 168<TD rowspan="3">HYBRID ROM</TD> 169<TD>Nintendo DS<BR> All FINALROM builds</TD> 170<TD>NITRO MODE (HYBRID ROM):MEMSIZE=4MB</TD> 171 </TR> 172 <TR> 173<TD>IS-NITRO-DEBUGGER</TD> 174<TD>NITRO MODE (HYBRID ROM):MEMSIZE=8MB</TD> 175 </TR> 176 <TR> 177<TD>IS-TWL-DEBUGGER (forced NITRO operations)</TD> 178<TD>NITRO MODE (HYBRID ROM):MEMSIZE=32MB</TD> 179 </TR> 180 </TBODY> 181</TABLE> 182<P><BR> 183<BLOCKQUOTE> 184<IMG src="image_NITRO_4M.gif" border="0"> <IMG src="image_NITRO_8M.gif" border="0"> <IMG src="image_NITRO_32M.gif" border="0"> <IMG src="image_HYBRIDNITRO_4M.gif" border="0"> <IMG src="image_HYBRIDNITRO_8M.gif" border="0"> <IMG src="image_HYBRIDNITRO_32M.gif" border="0"> 185</BLOCKQUOTE> 186<P>The following figures show an enlarged representation of addresses between <CODE>0x02000000</CODE> and <CODE>0x03000000</CODE>, which includes main memory and extended main memory.</P> 187<BLOCKQUOTE> 188<IMG src="image_NITRO_4M_d.gif" border="0"> <IMG src="image_NITRO_8M_d.gif" border="0"> <IMG src="image_NITRO_32M_d.gif" border="0"> <IMG src="image_HYBRIDNITRO_4M_d.gif" border="0"> <IMG src="image_HYBRIDNITRO_8M_d.gif" border="0"> <IMG src="image_HYBRIDNITRO_32M_d.gif" border="0"> 189</BLOCKQUOTE> 190<H2>Default Mapping in TWL Mode <img src="../../image/TWL.gif" align="middle"></H2> 191<P>By default, each region is mapped as indicated below.<br />When the regions overlap, the higher region number has priority. <BR> 192</P> 193<TABLE border="1"> 194 <TBODY> 195 <TR> 196<TH width="55">Region Number</TH> 197<TH width="172">Usage</TH> 198<TH width="107">Base address</TH> 199<TH width="142">Size</TH> 200<TH width="45">Cache</TH> 201<TH width="45">Write Buffer</TH> 202 203<TH width="45">User Attribute (Command)</TH> 204<TH width="45">User Attribute (Data)</TH> 205 </TR> 206 <TR> 207 <TD width="55">-</TD> 208<TD width="172">Background</TD> 209<TD width="107">0x00000000</TD> 210<TD width="142">4GB<BR> ( 0x100000000 )</TD> 211 <TD align="center" width="47">X</TD> 212 <TD>X</TD> 213<TD width="63">NA</TD> 214<TD width="45">NA</TD> 215 </TR> 216 <TR> 217 <TD width="55">0</TD> 218<TD width="172">I/O Register, VRAM, etc.</TD> 219<TD width="107"><code>HW_IOREG<br />( 0x04000000 )</code></TD> 220<TD width="142">64MB<BR>( 0x4000000 )</TD> 221 <TD align="center" width="47">X</TD> 222 <TD>X</TD> 223<TD width="63">R/W</TD> 224<TD width="45">R/W</TD> 225 </TR> 226 <TR> 227 <TD width="55">1</TD> 228<TD width="172">Main memory, WRAM</TD> 229<TD width="107"><CODE>HW_MAIN_MEM_MAIN</CODE><BR> ( 0x02000000 )</TD> 230<TD width="142">32MB <BR> ( 0x200000 )</TD> 231 <TD width="47">O</TD> 232 <TD>O</TD> 233<TD width="63">R/W</TD> 234<TD width="45">R/W</TD> 235 </TR> 236 <TR> 237 <TD width="55">2</TD> 238<TD width="172">ARM7-Dedicated Main Memory</TD> 239<TD width="107">HW_MAIN_MEM_SUB<BR> ( 0x02F80000)</TD> 240<TD width="142">512KB<BR> ( 0x80000 )</TD> 241 <TD align="center" width="47">X</TD> 242 <TD>X</TD> 243<TD width="63">NA</TD> 244<TD width="45">NA</TD> 245 </TR> 246 <TR> 247 <TD width="55">3</TD> 248<TD width="172">Extended main memory</TD> 249<TD width="107">HW_CTRDG_ROM<BR> ( 0x08000000 ) <B><FONT color="#ff0000">(Caution 5)</FONT></B></TD> 250<TD width="142">64MB / 128MB<BR> ( 0x4000000/0x8000000 )</TD> 251 <TD align="center" width="47">O</TD> 252 <TD>O</TD> 253<TD width="63">R/W</TD> 254<TD width="45">R/W</TD> 255 </TR> 256 <TR> 257 <TD width="55">4</TD> 258<TD width="172">DTCM</TD> 259<TD width="107">HW_DTCM<BR> ( 0x02FE0000 ) <B><FONT color="#ff0033">(Caution 6)</FONT></B></TD> 260<TD width="142">16KB<BR> ( 0x4000 )</TD> 261 <TD align="center" width="47">X</TD> 262 <TD>X</TD> 263<TD width="63">NA</TD> 264<TD width="45">R/W</TD> 265 </TR> 266 <TR> 267 <TD width="55">5</TD> 268<TD width="172">ITCM</TD> 269<TD width="107"><CODE>HW_ITCM_IMAGE</CODE><BR> ( 0x01000000 ) <FONT color="#ff0033"><B>(Caution 7)</B></FONT></TD> 270<TD width="142">16MB<BR> ( 0x1000000 )</TD> 271 <TD align="center" width="47">X</TD> 272 <TD>X</TD> 273<TD width="63">R/W</TD> 274<TD width="45">R/W</TD> 275 </TR> 276 <TR> 277 <TD width="55">6</TD> 278<TD width="172">BIOS Reserved</TD> 279<TD width="107">HW_TWL_BIOS<BR> ( 0xFFFF0000 )</TD> 280<TD width="142">32KB<BR> ( 0x8000 )</TD> 281 <TD align="center" width="47">O</TD> 282 <TD>X</TD> 283<TD width="63">R</TD> 284<TD width="45">R</TD> 285 </TR> 286 <TR> 287 <TD width="55">7</TD> 288<TD width="172">Shared Main Memory</TD> 289<TD width="107">HW_TWL_MAIN_MEM_SHARED<BR> ( 0x02FFC000 )</TD> 290<TD width="142">16KB<BR> ( 0x4000 )</TD> 291 <TD align="center" width="47">X</TD> 292 <TD>X</TD> 293<TD width="63">NA</TD> 294<TD width="45">R/W</TD> 295 </TR> 296 </TBODY> 297</TABLE> 298<P><BR> <B><FONT color="#ff0033">(CAUTION 5)</FONT></B><BR> Extended main memory starts at <CODE>0x0C000000</CODE>, but <CODE>HW_CTRDG_ROM</CODE> will be used as a base because the NITRO Game Pak region (starting at <CODE>0x08000000</CODE>) will be accessed to check it. The size will always be 64 MB for the FINALROM build. In any other case, this will be either 128 MB when 32 MB of main memory is installed (when there is extended main memory) or 64 MB otherwise.</P> 299<P><B><FONT color="#ff0033">(CAUTION 6)</FONT></B><BR> The starting position of the DTCM is specified by the <code>lsf</code> file. The default value is <CODE>0x02FE0000</CODE>.</P> 300<P><B><FONT color="#ff0033">(CAUTION 7)</FONT></B><BR> Because accessing a NULL pointer will cause an exception, do not start from <code>0x00000000</code>.</P> 301<P>The memory map is shown together with how protection regions are established. There are no differences between a LIMITED ROM and a HYBRID ROM running in TWL mode. The installed memory size is divided into 16 MB and 32 MB, depending on the operating device. However, a FINALROM build assumes that it is operating with 16 MB of installed memory, so see the 16-MB recommendations.<BR> 302</P> 303<TABLE border="1"> 304 <TBODY> 305 <TR> 306<TD colspan="3" style="background-color:#304080;"><B><FONT color="#ffffff">Operations in TWL Mode</FONT></B></TD> 307 </TR> 308 <TR> 309<TH>ROM Type</TH> 310<TH>Operating Platform</TH> 311<TH>Corresponding Item</TH> 312 </TR> 313 <TR> 314<TD rowspan="2">HYBRID ROM<BR> LIMITED ROM</TD> 315<TD>Nintendo DSi<BR> All FINALROM builds</TD> 316<TD>TWL MODE :MEMSIZE=16MB</TD> 317 </TR> 318 <TR> 319<TD>IS-TWL-DEBUGGER</TD> 320<TD>TWL MODE :MEMSIZE=32MB</TD> 321 </TR> 322 </TBODY> 323</TABLE> 324<P><BR> <IMG src="image_TWL_PR_2.gif" border="0"><IMG src="image_TWL_PR_1.gif" border="0"></P> 325<P>Below is an enlarged representation of the 0x2000000 - 0x3000000 region in main memory. This region is the same for both the 16 MB setting and the 32 MB setting.</P> 326<P><IMG src="image_TWL_PR_1b.gif" border="0"></P> 327<H2>See Also</H2> 328<P><A href="../list_os.html#ProtectionUnit">An Overview of OS Functions (Protection Units)</A></P> 329<H2>Revision History</H2> 330<P>2008/12/02 Adjusted the starting position of the TWL ROM's ARM9 program.<BR>2008/09/08 Split descriptions for NITRO mode into NITRO ROM and HYBRID ROM NITRO. <BR>2008/08/20 Revised Region 3 for the TWL system. <BR>2007/11/26 Made significant revisions to the figures. <BR>2007/10/08 Added TWL-related descriptions. <BR>2006/05/12 Revised the table of default mappings. <BR>2005/04/13 Changed the address for ARM7-dedicated DTCM regions. <BR>2004/12/14 Revised terminology and word endings. <BR>2004/11/17 Initial version.</P> 331<hr><p>CONFIDENTIAL</p></body> 332</HTML>
