1<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 2<HTML> 3<HEAD> 4<META http-equiv="Content-Type" content="text/html; charset=windows-1252"> 5<META name="GENERATOR" content="IBM WebSphere Studio Homepage Builder Version 7.0.1.0 for Windows"> 6<META http-equiv="Content-Style-Type" content="text/css"> 7<TITLE>System State: Overview</TITLE> 8<LINK rel="stylesheet" href="../../css/nitro.css" type="text/css"> 9</HEAD> 10<BODY> 11<H1 align="left">System State: Overview <IMG src="../../image/NTR.gif" width="24" height="12" border="0" align="middle"><IMG src="../../image/TWL.gif" width="24" height="12" border="0" align="middle"></H1> 12<P>The functions in this category mainly handle the Current Program Status Register (CPSR) and state inside the co-processor 15 (CP15).</P> 13<H2>CPSR</H2> 14<P>The CPSR is a status register that contains the status of logical operations, the disable flag for FIQ and IRQ interrupts, and the processor mode.</P> 15<center> 16<IMG src="image_cpsr.gif" border="0"><BR> 17</center> 18<P>The <CODE>N</CODE>, <CODE>Z</CODE>, <CODE>C</CODE>, and <CODE>V</CODE> flags are conditional bits set by the results of logical operations. The <CODE>N</CODE> flag is set when the result of an operation is a negative value, the <CODE>Z</CODE> flag is set when the result of an operation is zero, the <CODE>C</CODE> flag is set when a carry occurs during an operation, and the <CODE>V</CODE> flag is set when an overflow occurs during an operation.</P> 19<P>The <CODE>Q</CODE> flags <CODE>QADD</CODE>, <CODE>QSUB</CODE>, <CODE>QDADD</CODE>, and <CODE>QDSUB</CODE> are used to find out when a saturation arithmetic operation caused an overflow.</P> 20<P>IRQ interrupts are disabled if the <CODE>I</CODE> flag is set.</P> 21<P>FIQ interrupts are disabled if the <CODE>F</CODE> flag is set.</P> 22<P>The <CODE>T</CODE> flag indicates the current processor state (ARM or Thumb), which is Thumb when the <CODE>T</CODE> flag is set.</P> 23<P>The mode bits are the processor mode and take one of the following seven values. The TWL system normally runs in system mode. It runs in IRQ mode during an interrupt.</P> 24<center> 25<TABLE border="1" style="width:50%"> 26 <TBODY> 27 <TR> 28<TH>mode bits</TH> 29<TH>Mode</TH> 30 </TR> 31 <TR> 32<TD>0b10000</TD> 33<TD>User mode</TD> 34 </TR> 35 <TR> 36<TD>0b10001</TD> 37<TD>FIQ mode</TD> 38 </TR> 39 <TR> 40<TD>0b10010</TD> 41<TD>IRQ mode</TD> 42 </TR> 43 <TR> 44<TD>0b10011</TD> 45<TD>Supervisor mode</TD> 46 </TR> 47 <TR> 48<TD>0b10111</TD> 49<TD>Abort mode</TD> 50 </TR> 51 <TR> 52<TD>0b11011</TD> 53<TD>Undefined mode</TD> 54 </TR> 55 <TR> 56<TD>0b11111</TD> 57<TD>System mode</TD> 58 </TR> 59 </TBODY> 60</TABLE> 61</center> 62<H2>Interrupt State (IRQ)</H2> 63<P>The <a href="OS_EnableInterrupts.html"><CODE>OS_EnableInterrupts</CODE></a> function clears the <CODE>I</CODE> bit. In other words, it enables IRQ interrupts.</P> 64<P>The <a href="OS_DisableInterrupts.html"><CODE>OS_DisableInterrupts</CODE></a> function sets the <CODE>I</CODE> bit. In other words, it disables IRQ interrupts.</P> 65<P>The <a href="OS_RestoreInterrupts.html"><CODE>OS_RestoreInterrupts</CODE></a> function sets the <CODE>I</CODE> bit to a designated state. In other words, it restores the IRQ interrupts to a designated state.</P> 66<P>These functions return the state before it is changed. This is used to restore the original state with <A href="OS_RestoreInterrupts.html"><CODE>OS_RestoreInterrupts</CODE></A> after <A href="OS_EnableInterrupts.html"><CODE>OS_EnableInterrupts</CODE></A> and <A href="OS_DisableInterrupts.html"><CODE>OS_DisableInterrupts</CODE></A> have changed the state and some processing has occurred. As shown in the following example, an interrupt state is usually changed and then recovered; these operations are used as a pair.</P> 67<BLOCKQUOTE style="background-color:#ffffc0;"><CODE>Example:<BR> OSIntrMode enabled = OS_EnableInterrups();<BR> :<BR>(void)OS_RestoreInterrupts( enabled );</CODE></BLOCKQUOTE> 68<H2>Interrupt State (IRQ and FIQ)</H2> 69<BLOCKQUOTE style="background-color:#ffe0e0;"><B><FONT color="#ff0000">Caution:</FONT></B><BR> <font color="#ff0033">Because FIQ interrupts are used with the debug tool, the application cannot use them. Also, applications normally have no need to use them. The functions for handling FIQs, as described here, were created for use with only certain types of software, such as system tools and middleware.</FONT></BLOCKQUOTE> 70<P>Similar to the IRQ interrupt functions, there are functions for configuring both the IRQ interrupts and the FIQ interrupts at the same time.</P> 71<P>The <a href="OS_EnableInterrupts_IrqAndFiq.html"><CODE>OS_EnableInterrupts_IrqAndFiq</CODE></a> function clears the <code>I</code> and <code>F</code> bits. In other words, it enables IRQ interrupts and FIQ interrupts.</P> 72<P>The <a href="OS_DisableInterrupts_IrqAndFiq.html"><CODE>OS_DisableInterrupts_IrqAndFiq</CODE></a> function sets the <code>I</code> and <code>F</code> bits. In other words, it enables IRQ interrupts and FIQ interrupts.</P> 73<P>The <a href="OS_RestoreInterrupts_IrqAndFiq.html"><CODE>OS_RestoreInterrupts_IrqAndFiq</CODE></a> function sets the <code>I</code> and <code>F</code> bits to designated states. In other words, it restores the IRQ interrupts and FIQ interrupts to designated states.</P> 74<P>The function groups related to these IRQ interrupts and FIQ interrupts use the <code>OS_RestoreInterrupts_IrqAndFiq</code> function for state recovery, and <CODE>Enable</CODE>/<CODE>Restore</CODE> or <CODE>Disable</CODE>/<CODE>Restore</CODE> are normally used as a pair.</P> 75<BLOCKQUOTE style="background-color:#ffffc0;"><B>Example:</B><BR> <CODE>OSIntrMode enabled = OS_EnableInterrups_IrqAndFiq();<BR> :<BR>(void)OS_RestoreInterrupts_IrqAndFiq( enabled );</CODE></BLOCKQUOTE> 76<H2>Getting the State (IRQ, Processor Mode)</H2> 77<P>Use the <a href="OS_GetCpsrIrq.html"><CODE>OS_GetCpsrIrq</CODE></a> function to get the current IRQ interrupt configuration.</P> 78<P>Use <a href="OS_GetProcMode.html"><CODE>OS_GetProcMode</CODE></a> function to get the current processor mode. Operations are normally performed in system mode.</P> 79<H2>Halting the CPU</H2> 80<P>When the CPU is idle, you can reduce power consumption by halting the CPU. It can receive interrupts and recover even if it is in this halt state. The function for halting is <a href="OS_Halt.html"><CODE>OS_Halt</CODE></a> on both the ARM9 and the ARM7.</P> 81<P>It is not necessary for the application side to be aware of this, but the ARM9 processor uses the CP15 function to enter the halt state, and the ARM7 side uses a system call.</P> 82<H2>Stopping the Program</H2> 83<P>The <A href="OS_Terminate.html"><CODE>OS_Terminate</CODE></A> function has been prepared for stopping the execution of the current program. This function disables IRQ interrupts internally and becomes a loop that calls the <A href="OS_Halt.html"><CODE>OS_Halt</CODE></A> function. There is no transition to other threads, and no interrupt handler is called after entering the loop. In NITRO mode, this function traps the ARM9 processor in a loop, but the ARM7 continues running. In TWL mode, both the ARM9 and ARM7 processors loop.</P> 84<P>The <A href="OS_Exit.html"><CODE>OS_Exit</CODE></A> and <A href="OS_FExit.html"><CODE>OS_FExit</CODE></A> functions also stop program execution. They display the specified status and call the <A href="OS_Terminate.html"><CODE>OS_Terminate</CODE></A> function. These functions can stop <A href="../../tools/loadrun.html"><CODE>loadrun</CODE></A> or <A href="../../tools/loadrunTWL.html"><CODE>loadrun.TWL</CODE></A> by displaying a string.</P> 85<P>The <A href="../debug/OS_Panic.html"><CODE>OS_Panic</CODE></A> and <A href="../debug/OS_FPanic.html"><CODE>OS_FPanic</CODE></A> functions are similar. These functions display the position of the halted program using the source filename and line number. They also display some specified string. These functions are used for debugging purposes; in FINALROM builds, they become equivalent to the <A href="OS_Terminate.html"><CODE>OS_Terminate</CODE></A> function.</P> 86<BLOCKQUOTE style="background-color:#ffffcc;"><B>Example:</B><BR> <CODE>OS_Terminate();<BR> <BR> OS_Exit( 100 );<BR> <BR> OS_Panic( "now stop (x=%d)", myX );</CODE></BLOCKQUOTE> 87<H2>Waiting</H2> 88<P>The <A href="OS_SpinWait.html"><CODE>OS_SpinWait</CODE></A>, <A href="OS_SpinWait.html"><CODE>OS_SpinWaitCpuCycles</CODE></A>, and <A href="OS_SpinWait.html"><CODE>OS_SpinWaitSysCycles</CODE></A> functions wait for a designated period of time by looping in accordance with the CPU. However, because the CPU only loops, when an interrupt occurs, it may not take longer than the designated time to return from the function. Interpret this as the "lower-limit wait time" for the designated time.</P> 89<P>The <A href="OS_SpinWait.html"><CODE>OS_SpinWait</CODE></A> function takes NITRO compatibility into consideration; it is based on an approximately 67-MHz ARM9 and an approximately 33-MHz ARM7. The ARM9's double-speed mode has no effect on this.</P> 90<P>The <A href="OS_SpinWait.html"><CODE>OS_SpinWaitCpuCycles</CODE></A> function is based on the CPU cycles. This is approximately 134 MHz when the ARM9 is running at double speed.</P> 91<P>The <A href="OS_SpinWait.html"><CODE>OS_SpinWaitSysCycles</CODE></A> function uses the base cycle (approximately 33 MHz) as a standard.</P> 92<H2>See Also</H2> 93<P><CODE><A href="../list_os.html#Cpsr">An Overview of OS Functions (System State)</A></CODE></P> 94<H2>Revision History</H2> 95<P>2009/04/13 Revised processor behavior when programs stop. <BR>2008/05/23 Added information on <CODE>OS_Panic</CODE>. <BR>2007/09/27 Added information on <CODE>OS_SpinWaitCpuCycles</CODE> and <CODE>OS_SpinWaitSysCycles</CODE>. <BR>2004/12/14 Revised terminology and word endings. <BR>2004/11/09 Initial version.</P> 96<hr><p>CONFIDENTIAL</p></body> 97</HTML>
