1 /*---------------------------------------------------------------------------* 2 Project: TwlSDK - HW - include 3 File: mmap_shared.h 4 5 Copyright 2003-2008 Nintendo. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 $Date:: 2008-09-17#$ 14 $Rev: 8556 $ 15 $Author: okubata_ryoma $ 16 *---------------------------------------------------------------------------*/ 17 #ifndef NITRO_HW_COMMON_MMAP_SHARED_H_ 18 #define NITRO_HW_COMMON_MMAP_SHARED_H_ 19 20 #ifdef __cplusplus 21 extern "C" { 22 #endif 23 24 //---------------------------------------------------------------------- 25 // MEMORY MAP of SYSTEM SHARED AREA 26 //---------------------------------------------------------------------- 27 // 28 #define HW_RED_RESERVED (HW_MAIN_MEM_EX_END - 0x800) // maybe change later 29 #define HW_RED_RESERVED_END (HW_RED_RESERVED + HW_RED_RESERVED_SIZE) 30 #define HW_RED_RESERVED_SIZE 0x200 31 32 /* original ROM-header of NITRO-CARD for downloaded program */ 33 #define HW_CARD_ROM_HEADER_SIZE 0x160 34 /* maximum size of parameters for downloaded program */ 35 #define HW_DOWNLOAD_PARAMETER_SIZE 0x20 36 37 //---- default address for shared memory arena 38 #define HW_SHARED_ARENA_LO_DEFAULT HW_MAIN_MEM_SHARED 39 #ifdef HW_RED_RESERVED 40 # define HW_SHARED_ARENA_HI_DEFAULT (HW_RED_RESERVED - HW_CARD_ROM_HEADER_SIZE - HW_DOWNLOAD_PARAMETER_SIZE) 41 #else 42 # define HW_SHARED_ARENA_HI_DEFAULT (HW_MAIN_MEM_SYSTEM - HW_CARD_ROM_HEADER_SIZE - HW_DOWNLOAD_PARAMETER_SIZE) 43 #endif 44 45 // 0x02fffa00-0x02fffa7f:(128byte):UNUSED 46 47 /* 0x02fffa80-0x02fffbdf:(352byte): original ROM-header */ 48 #define HW_CARD_ROM_HEADER (HW_MAIN_MEM + 0x00fffa80) 49 50 /* 0x02fffbe0-0x02fffbff:( 32byte): parameters for downloaded program */ 51 #define HW_DOWNLOAD_PARAMETER (HW_MAIN_MEM + 0x00fffbe0) 52 53 //-------------------------------- MainMemory shared area 54 #define HW_MAIN_MEM_SYSTEM_SIZE 0x400 55 #define HW_MAIN_MEM_SYSTEM (HW_MAIN_MEM_EX_END - 0x400) 56 57 #define HW_BOOT_CHECK_INFO_BUF (HW_MAIN_MEM_SYSTEM + 0x000) // Boot check info (END-0x400) 58 #define HW_BOOT_CHECK_INFO_BUF_END (HW_MAIN_MEM_SYSTEM + 0x020) // (END-0x3e0) 59 60 #define HW_RESET_PARAMETER_BUF (HW_MAIN_MEM_SYSTEM + 0x020) // reset parameter (END-0x3e0) 61 62 // 0x02fffc24-0x02fffc2b:(8byte):UNUSED 63 64 #define HW_ROM_BASE_OFFSET_BUF (HW_MAIN_MEM_SYSTEM + 0x02c) // ROM offset of own program (END-0x3d4) 65 #define HW_ROM_BASE_OFFSET_BUF_END (HW_MAIN_MEM_SYSTEM + 0x030) // (END-0x3d0) 66 67 #define HW_CTRDG_MODULE_INFO_BUF (HW_MAIN_MEM_SYSTEM + 0x030) // Cartridge module info (END-0x3d0) 68 #define HW_CTRDG_MODULE_INFO_BUF_END (HW_MAIN_MEM_SYSTEM + 0x03c) // (END-0x3c4) 69 70 #define HW_VBLANK_COUNT_BUF (HW_MAIN_MEM_SYSTEM + 0x03c) // VBlank counter (END-0x3c4) 71 72 #define HW_WM_BOOT_BUF (HW_MAIN_MEM_SYSTEM + 0x040) // WM buffer for Multi-Boot (END-0x3c0) 73 #define HW_WM_BOOT_BUF_END (HW_MAIN_MEM_SYSTEM + 0x080) // (END-0x380) 74 75 #define HW_NVRAM_USER_INFO (HW_MAIN_MEM_SYSTEM + 0x080) // NVRAM user info (END-0x380) 76 #define HW_NVRAM_USER_INFO_END (HW_MAIN_MEM_SYSTEM + 0x180) // (END-0x280) 77 78 #define HW_BIOS_EXCP_STACK_MAIN (HW_MAIN_MEM_SYSTEM + 0x180) // MAINP Debugger monitor exception handler (END-0x280) 79 #define HW_BIOS_EXCP_STACK_MAIN_END (HW_MAIN_MEM_SYSTEM + 0x19c) // (END-0x264) 80 #define HW_EXCP_VECTOR_MAIN (HW_MAIN_MEM_SYSTEM + 0x19c) // HW_EXCP_VECTOR_BUF for MAINP (END-0x264) 81 82 #define HW_ARENA_INFO_BUF (HW_MAIN_MEM_SYSTEM + 0x1a0) // Arena data structure (27F_FDA0 to 27F_FDE7) (END-0x260) 83 #define HW_REAL_TIME_CLOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x1e8) // RTC 84 85 #define HW_SYS_CONF_BUF (HW_MAIN_MEM_SYSTEM + 0x1f0) // System config data (END-0x210) 86 #define HW_SYS_CONF_BUF_END (HW_MAIN_MEM_SYSTEM + 0x1f6) // (END-0x20a) 87 88 #define HW_PRINT_OUTPUT_ARM9 (HW_MAIN_MEM_SYSTEM + 0x1f6) // debug print window for ARM9 89 #define HW_PRINT_OUTPUT_ARM7 (HW_MAIN_MEM_SYSTEM + 0x1f7) // debug print window for ARM7 90 #define HW_PRINT_OUTPUT_ARM9ERR (HW_MAIN_MEM_SYSTEM + 0x1f8) // debug print window for ARM9 error 91 #define HW_PRINT_OUTPUT_ARM7ERR (HW_MAIN_MEM_SYSTEM + 0x1f9) // debug print window for ARM7 error 92 93 #define HW_ROM_HEADER_BUF (HW_MAIN_MEM_SYSTEM + 0x200) // ROM-internal registration area data buffer (END-0x200) 94 #define HW_ROM_HEADER_BUF_END (HW_MAIN_MEM_SYSTEM + 0x360) // (END-0x0a0) 95 #define HW_ISD_RESERVED (HW_MAIN_MEM_SYSTEM + 0x360) // IS DEBUGGER Reserved (END-0xa0) 96 #define HW_ISD_RESERVED_END (HW_MAIN_MEM_SYSTEM + 0x380) // (END-0x80) 97 98 #define HW_PXI_SIGNAL_PARAM_ARM9 (HW_MAIN_MEM_SYSTEM + 0x380) // PXI Signal Param for ARM9 99 #define HW_PXI_SIGNAL_PARAM_ARM7 (HW_MAIN_MEM_SYSTEM + 0x384) // PXI Signal Param for ARM7 100 #define HW_PXI_HANDLE_CHECKER_ARM9 (HW_MAIN_MEM_SYSTEM + 0x388) // PXI Handle Checker for ARM9 101 #define HW_PXI_HANDLE_CHECKER_ARM7 (HW_MAIN_MEM_SYSTEM + 0x38c) // PXI Handle Checker for ARM7 102 103 #define HW_MIC_LAST_ADDRESS (HW_MAIN_MEM_SYSTEM + 0x390) // MIC newest sampling data storage address 104 #define HW_MIC_SAMPLING_DATA (HW_MAIN_MEM_SYSTEM + 0x394) // MIC individual sampling results 105 106 #define HW_WM_CALLBACK_CONTROL (HW_MAIN_MEM_SYSTEM + 0x396) // Parameter for WM callback synchronization 107 #define HW_WM_RSSI_POOL (HW_MAIN_MEM_SYSTEM + 0x398) // Random number source depends on WM received signal intensity 108 109 #define HW_SET_CTRDG_MODULE_INFO_ONCE (HW_MAIN_MEM_SYSTEM + 0x39a) // set ctrdg module info flag 110 #define HW_IS_CTRDG_EXIST (HW_MAIN_MEM_SYSTEM + 0x39b) // ctrdg exist flag 111 112 #define HW_COMPONENT_PARAM (HW_MAIN_MEM_SYSTEM + 0x39c) // Parameter for component synchronization 113 114 #define HW_THREADINFO_MAIN (HW_MAIN_MEM_SYSTEM + 0x3a0) // ThreadInfo for main processor 115 #define HW_THREADINFO_SUB (HW_MAIN_MEM_SYSTEM + 0x3a4) // ThreadInfo for sub processor 116 #define HW_BUTTON_XY_BUF (HW_MAIN_MEM_SYSTEM + 0x3a8) // buffer for X and Y Buttons 117 #define HW_TOUCHPANEL_BUF (HW_MAIN_MEM_SYSTEM + 0x3aa) // buffer for touch panel 118 #define HW_AUTOLOAD_SYNC_BUF (HW_MAIN_MEM_SYSTEM + 0x3ae) // buffer for autoload sync 119 120 #define HW_LOCK_ID_FLAG_MAIN (HW_MAIN_MEM_SYSTEM + 0x3b0) // lockID flag for main processor 121 #define HW_LOCK_ID_FLAG_SUB (HW_MAIN_MEM_SYSTEM + 0x3b8) // lockID flag for sub processor 122 123 // SpinLock Mutex 124 #define HW_VRAM_C_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3c0) // VRAM-C lock buffer (END-0x40) 125 #define HW_VRAM_D_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3c8) // VRAM-D lock buffer (END-0x38) 126 #define HW_WRAM_BLOCK0_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3d0) // CPU internal work RAM - Block0 - lock buffer (END-0x30) 127 #define HW_WRAM_BLOCK1_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3d8) // CPU internal work RAM - Block1 - lock buffer (END-0x28) 128 #define HW_CARD_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3e0) // Game Card - lock buffer (END-0x20) 129 #define HW_CTRDG_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3e8) // Game Pak - lock buffer (END-0x18) 130 #define HW_INIT_LOCK_BUF (HW_MAIN_MEM_SYSTEM + 0x3f0) // Initialization lock buffer (END-0x10) 131 132 #define HW_MMEMCHECKER_MAIN (HW_MAIN_MEM_SYSTEM + 0x3f8) // MainMemory Size Checker for main processor (END-8) 133 #define HW_MMEMCHECKER_SUB (HW_MAIN_MEM_SYSTEM + 0x3fa) // MainMemory Size Checker for sub processor (END-6) 134 135 #define HW_CMD_AREA (HW_MAIN_MEM_SYSTEM + 0x3fe) // Main memory command issue area (Prohibited use area) (END-2) 136 137 //-------------------------------------------------------------------- 138 //---- Lock area 139 #define HW_SHARED_LOCK_BUF (HW_VRAM_C_LOCK_BUF) 140 #define HW_SHARED_LOCK_BUF_END (HW_INIT_LOCK_BUF + 8) 141 142 #define HW_CHECK_DEBUGGER_SW (HW_MAIN_MEM_SYSTEM + 0x010) // (u16) debugger check switch. If 0, check buf1; else buf2. 143 #define HW_CHECK_DEBUGGER_BUF1 (HW_RED_RESERVED + 0x014) // (u16) debugger checker. 1 if run on debugger. 144 #define HW_CHECK_DEBUGGER_BUF2 (HW_MAIN_MEM_SYSTEM + 0x014) // (u16) debugger checker. 1 if run on debugger. 145 146 147 #ifdef __cplusplus 148 } /* extern "C" */ 149 #endif 150 /* NITRO_HW_COMMON_MMAP_SHARED_H_ */ 151 #endif 152