1 /*---------------------------------------------------------------------------* 2 Project: TwlSDK - HW - include 3 File: mmap_tcm.h 4 5 Copyright 2003-2008 Nintendo. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 $Date:: 2008-09-17#$ 14 $Rev: 8556 $ 15 $Author: okubata_ryoma $ 16 *---------------------------------------------------------------------------*/ 17 #ifndef NITRO_HW_MMAP_TCM_H_ 18 #define NITRO_HW_MMAP_TCM_H_ 19 20 #ifdef __cplusplus 21 extern "C" { 22 #endif 23 24 25 //---------------------------------------------------------------------- 26 // size definition in DTCM 27 //---------------------------------------------------------------------- 28 //---- stack size 29 #define HW_SYS_AND_IRQ_STACK_SIZE_MAX (HW_DTCM_SIZE - HW_SVC_STACK_SIZE - HW_DTCM_SYSRV_SIZE) 30 #define HW_SVC_STACK_SIZE 0x40 31 32 //---- system reserved size 33 #define HW_DTCM_SYSRV_SIZE 0x40 34 35 36 //---------------------------------------------------------------------- 37 // structure of DTCM 38 //---------------------------------------------------------------------- 39 #ifndef SDK_ASM 40 #include <nitro/types.h> 41 42 typedef volatile struct 43 { 44 //---- stack/heap area 45 u8 sys_and_irq_stack[HW_SYS_AND_IRQ_STACK_SIZE_MAX]; // 0000-3f80 system & irq stack 46 u8 svc_stack[HW_SVC_STACK_SIZE]; // 3f80-3fbf svc stack 47 48 //---- system reserved area 49 u8 reserved[HW_DTCM_SYSRV_SIZE - 8]; // 3fc0-3ff7 ???? 50 u32 intr_check; // 3ff8-3ffb intr_check for svc 51 void *intr_vector; // 3ffc-3fff intr handler 52 53 } 54 OS_DTCM; 55 #endif 56 57 //---------------------------------------------------------------------- 58 // other definition 59 //---------------------------------------------------------------------- 60 //---- stack address ( for initial stack pointer ) 61 #define HW_DTCM_SYS_STACK_DEFAULT (HW_DTCM) 62 #define HW_DTCM_IRQ_STACK_END (HW_DTCM_SVC_STACK) 63 #define HW_DTCM_SVC_STACK (HW_DTCM_SVC_STACK_END - HW_SVC_STACK_SIZE) 64 #define HW_DTCM_SVC_STACK_END (HW_DTCM + 0x00003fc0) 65 66 //---- offset in system reserved area 67 #define HW_DTCM_SYSRV_OFS_DEBUGGER 0x00 68 #define HW_DTCM_SYSRV_OFS_RESERVED2 0x1c 69 #define HW_DTCM_SYSRV_OFS_RESERVED 0x20 70 #define HW_DTCM_SYSRV_OFS_INTR_CHECK 0x38 71 #define HW_DTCM_SYSRV_OFS_INTR_VECTOR 0x3c 72 73 //---- system reserved area 74 #define HW_DTCM_SYSRV (HW_DTCM + 0x00003fc0) 75 #define HW_INTR_CHECK_BUF (HW_DTCM_SYSRV + HW_DTCM_SYSRV_OFS_INTR_CHECK) 76 #define HW_INTR_VECTOR_BUF (HW_DTCM_SYSRV + HW_DTCM_SYSRV_OFS_INTR_VECTOR) 77 78 #ifdef SDK_CWBUG_VSNPRINTF 79 // workaround until vsnprintf supports anti-strb 80 // allocate DTCM for string buffer 81 #define HW_DTCM_STRING_SIZE 256 82 #define HW_DTCM_STRING HW_DTCM 83 #endif 84 85 //---------------------------------------------------------------------- 86 // definition for Arena 87 //---------------------------------------------------------------------- 88 //---- default address for DTCM Arena 89 #define HW_DTCM_ARENA_LO_DEFAULT HW_DTCM 90 #define HW_DTCM_ARENA_HI_DEFAULT HW_DTCM 91 92 //---- default address for ITCM Arena 93 #define HW_ITCM_ARENA_LO_DEFAULT HW_ITCM 94 #define HW_ITCM_ARENA_HI_DEFAULT HW_ITCM_END 95 96 97 #ifdef __cplusplus 98 } /* extern "C" */ 99 #endif 100 /* NITRO_HW_MMAP_TCM_H_ */ 101 #endif 102