1 /*---------------------------------------------------------------------------* 2 Project: TwlSDK - IO Register List - 3 File: nitro/hw/ARM9/ioreg_PAD.h 4 5 Copyright 2003-2008 Nintendo. All rights reserved. 6 7 These coded instructions, statements, and computer programs contain 8 proprietary information of Nintendo of America Inc. and/or Nintendo 9 Company Ltd., and are protected by Federal copyright law. They may 10 not be disclosed to third parties or copied or duplicated in any form, 11 in whole or in part, without the prior written consent of Nintendo. 12 13 *---------------------------------------------------------------------------*/ 14 // 15 // I was generated automatically, don't edit me directly!!! 16 // 17 #ifndef NITRO_HW_ARM9_IOREG_PAD_H_ 18 #define NITRO_HW_ARM9_IOREG_PAD_H_ 19 20 #ifndef SDK_ASM 21 #include <nitro/types.h> 22 #include <nitro/hw/ARM9/mmap_global.h> 23 #endif 24 25 #ifdef __cplusplus 26 extern "C" { 27 #endif 28 29 /* 30 * Definition of Register offsets, addresses and variables. 31 */ 32 33 34 /* KEYINPUT */ 35 36 #define REG_KEYINPUT_OFFSET 0x130 37 #define REG_KEYINPUT_ADDR (HW_REG_BASE + REG_KEYINPUT_OFFSET) 38 #define reg_PAD_KEYINPUT (*(const REGType16v *) REG_KEYINPUT_ADDR) 39 40 /* KEYCNT */ 41 42 #define REG_KEYCNT_OFFSET 0x132 43 #define REG_KEYCNT_ADDR (HW_REG_BASE + REG_KEYCNT_OFFSET) 44 #define reg_PAD_KEYCNT (*( REGType16v *) REG_KEYCNT_ADDR) 45 46 47 /* 48 * Definitions of Register fields 49 */ 50 51 52 /* KEYINPUT */ 53 54 #define REG_PAD_KEYINPUT_L_SHIFT 9 55 #define REG_PAD_KEYINPUT_L_SIZE 1 56 #define REG_PAD_KEYINPUT_L_MASK 0x0200 57 58 #define REG_PAD_KEYINPUT_R_SHIFT 8 59 #define REG_PAD_KEYINPUT_R_SIZE 1 60 #define REG_PAD_KEYINPUT_R_MASK 0x0100 61 62 #define REG_PAD_KEYINPUT_DOWN_SHIFT 7 63 #define REG_PAD_KEYINPUT_DOWN_SIZE 1 64 #define REG_PAD_KEYINPUT_DOWN_MASK 0x0080 65 66 #define REG_PAD_KEYINPUT_UP_SHIFT 6 67 #define REG_PAD_KEYINPUT_UP_SIZE 1 68 #define REG_PAD_KEYINPUT_UP_MASK 0x0040 69 70 #define REG_PAD_KEYINPUT_LEFT_SHIFT 5 71 #define REG_PAD_KEYINPUT_LEFT_SIZE 1 72 #define REG_PAD_KEYINPUT_LEFT_MASK 0x0020 73 74 #define REG_PAD_KEYINPUT_RIGHT_SHIFT 4 75 #define REG_PAD_KEYINPUT_RIGHT_SIZE 1 76 #define REG_PAD_KEYINPUT_RIGHT_MASK 0x0010 77 78 #define REG_PAD_KEYINPUT_START_SHIFT 3 79 #define REG_PAD_KEYINPUT_START_SIZE 1 80 #define REG_PAD_KEYINPUT_START_MASK 0x0008 81 82 #define REG_PAD_KEYINPUT_SEL_SHIFT 2 83 #define REG_PAD_KEYINPUT_SEL_SIZE 1 84 #define REG_PAD_KEYINPUT_SEL_MASK 0x0004 85 86 #define REG_PAD_KEYINPUT_B_SHIFT 1 87 #define REG_PAD_KEYINPUT_B_SIZE 1 88 #define REG_PAD_KEYINPUT_B_MASK 0x0002 89 90 #define REG_PAD_KEYINPUT_A_SHIFT 0 91 #define REG_PAD_KEYINPUT_A_SIZE 1 92 #define REG_PAD_KEYINPUT_A_MASK 0x0001 93 94 #ifndef SDK_ASM 95 #define REG_PAD_KEYINPUT_FIELD( l, r, down, up, left, right, start, sel, b, a ) \ 96 (u16)( \ 97 ((u32)(l) << REG_PAD_KEYINPUT_L_SHIFT) | \ 98 ((u32)(r) << REG_PAD_KEYINPUT_R_SHIFT) | \ 99 ((u32)(down) << REG_PAD_KEYINPUT_DOWN_SHIFT) | \ 100 ((u32)(up) << REG_PAD_KEYINPUT_UP_SHIFT) | \ 101 ((u32)(left) << REG_PAD_KEYINPUT_LEFT_SHIFT) | \ 102 ((u32)(right) << REG_PAD_KEYINPUT_RIGHT_SHIFT) | \ 103 ((u32)(start) << REG_PAD_KEYINPUT_START_SHIFT) | \ 104 ((u32)(sel) << REG_PAD_KEYINPUT_SEL_SHIFT) | \ 105 ((u32)(b) << REG_PAD_KEYINPUT_B_SHIFT) | \ 106 ((u32)(a) << REG_PAD_KEYINPUT_A_SHIFT)) 107 #endif 108 109 110 /* KEYCNT */ 111 112 #define REG_PAD_KEYCNT_LOGIC_SHIFT 15 113 #define REG_PAD_KEYCNT_LOGIC_SIZE 1 114 #define REG_PAD_KEYCNT_LOGIC_MASK 0x8000 115 116 #define REG_PAD_KEYCNT_INTR_SHIFT 14 117 #define REG_PAD_KEYCNT_INTR_SIZE 1 118 #define REG_PAD_KEYCNT_INTR_MASK 0x4000 119 120 #define REG_PAD_KEYCNT_L_SHIFT 9 121 #define REG_PAD_KEYCNT_L_SIZE 1 122 #define REG_PAD_KEYCNT_L_MASK 0x0200 123 124 #define REG_PAD_KEYCNT_R_SHIFT 8 125 #define REG_PAD_KEYCNT_R_SIZE 1 126 #define REG_PAD_KEYCNT_R_MASK 0x0100 127 128 #define REG_PAD_KEYCNT_DOWN_SHIFT 7 129 #define REG_PAD_KEYCNT_DOWN_SIZE 1 130 #define REG_PAD_KEYCNT_DOWN_MASK 0x0080 131 132 #define REG_PAD_KEYCNT_UP_SHIFT 6 133 #define REG_PAD_KEYCNT_UP_SIZE 1 134 #define REG_PAD_KEYCNT_UP_MASK 0x0040 135 136 #define REG_PAD_KEYCNT_LEFT_SHIFT 5 137 #define REG_PAD_KEYCNT_LEFT_SIZE 1 138 #define REG_PAD_KEYCNT_LEFT_MASK 0x0020 139 140 #define REG_PAD_KEYCNT_RIGHT_SHIFT 4 141 #define REG_PAD_KEYCNT_RIGHT_SIZE 1 142 #define REG_PAD_KEYCNT_RIGHT_MASK 0x0010 143 144 #define REG_PAD_KEYCNT_START_SHIFT 3 145 #define REG_PAD_KEYCNT_START_SIZE 1 146 #define REG_PAD_KEYCNT_START_MASK 0x0008 147 148 #define REG_PAD_KEYCNT_SEL_SHIFT 2 149 #define REG_PAD_KEYCNT_SEL_SIZE 1 150 #define REG_PAD_KEYCNT_SEL_MASK 0x0004 151 152 #define REG_PAD_KEYCNT_B_SHIFT 1 153 #define REG_PAD_KEYCNT_B_SIZE 1 154 #define REG_PAD_KEYCNT_B_MASK 0x0002 155 156 #define REG_PAD_KEYCNT_A_SHIFT 0 157 #define REG_PAD_KEYCNT_A_SIZE 1 158 #define REG_PAD_KEYCNT_A_MASK 0x0001 159 160 #ifndef SDK_ASM 161 #define REG_PAD_KEYCNT_FIELD( logic, intr, l, r, down, up, left, right, start, sel, b, a ) \ 162 (u16)( \ 163 ((u32)(logic) << REG_PAD_KEYCNT_LOGIC_SHIFT) | \ 164 ((u32)(intr) << REG_PAD_KEYCNT_INTR_SHIFT) | \ 165 ((u32)(l) << REG_PAD_KEYCNT_L_SHIFT) | \ 166 ((u32)(r) << REG_PAD_KEYCNT_R_SHIFT) | \ 167 ((u32)(down) << REG_PAD_KEYCNT_DOWN_SHIFT) | \ 168 ((u32)(up) << REG_PAD_KEYCNT_UP_SHIFT) | \ 169 ((u32)(left) << REG_PAD_KEYCNT_LEFT_SHIFT) | \ 170 ((u32)(right) << REG_PAD_KEYCNT_RIGHT_SHIFT) | \ 171 ((u32)(start) << REG_PAD_KEYCNT_START_SHIFT) | \ 172 ((u32)(sel) << REG_PAD_KEYCNT_SEL_SHIFT) | \ 173 ((u32)(b) << REG_PAD_KEYCNT_B_SHIFT) | \ 174 ((u32)(a) << REG_PAD_KEYCNT_A_SHIFT)) 175 #endif 176 177 178 #ifdef __cplusplus 179 } /* extern "C" */ 180 #endif 181 182 /* NITRO_HW_ARM9_IOREG_PAD_H_ */ 183 #endif 184