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7<TITLE>MI_SetNDmaInterval</TITLE>
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11<H1 align="left">MI_SetNDmaInterval <IMG src="../../image/TWL.gif" width="24" height="12" border="0" align=middle></H1>
12<H2>Syntax</H2>
13<DL>
14  <DD><CODE>#include &lt;twl/mi.h&gt;</CODE><BR>
15  <BR>
16  <CODE>void MI_SetNDmaInterval( u32 ndmaNo, u32 intervalTimer, u32 prescaler );</CODE>
17  </DL>
18<H2>Arguments</H2>
19<TABLE border="1" width="100%">
20  <TBODY>
21    <TR>
22      <TD><EM><STRONG>ndmaNo</STRONG></EM></TD>
23      <TD>DMA number (0-3).</TD>
24    </TR>
25    <TR>
26      <TD><EM><STRONG>intervalTimer</STRONG></EM></TD>
27      <TD>Block transfer interval value (0-0xFFFF)</TD>
28    </TR>
29    <TR>
30      <TD><EM><STRONG>prescaler</STRONG></EM></TD>
31      <TD>Prescaler (MI_NDMA_INTERVAL_PS_n).</TD>
32    </TR>
33  </TBODY>
34</TABLE>
35<H2>Return Values</H2>
36<P>None.</P>
37<H2>Description</H2>
38<P>Sets the block transfer interval value and prescaler when the TWL's new DMA is run.</P>
39<P>The settings are made in the values of the internal DMA config structure (<CODE>MINDmaConfig</CODE>), and these values will be used thereafter unless the developer designates something else in other code. The target DMA is specified by <STRONG><EM>ndmaNo</EM></STRONG>.</P>
40<P><B><I>intervalTimer</I></B> is a down-counter. The larger this value is, the longer the interval will be. If 0, the block DMA will continue to run for the duration of the entire transfer word count.</P>
41<P><B><I>prescaler</I></B> is a prescaler for the counter, and takes the following values:<BR>
42</P>
43<TABLE border="1">
44  <TBODY>
45    <TR>
46      <TH>Value</TH>
47      <TH>Description</TH>
48    </TR>
49    <TR>
50      <TD><CODE>MI_NDMA_INTERVAL_PS_1</CODE></TD>
51      <TD>System clock (33.514 MHz)</TD>
52    </TR>
53    <TR>
54      <TD><CODE>MI_NDMA_INTERVAL_PS_4</CODE></TD>
55      <TD>1/4th of the system clock</TD>
56    </TR>
57    <TR>
58      <TD><CODE>MI_NDMA_INTERVAL_PS_16</CODE></TD>
59      <TD>1/16th of the system clock</TD>
60    </TR>
61    <TR>
62      <TD><CODE>MI_NDMA_INTERVAL_PS_64</CODE></TD>
63      <TD>1/64th of the System Clock</TD>
64    </TR>
65  </TBODY>
66</TABLE>
67<P><BR> If the DMA enable flag is 1, changes will be ignored.</P>
68<H2>Internal Operation</H2>
69<P>Sets a value in the internal DMA config structure. When DMA is actually run, this will be set in the <CODE>DMAxBCNT</CODE> register.</P>
70<H2>See Also</H2>
71<P><CODE><A href="MI_GetNDmaIntervalTimer.html">MI_GetNDmaIntervalTimer</A>, <A href="MI_GetNDmaIntervalPrescaler.html">MI_GetNDmaIntervalPrescaler</A><BR></CODE></P>
72<H2>Revision History</H2>
73<P>2007/09/07 Initial version.</P>
74<hr><p>CONFIDENTIAL</p></body>
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