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11<H1 align="left">MI_DispMemDmaCopy <IMG src="../../image/NTR.gif" align="middle"><IMG src="../../image/TWL.gif" align="middle"></H1>
12<H2>Syntax</H2>
13<DL>
14  <DD><CODE>#include &lt;nitro/mi.h&gt;</CODE><BR>
15  <BR>
16  <CODE>void MI_DispMemDmaCopy( u32 dmaNo, const void* src );</CODE><BR>
17  <BR>
18</DL>
19<H2>Arguments</H2>
20<TABLE border="1" width="100%">
21  <TBODY>
22    <TR>
23      <TD width="13%"><EM><STRONG>dmaNo</STRONG></EM></TD>
24      <TD width="87%">DMA channel used.</TD>
25    </TR>
26    <TR>
27      <TD width="13%"><EM><STRONG>src</STRONG></EM></TD>
28      <TD width="87%">The transfer source address.</TD>
29    </TR>
30  </TBODY>
31</TABLE>
32<H2>Return Values</H2>
33<P>None.</P>
34<H2>Description</H2>
35<P>This function performs DMA memory transfers in the main memory display startup mode.</P>
36<P><FONT color="#ff0000">When using this mode, the access right to main memory should be set to &quot;ARM9 Priority.&quot; Otherwise, the screen may not display properly because of a delay as ARM7 accesses main memory and starts up DMA memory. The access right priority can be specified with <code>MI_SetMainMemoryPriority</code>.</P>
37<H2>Internal Operation</H2>
38<P>Uses the following IO registers: DMA<i>n</i> source register (0x40000B0 + 12<i>n</i>), DMA<i>n</i> destination register (0x40000B4 + 12<i>n</i>), and DMA<i>n</i> control register (0x40000B8 + 12<i>n</i>). (<i>n</i> is the DMA channel used.))</P>
39<H2>See Also</H2>
40<P><CODE><A href="MI_DmaCopy.html">MI_DmaCopy*</A><BR> <A href="../exmemory/MI_SetMainMemoryPriority.html">MI_SetMainMemoryPriority</A><BR></CODE></P>
41<H2>Revision History</H2>
42<P>2004/08/26 Added description about the setting of the ARM9 priority to access the main memory when using DMA memory.<br> 2003/12/01 Initial version.</P>
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