1  /*---------------------------------------------------------------------------*
2   Project:  PICA register macro header
3   File:     gx_MacroTexture.h
4 
5   Copyright (C)2010 Nintendo Co., Ltd. All rights reserved.
6 
7   These coded instructions, statements, and computer programs contain
8   proprietary information of Nintendo of America Inc. and/or Nintendo
9   Company Ltd., and are protected by Federal copyright law.  They may
10   not be disclosed to third parties or copied or duplicated in any form,
11   in whole or in part, without the prior written consent of Nintendo.
12 
13   $Revision: 25351 $
14  *---------------------------------------------------------------------------*/
15 #ifndef NN_GX_CTR_PICA_MACRO_TEXTURE_H_
16 #define NN_GX_CTR_PICA_MACRO_TEXTURE_H_
17 
18 #include <nn/gx/CTR/gx_MacroCommon.h>
19 
20 ///////////////////////////////////
21 // Texture Address
22 
23 // PICA_REG_TEXTURE0_ADDR1       0x085
24 // PICA_REG_TEXTURE0_ADDR2       0x086
25 // PICA_REG_TEXTURE0_ADDR3       0x087
26 // PICA_REG_TEXTURE0_ADDR4       0x088
27 // PICA_REG_TEXTURE0_ADDR5       0x089
28 // PICA_REG_TEXTURE0_ADDR6       0x08a
29 // PICA_REG_TEXTURE2_ADDR        0x09d
30 // PICA_REG_TEXTURE1_ADDR        0x095
31 #define PICA_CMD_DATA_TEXTURE_ADDR( addr ) \
32     ( (u32)(addr) >> 3 )
33 
34 /*
35 struct CommandTexCubeMap
36 {
37     CMD_PADDING(22);
38     u32 CubeMap   : 6;
39     CMD_PADDING(4);
40 };
41 */
42 
43 enum PicaDataTexture
44 {
45     PICA_DATA_TEXTURE_2D                  = 0x0,
46     PICA_DATA_TEXTURE_CUBE_MAP_POSITIVE_X = 0x0,
47     PICA_DATA_TEXTURE_CUBE_MAP_NEGATIVE_X = 0x1,
48     PICA_DATA_TEXTURE_CUBE_MAP_POSITIVE_Y = 0x2,
49     PICA_DATA_TEXTURE_CUBE_MAP_NEGATIVE_Y = 0x3,
50     PICA_DATA_TEXTURE_CUBE_MAP_POSITIVE_Z = 0x4,
51     PICA_DATA_TEXTURE_CUBE_MAP_NEGATIVE_Z = 0x5
52 };
53 
54 // PICA_REG_TEXTURE0_ADDR1      0x085
55 #define PICA_CMD_DATA_TEXTURE_CUBE_MAP_ADDR(cubeMapAddr) \
56     ( (cubeMapAddr) & 0x3fffff )
57 
58 ///////////////////////////////////
59 // Texture combiner
60 // TexEnv
61 
62 /*
63 struct CommandTexEnvSrc
64 {
65     u32 srcRgb0   : 4;
66     u32 srcRgb1   : 4;
67     u32 srcRgb2   : 4;
68     CMD_PADDING(4);
69     u32 srcAlpha0 : 4;
70     u32 srcAlpha1 : 4;
71     u32 srcAlpha2 : 4;
72     CMD_PADDING(4);
73 };
74 */
75 
76 enum PicaDataTexEnvSrc
77 {
78     PICA_DATA_TEX_ENV_SRC_RGBA_PRIMARY_COLOR                = 0x0,
79     PICA_DATA_TEX_ENV_SRC_RGBA_FRAGMENT_PRIMARY_COLOR_DMP   = 0x1,
80     PICA_DATA_TEX_ENV_SRC_RGBA_FRAGMENT_SECONDARY_COLOR_DMP = 0x2,
81     PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE0                     = 0x3,
82     PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE1                     = 0x4,
83     PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE2                     = 0x5,
84     PICA_DATA_TEX_ENV_SRC_RGBA_TEXTURE3                     = 0x6,
85     PICA_DATA_TEX_ENV_SRC_RGBA_PREVIOUS_BUFFER_DMP          = 0xd,
86     PICA_DATA_TEX_ENV_SRC_RGBA_CONSTANT                     = 0xe,
87     PICA_DATA_TEX_ENV_SRC_RGBA_PREVIOUS                     = 0xf
88 };
89 
90 #define PICA_TEX_ENV_SRC_RGB0_SHIFT         0
91 #define PICA_TEX_ENV_SRC_RGB1_SHIFT         4
92 #define PICA_TEX_ENV_SRC_RGB2_SHIFT         8
93 #define PICA_TEX_ENV_SRC_ALPHA0_SHIFT      16
94 #define PICA_TEX_ENV_SRC_ALPHA1_SHIFT      20
95 #define PICA_TEX_ENV_SRC_ALPHA2_SHIFT      24
96 
97 // PICA_REG_TEX_ENV0            0x0c0
98 // PICA_REG_TEX_ENV1            0x0c8
99 // PICA_REG_TEX_ENV2            0x0d0
100 // PICA_REG_TEX_ENV3            0x0d8
101 // PICA_REG_TEX_ENV4            0x0f0
102 // PICA_REG_TEX_ENV5            0x0f8
103 #define PICA_CMD_DATA_TEX_ENV_SRC( srcRgb0, srcRgb1, srcRgb2, \
104                                    srcAlpha0, srcAlpha1, srcAlpha2 ) \
105     ( (srcRgb0)   << PICA_TEX_ENV_SRC_RGB0_SHIFT   | \
106       (srcRgb1)   << PICA_TEX_ENV_SRC_RGB1_SHIFT   | \
107       (srcRgb2)   << PICA_TEX_ENV_SRC_RGB2_SHIFT   | \
108       (srcAlpha0) << PICA_TEX_ENV_SRC_ALPHA0_SHIFT | \
109       (srcAlpha1) << PICA_TEX_ENV_SRC_ALPHA1_SHIFT | \
110       (srcAlpha2) << PICA_TEX_ENV_SRC_ALPHA2_SHIFT )
111 
112 /*
113 struct CommandTexEnvOperand
114 {
115     u32 operandRg0    : 4;
116     u32 operandRg1    : 4;
117     u32 operandRg2    : 4;
118     u32 operandAlpha0 : 3;
119     CMD_PADDING(1);
120     u32 operandAlpha1 : 3;
121     CMD_PADDING(1);
122     u32 operandAlpha2 : 3;
123     CMD_PADDING(9);
124 };
125 */
126 
127 enum PicaDataTexEnvOperand
128 {
129     PICA_DATA_OPE_RGB_SRC_COLOR            = 0x0,
130     PICA_DATA_OPE_RGB_ONE_MINUS_SRC_COLOR  = 0x1,
131     PICA_DATA_OPE_RGB_SRC_ALPHA            = 0x2,
132     PICA_DATA_OPE_RGB_ONE_MINUS_SRC_ALPHA  = 0x3,
133     PICA_DATA_OPE_RGB_SRC_R_DMP            = 0x4,
134     PICA_DATA_OPE_RGB_ONE_MINUS_SRC_R_DMP  = 0x5,
135     PICA_DATA_OPE_RGB_SRC_G_DMP            = 0x8,
136     PICA_DATA_OPE_RGB_ONE_MINUS_SRC_G_DMP  = 0x9,
137     PICA_DATA_OPE_RGB_SRC_B_DMP            = 0xc,
138     PICA_DATA_OPE_RGB_ONE_MINUS_SRC_B_DMP  = 0xd,
139 
140     PICA_DATA_OPE_ALPHA_SRC_ALPHA           = 0x0,
141     PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_ALPHA = 0x1,
142     PICA_DATA_OPE_ALPHA_SRC_R_DMP           = 0x2,
143     PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_R_DMP = 0x3,
144     PICA_DATA_OPE_ALPHA_SRC_G_DMP           = 0x4,
145     PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_G_DMP = 0x5,
146     PICA_DATA_OPE_ALPHA_SRC_B_DMP           = 0x6,
147     PICA_DATA_OPE_ALPHA_ONE_MINUS_SRC_B_DMP = 0x7
148 };
149 
150 
151 #define PICA_TEX_ENV_OPE_RGB0_SHIFT         0
152 #define PICA_TEX_ENV_OPE_RGB1_SHIFT         4
153 #define PICA_TEX_ENV_OPE_RGB2_SHIFT         8
154 #define PICA_TEX_ENV_OPE_ALPHA0_SHIFT      12
155 #define PICA_TEX_ENV_OPE_ALPHA1_SHIFT      16
156 #define PICA_TEX_ENV_OPE_ALPHA2_SHIFT      20
157 
158 // PICA_REG_TEX_ENV0_OPERAND    0x0c1
159 // PICA_REG_TEX_ENV1_OPERAND    0x0c9
160 // PICA_REG_TEX_ENV2_OPERAND    0x0d1
161 // PICA_REG_TEX_ENV3_OPERAND    0x0d9
162 // PICA_REG_TEX_ENV4_OPERAND    0x0f1
163 // PICA_REG_TEX_ENV5_OPERAND    0x0f9
164 #define PICA_CMD_DATA_TEX_ENV_OPERAND(operandRgb0, operandRgb1, operandRgb2, \
165                                       operandAlpha0, operandAlpha1, operandAlpha2) \
166     ( (operandRgb0)   << PICA_TEX_ENV_OPE_RGB0_SHIFT   | \
167       (operandRgb1)   << PICA_TEX_ENV_OPE_RGB1_SHIFT   | \
168       (operandRgb2)   << PICA_TEX_ENV_OPE_RGB2_SHIFT   | \
169       (operandAlpha0) << PICA_TEX_ENV_OPE_ALPHA0_SHIFT | \
170       (operandAlpha1) << PICA_TEX_ENV_OPE_ALPHA1_SHIFT | \
171       (operandAlpha2) << PICA_TEX_ENV_OPE_ALPHA2_SHIFT )
172 
173 /*
174 struct CommandTexEnvCombine
175 {
176     u32 combineRgb   : 4;
177     CMD_PADDING(12);
178     u32 combineAlpha : 4;
179     CMD_PADDING(12);
180 };
181 */
182 
183 enum PicaDataTexEnvCombine
184 {
185     PICA_DATA_TEX_ENV_COMBINE_REPLACE      = 0x0,
186     PICA_DATA_TEX_ENV_COMBINE_MODULATE     = 0x1,
187     PICA_DATA_TEX_ENV_COMBINE_ADD          = 0x2,
188     PICA_DATA_TEX_ENV_COMBINE_ADD_SIGNED   = 0x3,
189     PICA_DATA_TEX_ENV_COMBINE_INTERPOLATE  = 0x4,
190     PICA_DATA_TEX_ENV_COMBINE_SUBTRACT     = 0x5,
191     PICA_DATA_TEX_ENV_COMBINE_DOT3_RGB     = 0x6,
192     PICA_DATA_TEX_ENV_COMBINE_DOT3_RGBA    = 0x7,
193     PICA_DATA_TEX_ENV_COMBINE_MULT_ADD_DMP = 0x8,
194     PICA_DATA_TEX_ENV_COMBINE_ADD_MULT_DMP = 0x9
195 };
196 
197 // PICA_REG_TEX_ENV0_COMBINE    0x0c2
198 // PICA_REG_TEX_ENV1_COMBINE    0x0ca
199 // PICA_REG_TEX_ENV2_COMBINE    0x0d2
200 // PICA_REG_TEX_ENV3_COMBINE    0x0da
201 // PICA_REG_TEX_ENV4_COMBINE    0x0f2
202 // PICA_REG_TEX_ENV5_COMBINE    0x0fa
203 #define PICA_CMD_DATA_TEX_ENV_COMBINE( combineRgb, combineAlpha ) \
204     ( (combineRgb) | (combineAlpha) << 16 )
205 
206 /*
207 struct CommandTexEnvConst
208 {
209     u32 constRgb1  : 8;
210     u32 constRgb2  : 8;
211     u32 constRgb3  : 8;
212     u32 constRgb4  : 8;
213 };
214 */
215 // PICA_REG_TEX_ENV0_COLOR      0x0c3
216 // PICA_REG_TEX_ENV1_COLOR      0x0cb
217 // PICA_REG_TEX_ENV2_COLOR      0x0d3
218 // PICA_REG_TEX_ENV3_COLOR      0x0db
219 // PICA_REG_TEX_ENV4_COLOR      0x0f3
220 // PICA_REG_TEX_ENV5_COLOR      0x0fb
221 #define PICA_CMD_DATA_TEX_ENV_CONST( constRgb0, constRgb1, constRgb2, constRgb3 ) \
222     ((constRgb0) | (constRgb1) << 8 | (constRgb2) << 16 | (constRgb3) << 24)
223 
224 /*
225 struct CommandTexEnvScale
226 {
227     u32 scaleRgb   : 2;
228     CMD_PADDING(14);
229     u32 scaleAlpha : 2;
230     CMD_PADDING(14);
231 };
232 */
233 
234 enum PicaDataTexEnvScale
235 {
236     PICA_DATA_TEX_ENV_SCALE_1 = 0x0,
237     PICA_DATA_TEX_ENV_SCALE_2 = 0x1,
238     PICA_DATA_TEX_ENV_SCALE_4 = 0x2
239 };
240 
241 // PICA_REG_TEX_ENV0_SCALE      0x0c4
242 // PICA_REG_TEX_ENV1_SCALE      0x0cc
243 // PICA_REG_TEX_ENV2_SCALE      0x0d4
244 // PICA_REG_TEX_ENV3_SCALE      0x0dc
245 // PICA_REG_TEX_ENV4_SCALE      0x0f4
246 // PICA_REG_TEX_ENV5_SCALE      0x0fc
247 #define PICA_CMD_DATA_TEX_ENV_SCALE( scaleRgb, scaleAlpha ) \
248     ( (scaleRgb) | (scaleAlpha) << 16 )
249 
250 #define PICA_CMD_DATA_TEX_ENV_BUFFER_COLOR_WHITE 0xffffffff
251 #define PICA_CMD_DATA_TEX_ENV_BUFFER_COLOR_BLACK 0x00000000
252 
253 // PICA_REG_TEX_ENV_BUF_COLOR    0x0fd
254 #define PICA_CMD_DATA_COLOR( color8 ) \
255     ( (color8.r) | (color8.g) << 8 | (color8.b) << 16 | (color8.a) << 24 )
256 
257 /*
258 struct CommandTexEnvBufInput
259 {
260     CMD_PADDING(8);
261     u32 bufInput1 : 4; // 1 bit in this field
262     CMD_PADDING(4);
263     u32 bufInput2 : 4; // 1 bin in this field
264     CMD_PADDING(12);
265 };
266 */
267 
268 enum PicaDataTexEnvBufferInput
269 {
270     PICA_DATA_TEX_ENV_BUFFER_INPUT_PREVIOUS_BUFFER_DMP = 0x0,
271     PICA_DATA_TEX_ENV_BUFFER_INPUT_PREVIOUS            = 0x1
272 };
273 
274 // PICA_REG_TEX_ENV_BUF_INPUT    0x0e0
275 // i is index of dmp_TexEnv[i]. The values are 1, 2, 3, 4 only.
276 
277 #define PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(i, bufInput0, bufInput1) \
278     ((bufInput0) << 7+(i) | (bufInput1) << 11+(i))
279 
280 // 0x0e0 [15:8]
281 #define PICA_CMD_SET_TEX_ENV_BUFFER_INPUT(bufInput0_0, bufInput0_1,     \
282                                           bufInput1_0, bufInput1_1,     \
283                                           bufInput2_0, bufInput2_1,     \
284                                           bufInput3_0, bufInput3_1)     \
285   ( PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(1, bufInput0_0, bufInput0_1) |   \
286     PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(2, bufInput1_0, bufInput1_1) |   \
287     PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(3, bufInput2_0, bufInput2_1) |   \
288     PICA_CMD_DATA_TEX_ENV_BUFFER_INPUT(4, bufInput3_0, bufInput3_1) ) , \
289     PICA_CMD_HEADER_SINGLE_BE(PICA_REG_GAS_FOG_MODE, 0x2)
290 
291 ///////////////////////////////////
292 // Shadow Textrue
293 //
294 /*
295 struct CommandTextureShadow
296 {
297     u32 perspectiveShadow : 1;
298     u32 shadowZBias       : 23;
299     u32 shadowZScale      : 8;
300 };
301 */
302 
303 // PICA_REG_TEXTURE0_SHADOW      0x08b
304 #define PICA_CMD_DATA_TEXTURE_SHADOW(perspectiveShadow, shadowZBias, shadowZScale) \
305     (( (perspectiveShadow) ? 0 : 1) | (shadowZBias) << 1 | (shadowZScale) << 24)
306 
307 ///////////////////////////////////
308 // Texture Sampler
309 // Texture Texcoord
310 // Texture Cache Clear
311 /*
312 struct CommandTextureFunc
313 {
314     u32 type0_0 : 1;
315     u32 type1   : 1;
316     u32 type2   : 1;
317     CMD_PADDING(1);   // 0x0
318     CMD_PADDING(4);
319     u32 texcoord3   : 2;
320     u32 type3   : 1;
321     CMD_PADDING(1);
322     CMD_PADDING(1);   // 0x1
323     u32 texcoord2   : 1;
324     CMD_PADDING(2);
325     u32 clear : 1;
326     CMD_PADDING(15);
327 
328 };
329 */
330 
331 //  Texture Sampler
332 enum PicaDataTexture0SamplerType
333 {
334     PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_2D              = 0x0,
335     PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_CUBE_MAP        = 0x1,
336     PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_SHADOW_2D_DMP   = 0x2,
337     PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_PROJECTION_DMP  = 0x3,
338     PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_SHADOW_CUBE_DMP = 0x4,
339     // For 0x80[0:0]
340     PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_FALSE           = 0x5
341 };
342 
343 enum PicaDataTexture1SamplerType
344 {
345     PICA_DATA_TEXTURE1_SAMPLER_TYPE_FALSE      = 0x0,
346     PICA_DATA_TEXTURE1_SAMPLER_TYPE_TEXTURE_2D = 0x1
347 };
348 
349 enum PicaDataTexture2SamplerType
350 {
351     PICA_DATA_TEXTURE2_SAMPLER_TYPE_FALSE      = 0x0,
352     PICA_DATA_TEXTURE2_SAMPLER_TYPE_TEXTURE_2D = 0x1
353 };
354 
355 enum PicaDataTexture3SamplerType
356 {
357     PICA_DATA_TEXTURE3_SAMPLER_TYPE_FALSE                  = 0x0,
358     PICA_DATA_TEXTURE3_SAMPLER_TYPE_TEXTURE_PROCEDURAL_DMP = 0x1
359 };
360 
361 enum PicaDataTexture2TexCoord
362 {
363     PICA_DATA_TEXTURE2_TEXCOORD_TEXTURE1 = 0x1,
364     PICA_DATA_TEXTURE2_TEXCOORD_TEXTURE2 = 0x0
365 };
366 
367 enum PicaDataTexture3TexCoord
368 {
369     PICA_DATA_TEXTURE3_TEXCOORD_TEXTURE0 = 0x0,
370     PICA_DATA_TEXTURE3_TEXCOORD_TEXTURE1 = 0x1,
371     PICA_DATA_TEXTURE3_TEXCOORD_TEXTURE2 = 0x2
372 };
373 
374 // PICA_REG_TEXTURE_FUNC 0x080
375 #define PICA_CMD_DATA_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType, \
376                                    texture3Texcoord, texture3SamplerType, \
377                                    texture2Texcoord, clearTextureCache)   \
378     ( ((texture0SamplerType == PICA_DATA_TEXTURE0_SAMPLER_TYPE_TEXTURE_FALSE) ? 0 : 1)  | \
379       ((texture1SamplerType) ? 1 : 0)     <<  1  | \
380       ((texture2SamplerType) ? 1 : 0)     <<  2  | \
381       0                                   <<  3  | \
382        (texture3Texcoord)                 <<  8  | \
383       ((texture3SamplerType) ? 1 : 0)     << 10  | \
384       1                                   << 12  | \
385       ((texture2Texcoord) ? 1 : 0)        << 13  | \
386       (clearTextureCache)                 << 16  | \
387       0 << 17 )
388 
389 #define PICA_CMD_SET_TEXTURE_FUNC_CLEAR(texture0SamplerType, texture1SamplerType, texture2SamplerType, \
390                                         texture3SamplerType, texture2Texcoord, texture3Texcoord)       \
391     PICA_CMD_DATA_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType,          \
392                                texture3Texcoord, texture3SamplerType,                                  \
393                                texture2Texcoord, 0x1),                                                 \
394     PICA_CMD_HEADER_SINGLE_BE( PICA_REG_TEXTURE_FUNC, 0xB ),                                           \
395     1 << 16,                                                                                           \
396     PICA_CMD_HEADER_SINGLE_BE( PICA_REG_TEXTURE_FUNC, 0x4 )
397 
398 #define PICA_CMD_SET_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType, \
399                                         texture3SamplerType, texture2Texcoord, texture3Texcoord) \
400     PICA_CMD_DATA_TEXTURE_FUNC(texture0SamplerType, texture1SamplerType, texture2SamplerType,    \
401                                texture3Texcoord, texture3SamplerType,                            \
402                                texture2Texcoord, 0x0),                                           \
403     PICA_CMD_HEADER_SINGLE_BE( PICA_REG_TEXTURE_FUNC, 0xB )
404 
405 ///////////////////////////////////
406 // Procedural Texture
407 //
408 /*
409 struct CommandProcTex0
410 {
411     u32 ptClampU        : 3;
412     u32 ptClampV        : 4;
413     u32 ptRgbMap        : 4;
414     u32 ptAlphaMap      : 4;
415     u32 ptAlphaSeparate : 1;
416     u32 ptNoiseEnable   : 1;
417     u32 ptShiftU        : 2;
418     u32 ptShiftV        : 2;
419     u32 ptTexBias1       : 8;
420     CMD_PADDING(3);
421 };
422 */
423 
424 enum PicaDataProcTexMap
425 {
426     PICA_DATA_PROCTEX_U_DMP        = 0x0,
427     PICA_DATA_PROCTEX_U2_DMP       = 0x1,
428     PICA_DATA_PROCTEX_V_DMP        = 0x2,
429     PICA_DATA_PROCTEX_V2_DMP       = 0x3,
430     PICA_DATA_PROCTEX_ADD_DMP      = 0x4,
431     PICA_DATA_PROCTEX_ADD2_DMP     = 0x5,
432     PICA_DATA_PROCTEX_ADDSQRT2_DMP = 0x6,
433     PICA_DATA_PROCTEX_MIN_DMP      = 0x7,
434     PICA_DATA_PROCTEX_MAX_DMP      = 0x8,
435     PICA_DATA_PROCTEX_RMAX_DMP     = 0x9
436 };
437 
438 enum PicaDataProcTexClamp
439 {
440     PICA_DATA_PROCTEX_CLAMP_TO_ZERO_DMP       = 0x0,
441     PICA_DATA_PROCTEX_CLAMP_TO_EDGE           = 0x1,
442     PICA_DATA_PROCTEX_SYMMETRICAL_REPEAT_DMP  = 0x2,
443     PICA_DATA_PROCTEX_MIRRORED_REPEAT         = 0x3,
444     PICA_DATA_PROCTEX_PULSE_DMP               = 0x4
445 };
446 
447 enum PicaDataProcTexShift
448 {
449     PICA_DATA_PROCTEX_NONE_DMP = 0x0,
450     PICA_DATA_PROCTEX_ODD_DMP  = 0x1,
451     PICA_DATA_PROCTEX_EVEN_DMP = 0x2
452 };
453 
454 // PICA_REG_TEXTURE3_PROCTEX0     0x0a8
455 #define PICA_CMD_DATA_PROCTEX0(ptClampU, ptClampV, \
456     ptRgbMap, ptAlphaMap, ptAlphaSeparate,         \
457     ptNoiseEnable, ptShiftU, ptShiftV, ptTexBiasF16Low8) \
458     ( (ptClampU)                         | \
459       (ptClampV)                   <<  3 | \
460       (ptRgbMap)                   <<  6 | \
461       (ptAlphaMap)                 << 10 | \
462       (ptAlphaSeparate ? 1 : 0)    << 14 | \
463       (ptNoiseEnable ? 1 : 0)      << 15 | \
464       (ptShiftU)                   << 16 | \
465       (ptShiftV)                   << 18 | \
466       (ptTexBiasF16Low8)           << 20 )
467 
468 /*
469 struct CommandProcTex1
470 {
471     u32 ptNoiseU1  : 32;
472 };
473 */
474 
475 // PICA_REG_TEXTURE3_PROCTEX1    0x0a9
476 #define PICA_CMD_DATA_PROCTEX1(ptNoiseU1) (ptNoiseU1)
477 
478 /*
479 struct CommandProcTex2
480 {
481     u32 ptNoiseV1  : 32;
482 };
483 */
484 // PICA_REG_TEXTURE3_PROCTEX2    0x0aa
485 #define PICA_CMD_DATA_PROCTEX2(ptNoiseV1) (ptNoiseV1)
486 
487 /*
488 struct CommandProcTex3
489 {
490     u32 ptNoiseU2  : 16;
491     u32 ptNoiseV2  : 16;
492 };
493 */
494 // PICA_REG_TEXTURE3_PROCTEX3    0x0ab
495 #define PICA_CMD_DATA_PROCTEX3(ptNoiseU0, ptNoiseV0) \
496     ( (ptNoiseU0) | (ptNoiseV0) << 16 )
497 
498 /*
499 struct CommandProcTex4
500 {
501     u32 ptMinFilter  : 3;
502     CMD_PADDING(8);     // 0x60
503     u32 ptTexWidth   : 8;
504     u32 ptTexBias2   : 8;
505     CMD_PADDING(5);
506 };
507 */
508 
509 enum PicaDataProcTexFilter
510 {
511     PICA_DATA_PROCTEX_NEAREST                = 0x0,
512     PICA_DATA_PROCTEX_LINEAR                 = 0x1,
513     PICA_DATA_PROCTEX_NEAREST_MIPMAP_NEAREST = 0x2,
514     PICA_DATA_PROCTEX_LINEAR_MIPMAP_NEAREST  = 0x3,
515     PICA_DATA_PROCTEX_NEAREST_MIPMAP_LINEAR  = 0x4,
516     PICA_DATA_PROCTEX_LINEAR_MIPMAP_LINEAR   = 0x5
517 };
518 
519 // PICA_REG_TEXTURE3_PROCTEX4    0x0ac
520 #define PICA_CMD_DATA_PROCTEX4(ptMinFilter, ptTexWidth, ptTexBiasF16Hi8) \
521     ( (ptMinFilter)                 | \
522        0x60                   <<  3 | \
523       (ptTexWidth)            << 11 | \
524       (ptTexBiasF16Hi8) << 19 )
525 
526 /*
527 struct CommandProcTex5
528 {
529     u32 ptTexOffset  : 8;
530     CMD_PADDING(24);   // 0xe0c080
531 };
532 */
533 
534 // PICA_REG_TEXTURE3_PROCTEX5    0x0ad
535 #define PICA_CMD_DATA_PROCTEX5(ptTexOffset) \
536     ( (ptTexOffset) | 0xe0c08000 )
537 
538 ///////////////////////////////////
539 // Procedural texture Reference Table
540 /*
541 struct CommandProTexRefTab
542 {
543     u32 index    : 8;
544     u32 attrib   : 4;
545     CMD_PADDING(20);
546 };
547 */
548 
549 enum PicaDataProcTexRefTable
550 {
551     PICA_DATA_PROCTEX_NOISE_REF_TABLE      = 0x0,
552     PICA_DATA_PROCTEX_RGB_MAP_REF_TABLE    = 0x2,
553     PICA_DATA_PROCTEX_ALPHA_MAP_REF_TABLE  = 0x3,
554     PICA_DATA_PROCTEX_COLOR_REF_TABLE      = 0x4,
555     PICA_DATA_PROCTEX_COLOR_DIFF_REF_TABLE = 0x5
556 };
557 
558 // PICA_REG_PROCTEX_LUT         0x0af
559 #define PICA_CMD_DATA_PROCTEX_LUT(index, refTable) \
560     ((index) | (refTable) << 8)
561 
562 // PICA_REG_PROCTEX_LUT_DATA0  0x0b0
563 // PICA_REG_PROCTEX_LUT_DATA1  0x0b1
564 // PICA_REG_PROCTEX_LUT_DATA2  0x0b2
565 // PICA_REG_PROCTEX_LUT_DATA3  0x0b3
566 // PICA_REG_PROCTEX_LUT_DATA4  0x0b4
567 // PICA_REG_PROCTEX_LUT_DATA5  0x0b5
568 // PICA_REG_PROCTEX_LUT_DATA6  0x0b6
569 // PICA_REG_PROCTEX_LUT_DATA7  0x0b7
570 #define PICA_CMD_DATA_PROCTEX_LUT_DATA(data) (data)
571 
572 ///////////////////////////////////
573 // Texture Resolution
574 /*
575 struct CommandTexSize
576 {
577     u32 height : 16;
578     u32 width  : 16;
579 };
580 */
581 
582 // PICA_REG_TEXTURE0_SIZE        0x082
583 // PICA_REG_TEXTURE1_SIZE        0x092
584 // PICA_REG_TEXTURE2_SIZE        0x09a
585 #define PICA_CMD_DATA_TEXTURE_SIZE( width, height ) \
586     ( (height) | (width) << 16 )
587 
588 ///////////////////////////////////
589 // Texture Format
590 enum PicaDataTextureFormat
591 {
592     PICA_DATA_TEXTURE_FORMAT_RGBA_UNSIGNED_BYTE                    = 0x0,
593     PICA_DATA_TEXTURE_FORMAT_RGB_UNSIGNED_BYTE                     = 0x1,
594     PICA_DATA_TEXTURE_FORMAT_RGBA_UNSIGNED_SHORT_5_5_5_1           = 0x2,
595     PICA_DATA_TEXTURE_FORMAT_RGB_UNSIGNED_SHORT_5_6_5              = 0x3,
596     PICA_DATA_TEXTURE_FORMAT_RGBA_UNSIGNED_SHORT_4_4_4_4           = 0x4,
597     PICA_DATA_TEXTURE_FORMAT_LUMINANCE_ALPHA_UNSIGNED_BYTE         = 0x5,
598     PICA_DATA_TEXTURE_FORMAT_HILO8_DMP_UNSIGNED_BYTE               = 0x6,
599     PICA_DATA_TEXTURE_FORMAT_LUMINANCE_UNSIGNED_BYTE               = 0x7,
600     PICA_DATA_TEXTURE_FORMAT_ALPHA_UNSIGNED_BYTE                   = 0x8,
601     PICA_DATA_TEXTURE_FORMAT_LUMINANCE_ALPHA_UNSIGNED_BYTE_4_4_DMP = 0x9,
602     PICA_DATA_TEXTURE_FORMAT_LUMINANCE_UNSIGNED_4BITS_DMP          = 0xa,
603     PICA_DATA_TEXTURE_FORMAT_ALPHA_UNSIGNED_4BITS_DMP              = 0xb,
604     PICA_DATA_TEXTURE_FORMAT_ETC1_RGB8_NATIVE_DMP                  = 0xc,
605     PICA_DATA_TEXTURE_FORMAT_ETC1_ALPHA_RGB8_A4_NATIVE_DMP         = 0xd
606 };
607 
608 // PICA_REG_TEXTURE0_FORMAT      0x08e
609 // PICA_REG_TEXTURE1_FORMAT      0x096
610 // PICA_REG_TEXTURE2_FORMAT      0x09e
611 #define PICA_CMD_DATA_TEXTURE_FORMAT_TYPE( type ) (type)
612 
613 ///////////////////////////////////
614 // Texture Wrap Mode
615 // Texture Wrap Filter
616 // Texture Sampler
617 // Texture Format
618 // Texture Shadow Enable
619 /*
620 struct CommandTex0WrapFilter
621 {
622     CMD_PADDING(1);
623     u32 magFilter  : 1;
624     u32 minFilter1 : 1;
625     CMD_PADDING(1);
626     u32 isETC1    : 2;
627     CMD_PADDING(2);
628     u32 wrapT     : 3;
629     CMD_PADDING(1);
630     u32 wrapS     : 3;
631     CMD_PADDING(1);
632     CMD_PADDING(2);       // set to 0 [17:16]
633     CMD_PADDING(2);
634     u32 enable    : 1;
635     CMD_PADDING(3);
636     u32 minFilter2 : 1;
637     CMD_PADDING(3);
638     u32 type1_1 : 3;
639     CMD_PADDING(1);
640 };
641 */
642 
643 
644 
645 enum PicaDataTextureMagFilter
646 {
647     PICA_DATA_TEXTURE_MAG_FILTER_NEAREST                = 0x0,
648     PICA_DATA_TEXTURE_MAG_FILTER_LINEAR                 = 0x1
649 };
650 
651 enum PicaDataTextureMinFilter
652 {
653     PICA_DATA_TEXTURE_MIN_FILTER_NEAREST                = 0x0,
654     PICA_DATA_TEXTURE_MIN_FILTER_NEAREST_MIPMAP_NEAREST = 0x1,
655     PICA_DATA_TEXTURE_MIN_FILTER_NEAREST_MIPMAP_LINEAR  = 0x2,
656     PICA_DATA_TEXTURE_MIN_FILTER_LINEAR                 = 0x3,
657     PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_NEAREST  = 0x4,
658     PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_LINEAR   = 0x5
659 };
660 
661 #define PICA_CMD_DATA_TEXTURE_MIN_FILTER0(texture0MinFilter) \
662     ( ( ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR ) ||                \
663         ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_NEAREST ) || \
664         ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_LINEAR  ) )  \
665         ? 1 : 0 )
666 
667 #define PICA_CMD_DATA_TEXTURE_MIN_FILTER1(texture0MinFilter) \
668     ( ( ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_NEAREST_MIPMAP_LINEAR ) || \
669         ( (texture0MinFilter) == PICA_DATA_TEXTURE_MIN_FILTER_LINEAR_MIPMAP_LINEAR  ) )  \
670         ? 1 : 0 )
671 
672 // 0x083, 0x093, 0x09b
673 enum PicaDataTextureWrap
674 {
675     PICA_DATA_TEXTURE_WRAP_CLAMP_TO_EDGE   = 0,
676     PICA_DATA_TEXTURE_WRAP_CLAMP_TO_BORDER = 1,
677     PICA_DATA_TEXTURE_WRAP_REPEAT          = 2,
678     PICA_DATA_TEXTURE_WRAP_MIRRORED_REPEAT = 3
679 };
680 
681 
682 #define PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter, \
683     textureFormat, textureWrapT, textureWrapS, \
684     useShadowTexture, textureSamplerType )     \
685     (  (textureMagFilter)                                                         <<  1 | \
686        PICA_CMD_DATA_TEXTURE_MIN_FILTER0(textureMinFilter)                        <<  2 | \
687       ((textureFormat == PICA_DATA_TEXTURE_FORMAT_ETC1_RGB8_NATIVE_DMP) ? 2 : 0 ) <<  4 | \
688        (textureWrapT)                                                             <<  8 | \
689        (textureWrapS)                                                             << 12 | \
690        0                                                                          << 16 | \
691        (useShadowTexture)                                                         << 20 | \
692        PICA_CMD_DATA_TEXTURE_MIN_FILTER1(textureMinFilter)                        << 24 | \
693        (textureSamplerType) << 28 )
694 
695 #define PICA_CMD_DATA_TEXTURE0_WRAP_FILTER( textureMagFilter, textureMinFilter,        \
696                                             textureFormat, textureWrapT, textureWrapS, \
697                                             useShadowTexture, textureSamplerType )     \
698     PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter,             \
699                                        textureFormat, textureWrapT, textureWrapS,      \
700                                        useShadowTexture, textureSamplerType )
701 
702 #define PICA_CMD_DATA_TEXTURE1_WRAP_FILTER( textureMagFilter, textureMinFilter,    \
703                                         textureFormat, textureWrapT, textureWrapS) \
704     PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter,         \
705                                        textureFormat, textureWrapT, textureWrapS,  \
706                                        0x0, 0x0)
707 
708 #define PICA_CMD_DATA_TEXTURE2_WRAP_FILTER( textureMagFilter, textureMinFilter,     \
709                                         textureFormat, textureWrapT, textureWrapS ) \
710     PICA_CMD_DATA_TEXTURE_WRAP_FILTER( textureMagFilter, textureMinFilter,          \
711                                        textureFormat, textureWrapT, textureWrapS,   \
712                                        0x0, 0x0)
713 
714 /*
715 struct CommandTex12WrapFilter
716 {
717     CMD_PADDING(1);
718     u32 magFilter  : 1;
719     u32 minFilter1 : 1;
720     CMD_PADDING(1);
721     u32 isETC1    : 2;
722     CMD_PADDING(2);
723     u32 wrapT     : 3;
724     CMD_PADDING(1);
725     u32 wrapS     : 3;
726     CMD_PADDING(2); // set to 0[17:16]
727     CMD_PADDING(7);
728     u32 minFilter2 : 1;
729     CMD_PADDING(7);
730 };
731 */
732 
733 ///////////////////////////////////
734 // Texture LOD Level
735 // Texture LOD Bias
736 /*
737 struct CommandTexLODLev
738 {
739     u32 bias : 12;
740     u32 max : 4;
741     CMD_PADDING(4);
742     u32 min : 4;
743     CMD_PADDING(4);
744 };
745 */
746 
747 // PICA_REG_TEXTURE0_LOD         0x084
748 // PICA_REG_TEXTURE1_LOD         0x094
749 // PICA_REG_TEXTURE2_LOD         0x09c
750 #define PICA_CMD_DATA_TEXTURE_LOD_LEVEL(lodBias, maxLodLevel, minLodLevel) \
751     (  (lodBias)                              | \
752        (maxLodLevel)                    << 16 | \
753       (((minLodLevel) < 0) ? 0 : (minLodLevel)) << 24 )
754 
755 ///////////////////////////////////
756 // Texture Border Color
757 
758 // PICA_REG_TEXTURE0_BORDER_COLOR  0x081
759 // PICA_REG_TEXTURE1_BORDER_COLOR  0x091
760 // PICA_REG_TEXTURE2_BORDER_COLOR  0x099
761 #define PICA_CMD_DATA_BORDER_COLOR( color8 ) \
762     ( (color8.r)       | \
763       (color8.g) <<  8 | \
764       (color8.b) << 16 | \
765       (color8.a) << 24 )
766 
767 #endif  // NN_GX_CTR_PICA_MACRO_TEXTURE_H_
768