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14<h1 align="left">GX_SetBankForLCDC <img src="../../image/NTR.gif"align="middle"><img src="../../image/TWL.gif" align="middle"></H1>
15<H2>Syntax</H2>
16
17<dl>
18  <dd>
19<CODE>#include &lt;nitro/gx/gx_vramcnt.h&gt;</CODE><BR>
20  <BR>
21  <CODE>void GX_SetBankForLCDC(int lcdc);</CODE></dd>
22</dl><h2>Arguments</h2>
23
24<table border="1" width="100%">
25  <tr>
26    <td width="13%"><em><strong><font face="Courier New"><em><strong><code>lcdc</code></strong></em>&nbsp;&nbsp;</font></strong></em></td>
27    <td width="87%">Specifies a VRAM bank to allocate to LCDC</td>
28  </tr>
29  </table>
30<h2>Return Values</h2>
31<p>None.</p>
32<H2>Description</H2>
33<P>This function allocates the specified VRAM bank to LCDC. If the specified VRAM bank is disabled, this allocates the VRAM bank to LCDC. The logical OR of <code>GXVRamLCDC</code> values is used as the argument.
34</P>
35<TABLE border="1">
36  <TBODY>
37    <TR>
38      <TD><CODE>GX_VRAM_LCDC_NONE</CODE></TD>
39      <TD>The VRAM bank is not allocated to LCDC.</TD>
40    </TR>
41    <TR>
42      <TD><CODE>GX_VRAM_LCDC_A</CODE></TD>
43      <TD>VRAM-A is allocated to LCDC.</TD>
44    </TR>
45    <TR>
46      <TD><CODE>GX_VRAM_LCDC_B</CODE></TD>
47      <TD>VRAM-B is allocated to LCDC.</TD>
48    </TR>
49    <TR>
50      <TD><CODE>GX_VRAM_LCDC_C</CODE></TD>
51      <TD>VRAM-C is allocated to LCDC.</TD>
52    </TR>
53    <TR>
54      <TD><CODE>GX_VRAM_LCDC_D</CODE></TD>
55      <TD>VRAM-D is allocated to LCDC.</TD>
56    </TR>
57    <TR>
58      <TD><CODE>GX_VRAM_LCDC_E</CODE></TD>
59      <TD>VRAM-E is allocated to LCDC.</TD>
60    </TR>
61    <TR>
62      <TD><CODE>GX_VRAM_LCDC_F</CODE></TD>
63      <TD>VRAM-F is allocated to LCDC.</TD>
64    </TR>
65    <TR>
66      <TD><CODE>GX_VRAM_LCDC_G</CODE></TD>
67      <TD>VRAM-G is allocated to LCDC.</TD>
68    </TR>
69    <TR>
70      <TD><CODE>GX_VRAM_LCDC_H</CODE></TD>
71      <TD>VRAM-H is allocated to LCDC.</TD>
72    </TR>
73    <TR>
74      <TD><CODE>GX_VRAM_LCDC_I</CODE></TD>
75      <TD>VRAM-I is allocated to LCDC.</TD>
76    </TR>
77    <TR>
78      <TD><CODE>GX_VRAM_LCDC_ALL</CODE></TD>
79      <TD>All VRAM are allocated to LCDC.</TD>
80    </TR>
81  </TBODY>
82</TABLE>
83<P>The following indicates the type definition for <CODE>GXVRamLCDC</CODE> types.</P>
84<PRE><CODE>typedef enum
85{
86    GX_VRAM_LCDC_NONE = 0x0000,
87    GX_VRAM_LCDC_A = GX_VRAM_A,                    // ARM9: HW_LCDC_VRAM_A  --&gt;  HW_LCDC_VRAM_B
88    GX_VRAM_LCDC_B = GX_VRAM_B,                    // ARM9: HW_LCDC_VRAM_B  --&gt;  HW_LCDC_VRAM_C
89    GX_VRAM_LCDC_C = GX_VRAM_C,                    // ARM9: HW_LCDC_VRAM_C  --&gt;  HW_LCDC_VRAM_D
90    GX_VRAM_LCDC_D = GX_VRAM_D,                    // ARM9: HW_LCDC_VRAM_D  --&gt;  HW_LCDC_VRAM_E
91    GX_VRAM_LCDC_E = GX_VRAM_E,                    // ARM9: HW_LCDC_VRAM_E  --&gt;  HW_LCDC_VRAM_F
92    GX_VRAM_LCDC_F = GX_VRAM_F,                    // ARM9: HW_LCDC_VRAM_F  --&gt;  HW_LCDC_VRAM_G
93    GX_VRAM_LCDC_G = GX_VRAM_G,                    // ARM9: HW_LCDC_VRAM_G  --&gt;  HW_LCDC_VRAM_H
94    GX_VRAM_LCDC_H = GX_VRAM_H,                    // ARM9: HW_LCDC_VRAM_H  --&gt;  HW_LCDC_VRAM_I
95    GX_VRAM_LCDC_I = GX_VRAM_I,                    // ARM9: HW_LCDC_VRAM_I  --&gt;  HW_LCDC_VRAM_END
96    GX_VRAM_LCDC_ALL = 0x01ff                      // ARM9: HW_LCDC_VRAM_A  --&gt;  HW_LCDC_VRAM_END
97}
98GXVRamLCDC;</CODE></PRE>
99<h2>See Also</h2>
100<P><a href="GX_GetBankForLCDC.html"><code>GX_GetBankForLCDC</code></a>, <a href="GX_DisableBankForLCDC.html"><code>GX_DisableBankForLCDC</code></a></P>
101<H2>Revision History</H2>
102<P>2004/01/19 Initial version.</P>
103<hr><p>CONFIDENTIAL</p></body>
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