1<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 2<html> 3 4<head> 5<META http-equiv="Content-Type" content="text/html; charset=windows-1252"> 6<META name="GENERATOR" content="IBM WebSphere Studio Homepage Builder Version 8.0.0.0 for Windows"> 7<META http-equiv="Content-Style-Type" content="text/css"> 8<title>GX_SetBankForBGEx</title> 9<LINK rel="stylesheet" href="../../css/nitro.css" type="text/css"> 10</head> 11 12<body> 13 14<h1 align="left">GX_SetBankForBGEx <img src="../../image/NTR.gif"align="middle"><img src="../../image/TWL.gif" align="middle"></H1> 15<H2>Syntax</H2> 16 17<dl> 18 <dd> 19<CODE>#include <nitro/gx/gx_vramcnt.h></CODE><BR> 20 <BR> 21 <CODE>void GX_SetBankForBGEx(GXVRamBG bg1, GXVRamBG bg2);</CODE></dd> 22</dl><h2>Arguments</h2> 23 24<table border="1" width="100%"> 25 26 <tr> 27 <td width="13%"><em><strong><font face="Courier New">bg1</font></strong></em></td> 28 <td width="87%">Specifies the VRAM banks allocated to the BG-VRAM addresses 0x6000000-0x6017FFF in the main 2D engine. Only combinations of VRAM-E, F, and G can be set.</td> 29 </tr> 30 <TR> 31 <TD><em><strong><font face="Courier New">bg2</font></strong></em></TD> 32 <TD>Specifies the VRAM banks allocated to the BG-VRAM addresses 0x6020000-0x607FFFF in the main 2D engine. Only combinations of VRAM-A, B, C, and D can be set, and the maximum size is 512 KB.</TD> 33 </TR> 34 </table> 35<h2>Return Values</h2> 36<p>None.</p> 37<H2>Description</H2> 38<P>This function sets combinations of banks that cannot be mapped to concatenated addresses in BG-VRAM.</P> 39<P>When you use this function to set VRAM banks, you can map VRAM-E, F, and G to the concatenated addresses starting from 0x6000000 in BG-VRAM, and you can map VRAM-A, B, C, and D to the concatenated addresses starting from 0x6020000. 40</P> 41<TABLE border="1"> 42 <TBODY> 43 <TR><TD colspan="2"><B>Parameters that can be specified for the first argument:</B></TD></TR> 44 <TR> 45 <TD><CODE>GX_VRAM_BG_16_F</CODE></TD> 46 <TD>16 KB are reserved in BG. VRAM-F is allocated.</TD> 47 </TR> 48 <TR> 49 <TD><CODE>GX_VRAM_BG_16_G</CODE></TD> 50 <TD>16 KB are reserved in BG. VRAM-G is allocated.</TD> 51 </TR> 52 <TR> 53 <TD><CODE>GX_VRAM_BG_32_FG</CODE></TD> 54 <TD>32 KB are reserved in BG. VRAM-F and -G are allocated.</TD> 55 </TR> 56 <TR> 57 <TD><CODE>GX_VRAM_BG_64_E</CODE></TD> 58 <TD>64 KB are reserved in BG. VRAM-E is allocated.</TD> 59 </TR> 60 <TR> 61 <TD><CODE>GX_VRAM_BG_80_EF</CODE></TD> 62 <TD>80 KB are reserved in BG. VRAM-E and -F are allocated.</TD> 63 </TR> 64 <TR> 65 <TD><CODE>GX_VRAM_BG_96_EFG</CODE></TD> 66 <TD>96 KB are reserved in BG. VRAM-E, -F, and -G are allocated.</TD> 67 </TR> 68 <TR> 69 <TD><CODE>GX_VRAM_BG_80_EG</CODE></TD> 70 <TD>80 KB are reserved in BG. VRAM-E and -G are allocated.</TD> 71 </TR> 72 <TR><TD colspan="2"><B>Parameters that can be specified for the second argument:</B></TD></TR> 73 <TR> 74 <TD><CODE>GX_VRAM_BG_128_A</CODE></TD> 75 <TD>128 KB are reserved in BG. VRAM-A is allocated.</TD> 76 </TR> 77 <TR> 78 <TD><CODE>GX_VRAM_BG_128_B</CODE></TD> 79 <TD>128 KB are reserved in BG. VRAM-B is allocated.</TD> 80 </TR> 81 <TR> 82 <TD><CODE>GX_VRAM_BG_128_C</CODE></TD> 83 <TD>128 KB are reserved in BG. VRAM-C is allocated.</TD> 84 </TR> 85 <TR> 86 <TD><CODE>GX_VRAM_BG_128_D</CODE></TD> 87 <TD>128 KB are reserved in BG. VRAM-D is allocated.</TD> 88 </TR> 89 <TR> 90 <TD><CODE>GX_VRAM_BG_256_AB</CODE></TD> 91 <TD>256 KB are reserved in BG. VRAM-A and -B are allocated.</TD> 92 </TR> 93 <TR> 94 <TD><CODE>GX_VRAM_BG_256_BC</CODE></TD> 95 <TD>256 KB are reserved in BG. VRAM-B and -C are allocated.</TD> 96 </TR> 97 <TR> 98 <TD><CODE>GX_VRAM_BG_256_CD</CODE></TD> 99 <TD>256 KB are reserved in BG. VRAM-C and -D are allocated.</TD> 100 </TR> 101 <TR> 102 <TD><CODE>GX_VRAM_BG_384_ABC</CODE></TD> 103 <TD>384 KB are reserved in BG. VRAM-A, -B, and -C are allocated.</TD> 104 </TR> 105 <TR> 106 <TD><CODE>GX_VRAM_BG_384_BCD</CODE></TD> 107 <TD>384 KB are reserved in BG. VRAM-B, -C, and -D are allocated.</TD> 108 </TR> 109 <TR> 110 <TD><CODE>GX_VRAM_BG_256_AC</CODE></TD> 111 <TD>256 KB are reserved in BG. VRAM-A and -C are allocated.</TD> 112 </TR> 113 <TR> 114 <TD><CODE>GX_VRAM_BG_256_AD</CODE></TD> 115 <TD>256 KB are reserved in BG. VRAM-A and -D are allocated.</TD> 116 </TR> 117 <TR> 118 <TD><CODE>GX_VRAM_BG_256_BD</CODE></TD> 119 <TD>256 KB are reserved in BG. VRAM-B and -D are allocated.</TD> 120 </TR> 121 <TR> 122 <TD><CODE>GX_VRAM_BG_384_ABD</CODE></TD> 123 <TD>384 KB are reserved in BG. VRAM-A, -B, and -D are allocated.</TD> 124 </TR> 125 <TR> 126 <TD><CODE>GX_VRAM_BG_384_ACD</CODE></TD> 127 <TD>384 KB are reserved in BG. VRAM-A, -C, and -D are allocated.</TD> 128 </TR> 129 </TBODY> 130</TABLE> 131<P><BR> The following is the type definition for <CODE>GXVRamBG</CODE> types:</P> 132<PRE><CODE> 133typedef enum 134{ 135 GX_VRAM_BG_NONE = 0x0000, 136 GX_VRAM_BG_16_F = GX_VRAM_F, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_F_SIZE 137 GX_VRAM_BG_16_G = GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_G_SIZE 138 GX_VRAM_BG_32_FG = GX_VRAM_F | GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE 139 GX_VRAM_BG_64_E = GX_VRAM_E, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE 140 GX_VRAM_BG_80_EF = GX_VRAM_E | GX_VRAM_F, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE + HW_VRAM_F_SIZE 141 GX_VRAM_BG_96_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE 142 GX_VRAM_BG_128_A = GX_VRAM_A, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE 143 GX_VRAM_BG_128_B = GX_VRAM_B, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE 144 GX_VRAM_BG_128_C = GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_C_SIZE 145 GX_VRAM_BG_128_D = GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_D_SIZE 146 GX_VRAM_BG_256_AB = GX_VRAM_A | GX_VRAM_B, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE 147 GX_VRAM_BG_256_BC = GX_VRAM_B | GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE 148 GX_VRAM_BG_256_CD = GX_VRAM_C | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 149 GX_VRAM_BG_384_ABC = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE 150 GX_VRAM_BG_384_BCD = GX_VRAM_B | GX_VRAM_C | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 151 GX_VRAM_BG_512_ABCD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 152 153 // discontinuous in LCDC memory 154 GX_VRAM_BG_80_EG = GX_VRAM_E | GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE + HW_VRAM_G_SIZE 155 GX_VRAM_BG_256_AC = GX_VRAM_A | GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_C_SIZE 156 GX_VRAM_BG_256_AD = GX_VRAM_A | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_D_SIZE 157 GX_VRAM_BG_256_BD = GX_VRAM_B | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE + HW_VRAM_D_SIZE 158 GX_VRAM_BG_384_ABD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_D_SIZE 159 GX_VRAM_BG_384_ACD = GX_VRAM_A | GX_VRAM_C | GX_VRAM_D // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 160} 161GXVRamBG; 162</CODE></PRE> 163<h2>See Also</h2> 164<P><A href="GX_GetBankForBG.html"><code>GX_GetBankForBG</code></A>, <A href="GX_ResetBankForBG.html"><code>GX_ResetBankForBG</code></A>, <A href="GX_DisableBankForBG.html"><code>GX_DisableBankForBG</code></A>, <A href="GX_GetSizeOfBG.html"><code>GX_GetSizeOfBG</code></A></P> 165<H2>Revision History</H2> 166<P> 1672005/05/12 Deleted <CODE>GX_VRAM_BG_512_ABCD</CODE> from the list of enumerated values that can be specified. Fixed excerpt of <CODE>GXVRamBG</CODE>.<br>2004/11/25 Initial version. 168</P> 169<hr><p>CONFIDENTIAL</p></body> 170</html> 171
