1<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN"> 2<html> 3 4<head> 5<META http-equiv="Content-Type" content="text/html; charset=windows-1252"> 6<META name="GENERATOR" content="IBM WebSphere Studio Homepage Builder Version 8.0.0.0 for Windows"> 7<META http-equiv="Content-Style-Type" content="text/css"> 8<title>GX_TrySetBankForBGEx</title> 9<LINK rel="stylesheet" href="../../css/nitro.css" type="text/css"> 10</head> 11 12<body> 13 14<h1 align="left">GX_TrySetBankForBGEx <img src="../../image/NTR.gif"align="middle"><img src="../../image/TWL.gif" align="middle"></H1> 15<H2>Syntax</H2> 16 17<dl> 18 <dd> 19<CODE>#include <nitro/gx/gx_vramcnt.h></CODE><BR> 20 <BR> 21 <CODE>BOOL GX_TrySetBankForBGEx(GXVRamBG bg1, GXVRamBG bg2);</CODE></dd> 22</dl><h2>Arguments</h2> 23 24<table border="1" width="100%"> 25 26 <tr> 27 <td width="13%"><em><strong><font face="Courier New">bg1</font></strong></em></td> 28 <td width="87%">Specifies the VRAM banks allocated to the BG-VRAM addresses 0x6000000-0x6017FFF in the main 2D engine. Only combinations of VRAM-E, F, and G can be set.</td> 29 </tr> 30 <TR> 31 <TD><em><strong><font face="Courier New">bg2</font></strong></em></TD> 32 <TD>Specifies the VRAM banks allocated to the BG-VRAM addresses 0x6020000-0x607FFFF in the main 2D engine. Only combinations of VRAM-A, B, C, and D can be set, and the maximum size is 512 KB.</TD> 33 </TR> 34 </table> 35<h2>Return Values</h2> 36<p> 37Returns TRUE if the VRAM bank is allocated normally. Returns FALSE if the VRAM bank to be allocated is locked by another library. 38</p> 39<H2>Description</H2> 40<P>Attempts to allocate a designated VRAM bank to the BG of the main 2D engine. Allocates that VRAM bank to the BG of the main 2D engine if the designated VRAM bank is disabled or if it is allocated to LCDC. The allocation will fail if the designated VRAM bank is exclusively locked by another library.<BR>With this function, it is possible to configure combinations of banks that cannot be mapped to continuous addresses in the BG-VRAM. VRAM-E, VRAM-F, and VRAM-G will be mapped from the BG-VRAM top 0x6000000 continuous address, while VRAM-A, VRAM-B, VRAM-C, and VRAM-D will be mapped from the BG-VRAM 0x6020000 continuous address. 41</P> 42<TABLE border="1"> 43 <TBODY> 44 <TR><TD colspan="2"><B>Parameters that can be specified for the first argument:</B></TD></TR> 45 <TR> 46 <TD><CODE>GX_VRAM_BG_16_F</CODE></TD> 47 <TD>16 KB are reserved in BG. VRAM-F is allocated.</TD> 48 </TR> 49 <TR> 50 <TD><CODE>GX_VRAM_BG_16_G</CODE></TD> 51 <TD>16 KB are reserved in BG. VRAM-G is allocated.</TD> 52 </TR> 53 <TR> 54 <TD><CODE>GX_VRAM_BG_32_FG</CODE></TD> 55 <TD>32 KB are reserved in BG. VRAM-F and -G are allocated.</TD> 56 </TR> 57 <TR> 58 <TD><CODE>GX_VRAM_BG_64_E</CODE></TD> 59 <TD>64 KB are reserved in BG. VRAM-E is allocated.</TD> 60 </TR> 61 <TR> 62 <TD><CODE>GX_VRAM_BG_80_EF</CODE></TD> 63 <TD>80 KB are reserved in BG. VRAM-E and -F are allocated.</TD> 64 </TR> 65 <TR> 66 <TD><CODE>GX_VRAM_BG_96_EFG</CODE></TD> 67 <TD>96 KB are reserved in BG. VRAM-E, -F, and -G are allocated.</TD> 68 </TR> 69 <TR> 70 <TD><CODE>GX_VRAM_BG_80_EG</CODE></TD> 71 <TD>80 KB are reserved in BG. VRAM-E and -G are allocated.</TD> 72 </TR> 73 <TR><TD colspan="2"><B>Parameters that can be specified for the second argument:</B></TD></TR> 74 <TR> 75 <TD><CODE>GX_VRAM_BG_128_A</CODE></TD> 76 <TD>128 KB are reserved in BG. VRAM-A is allocated.</TD> 77 </TR> 78 <TR> 79 <TD><CODE>GX_VRAM_BG_128_B</CODE></TD> 80 <TD>128 KB are reserved in BG. VRAM-B is allocated.</TD> 81 </TR> 82 <TR> 83 <TD><CODE>GX_VRAM_BG_128_C</CODE></TD> 84 <TD>128 KB are reserved in BG. VRAM-C is allocated.</TD> 85 </TR> 86 <TR> 87 <TD><CODE>GX_VRAM_BG_128_D</CODE></TD> 88 <TD>128 KB are reserved in BG. VRAM-D is allocated.</TD> 89 </TR> 90 <TR> 91 <TD><CODE>GX_VRAM_BG_256_AB</CODE></TD> 92 <TD>256 KB are reserved in BG. VRAM-A and -B are allocated.</TD> 93 </TR> 94 <TR> 95 <TD><CODE>GX_VRAM_BG_256_BC</CODE></TD> 96 <TD>256 KB are reserved in BG. VRAM-B and -C are allocated.</TD> 97 </TR> 98 <TR> 99 <TD><CODE>GX_VRAM_BG_256_CD</CODE></TD> 100 <TD>256 KB are reserved in BG. VRAM-C and -D are allocated.</TD> 101 </TR> 102 <TR> 103 <TD><CODE>GX_VRAM_BG_384_ABC</CODE></TD> 104 <TD>384 KB are reserved in BG. VRAM-A, -B, and -C are allocated.</TD> 105 </TR> 106 <TR> 107 <TD><CODE>GX_VRAM_BG_384_BCD</CODE></TD> 108 <TD>384 KB are reserved in BG. VRAM-B, -C, and -D are allocated.</TD> 109 </TR> 110 <TR> 111 <TD><CODE>GX_VRAM_BG_256_AC</CODE></TD> 112 <TD>256 KB are reserved in BG. VRAM-A and -C are allocated.</TD> 113 </TR> 114 <TR> 115 <TD><CODE>GX_VRAM_BG_256_AD</CODE></TD> 116 <TD>256 KB are reserved in BG. VRAM-A and -D are allocated.</TD> 117 </TR> 118 <TR> 119 <TD><CODE>GX_VRAM_BG_256_BD</CODE></TD> 120 <TD>256 KB are reserved in BG. VRAM-B and -D are allocated.</TD> 121 </TR> 122 <TR> 123 <TD><CODE>GX_VRAM_BG_384_ABD</CODE></TD> 124 <TD>384 KB are reserved in BG. VRAM-A, -B, and -D are allocated.</TD> 125 </TR> 126 <TR> 127 <TD><CODE>GX_VRAM_BG_384_ACD</CODE></TD> 128 <TD>384 KB are reserved in BG. VRAM-A, -C, and -D are allocated.</TD> 129 </TR> 130 </TBODY> 131</TABLE> 132<P><BR> The following is the type definition for <CODE>GXVRamBG</CODE> types:</P> 133 134 135<PRE><CODE> 136typedef enum 137{ 138 GX_VRAM_BG_NONE = 0x0000, 139 GX_VRAM_BG_16_F = GX_VRAM_F, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_F_SIZE 140 GX_VRAM_BG_16_G = GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_G_SIZE 141 GX_VRAM_BG_32_FG = GX_VRAM_F | GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE 142 GX_VRAM_BG_64_E = GX_VRAM_E, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE 143 GX_VRAM_BG_80_EF = GX_VRAM_E | GX_VRAM_F, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE + HW_VRAM_F_SIZE 144 GX_VRAM_BG_96_EFG = GX_VRAM_E | GX_VRAM_F | GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE + HW_VRAM_F_SIZE + HW_VRAM_G_SIZE 145 GX_VRAM_BG_128_A = GX_VRAM_A, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE 146 GX_VRAM_BG_128_B = GX_VRAM_B, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE 147 GX_VRAM_BG_128_C = GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_C_SIZE 148 GX_VRAM_BG_128_D = GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_D_SIZE 149 GX_VRAM_BG_256_AB = GX_VRAM_A | GX_VRAM_B, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE 150 GX_VRAM_BG_256_BC = GX_VRAM_B | GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE 151 GX_VRAM_BG_256_CD = GX_VRAM_C | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 152 GX_VRAM_BG_384_ABC = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE 153 GX_VRAM_BG_384_BCD = GX_VRAM_B | GX_VRAM_C | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 154 GX_VRAM_BG_512_ABCD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_C | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 155 156 // discontinuous in LCDC memory 157 GX_VRAM_BG_80_EG = GX_VRAM_E | GX_VRAM_G, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_E_SIZE + HW_VRAM_G_SIZE 158 GX_VRAM_BG_256_AC = GX_VRAM_A | GX_VRAM_C, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_C_SIZE 159 GX_VRAM_BG_256_AD = GX_VRAM_A | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_D_SIZE 160 GX_VRAM_BG_256_BD = GX_VRAM_B | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_B_SIZE + HW_VRAM_D_SIZE 161 GX_VRAM_BG_384_ABD = GX_VRAM_A | GX_VRAM_B | GX_VRAM_D, // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_B_SIZE + HW_VRAM_D_SIZE 162 GX_VRAM_BG_384_ACD = GX_VRAM_A | GX_VRAM_C | GX_VRAM_D // ARM9: HW_BG_VRAM --> HW_BG_VRAM + HW_VRAM_A_SIZE + HW_VRAM_C_SIZE + HW_VRAM_D_SIZE 163} 164GXVRamBG; 165</CODE></PRE> 166<h2>See Also</h2> 167<P><code><A href="GX_SetBankForBGEx.html">GX_SetBankForBGEx</A>, <A href="GX_GetBankForBG.html">GX_GetBankForBG</A>, <A href="GX_ResetBankForBG.html">GX_ResetBankForBG</A>, <A href="GX_DisableBankForBG.html">GX_DisableBankForBG</A>, <A href="GX_GetSizeOfBG.html">GX_GetSizeOfBG</A>,<A href="GX_SetBankForBG.html">GX_SetBankForBG</A></code></P> 168<H2>Revision History</H2> 169<P> 1702005/05/12 Deleted <CODE>GX_VRAM_BG_512_ABCD</CODE> from the list of enumerated values that can be specified. Fixed excerpt of <CODE>GXVRamBG</CODE>.<br>2005/02/15 Initial version. 171</P> 172<hr><p>CONFIDENTIAL</p></body> 173</html> 174
