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14<h1 align="left">GX_SetCapture <img src="../../image/NTR.gif"align="middle"><img src="../../image/TWL.gif" align="middle"></H1>
15<H2>Syntax</H2>
16
17<dl>
18  <dd>
19<PRE><CODE>#include &lt;nitro/gx/gx_capture.h&gt;
20
21void GX_SetCapture(
22    GXCaptureSize sz,
23    GXCaptureMode mode,
24    GXCaptureSrcA a,
25    GXCaptureSrcB b,
26    GXCaptureDest dest,
27    int eva,
28    int evb
29);<BR></CODE></PRE>
30  </dd>
31</dl><h2>Arguments</h2>
32<TABLE border="1" width="100%">
33  <TBODY>
34    <TR>
35<TD width="237"><CODE>sz</CODE></TD>
36<TD width="609">Capture size</TD>
37    </TR>
38    <TR>
39<TD><CODE>mode</CODE></TD>
40<TD>Capture mode (select whether to capture A only, B only, or AB blended)</TD>
41    </TR>
42    <TR>
43<TD><CODE>a</CODE></TD>
44<TD>Capture data source A (select either screen after 3D/2D blending, or only 3D screen)</TD>
45    </TR>
46    <TR>
47<TD><CODE>b</CODE></TD>
48<TD>Capture source B (Select VRAM/Main Memory)</TD>
49    </TR>
50    <TR>
51<TD><CODE>dest</CODE></TD>
52<TD>Capture data write target (select combination of VRAM-A,B,C,D, and offset)</TD>
53    </TR>
54    <TR>
55<TD><CODE>eva</CODE></TD>
56<TD>Blending coefficient (0-16) for capture data source A</TD>
57    </TR>
58    <TR>
59<TD><CODE>evb</CODE></TD>
60<TD>Blending coefficient (0-16) for capture data source B</TD>
61    </TR>
62  </TBODY>
63</TABLE>
64<h2>Return Values</h2>
65<p>None.</p>
66<H2>Description</H2>
67<P>Sets to capture one screen of data from line 0 in the next frame. To capture each frame you must call this function in each frame.<BR> <B>Note 1:</B> The target VRAM must already be mapped into LCDC memory. <B>Note 2:</B> When you set VRAM in <CODE>b</CODE>, the target VRAM is the same as the one set in <CODE>dest</CODE>. <B>Note 3:</B> When you are in the VRAM display mode, even if you set VRAM that has an offset in <CODE>b</CODE>, the VRAM offset specification is not enabled. If the offset exceeds <CODE>0x20000</CODE> when the memory is read, it wraps to <CODE>0x00000</CODE>. <B>Note 4:</B> When writing to <CODE>dest</CODE> if offset exceeds <CODE>0x20000</CODE>, it wraps to <CODE>0x00000</CODE> and writes. <B>Note 5:</B> During RAM capture, one line is always loaded as a 256-dot image. Therefore, it is not possible to perform blending while capturing is in process with the 128x128 dot setting.
68</P>
69<TABLE border="1">
70  <TBODY>
71    <TR>
72<TD width="30%"><CODE>GX_CAPTURE_SIZE_128x128</CODE></TD>
73<TD>128x128 dot (<CODE>0x08000</CODE> bytes)</TD>
74    </TR>
75    <TR>
76<TD><CODE>GX_CAPTURE_SIZE_256x64</CODE></TD>
77<TD>256x64 dot (<CODE>0x08000</CODE> bytes)</TD>
78    </TR>
79    <TR>
80<TD><CODE>GX_CAPTURE_SIZE_256x128</CODE></TD>
81<TD>256x128 dot (<CODE>0x10000</CODE> bytes)</TD>
82    </TR>
83    <TR>
84<TD><CODE>GX_CAPTURE_SIZE_256x192</CODE></TD>
85<TD>256x192 dot (<CODE>0x18000</CODE> bytes)</TD>
86    </TR>
87  </TBODY>
88</TABLE>
89<P></P>
90<TABLE border="1">
91  <TBODY>
92    <TR>
93<TD width="30%"><CODE>GX_CAPTURE_MODE_A</CODE></TD>
94<TD>Captures capture source A data.</TD>
95    </TR>
96    <TR>
97<TD><CODE>GX_CAPTURE_MODE_B</CODE></TD>
98<TD>Captures capture source B data.</TD>
99    </TR>
100    <TR>
101<TD><CODE>GX_CAPTURE_MODE_AB</CODE></TD>
102<TD>Blends capture source A and B data, and captures.</TD>
103    </TR>
104  </TBODY>
105</TABLE>
106<P></P>
107<TABLE border="1">
108  <TBODY>
109    <TR>
110<TD width="30%"><CODE>GX_CAPTURE_SRCA_2D3D</CODE></TD>
111<TD>Captures graphics display screen (after 3D/2D blending).</TD>
112    </TR>
113    <TR>
114<TD><CODE>GX_CAPTURE_SRCA_3D</CODE></TD>
115<TD>Captures 3D screen.</TD>
116    </TR>
117  </TBODY>
118</TABLE>
119<P></P>
120<TABLE border="1">
121  <TBODY>
122    <TR>
123<TD width="30%"><CODE>GX_CAPTURE_SRCB_VRAM_0x00000</CODE></TD>
124<TD>Reads from VRAM offset <CODE>0x00000</CODE>.</TD>
125    </TR>
126    <TR>
127<TD><CODE>GX_CAPTURE_SRCB_MRAM</CODE></TD>
128<TD>Captures display results from main memory display mode.</TD>
129    </TR>
130    <TR>
131<TD><CODE>GX_CAPTURE_SRCB_VRAM_0x08000</CODE></TD>
132<TD>Reads from VRAM offset <CODE>0x08000</CODE>.</TD>
133    </TR>
134    <TR>
135<TD><CODE>GX_CAPTURE_SRCB_VRAM_0x10000</CODE></TD>
136<TD>Reads from VRAM offset <CODE>0x10000</CODE>.</TD>
137    </TR>
138    <TR>
139<TD><CODE>GX_CAPTURE_SRCB_VRAM_0x18000</CODE></TD>
140<TD>Reads from VRAM offset <CODE>0x18000</CODE>.</TD>
141    </TR>
142  </TBODY>
143</TABLE>
144<P></P>
145<TABLE border="1">
146  <TBODY>
147    <TR>
148<TD width="30%"><CODE>GX_CAPTURE_DEST_VRAM_A_0x00000</CODE></TD>
149<TD>Writes from VRAM-A offset <CODE>0x00000</CODE>.</TD>
150    </TR>
151    <TR>
152<TD><CODE>GX_CAPTURE_DEST_VRAM_B_0x00000</CODE></TD>
153<TD>Writes from VRAM-B offset <CODE>0x00000</CODE>.</TD>
154    </TR>
155    <TR>
156<TD><CODE>GX_CAPTURE_DEST_VRAM_C_0x00000</CODE></TD>
157<TD>Writes from VRAM-C offset <CODE>0x00000</CODE>.</TD>
158    </TR>
159    <TR>
160<TD><CODE>GX_CAPTURE_DEST_VRAM_D_0x00000</CODE></TD>
161<TD>Writes from VRAM-D offset <CODE>0x00000</CODE>.</TD>
162    </TR>
163    <TR>
164<TD><CODE>GX_CAPTURE_DEST_VRAM_A_0x08000</CODE></TD>
165<TD>Writes from VRAM-A offset <CODE>0x08000</CODE>.</TD>
166    </TR>
167    <TR>
168<TD><CODE>GX_CAPTURE_DEST_VRAM_B_0x08000</CODE></TD>
169<TD>Writes from VRAM-B offset <CODE>0x08000</CODE>.</TD>
170    </TR>
171    <TR>
172<TD><CODE>GX_CAPTURE_DEST_VRAM_C_0x08000</CODE></TD>
173<TD>Writes from VRAM-C offset <CODE>0x08000</CODE>.</TD>
174    </TR>
175    <TR>
176<TD><CODE>GX_CAPTURE_DEST_VRAM_D_0x08000</CODE></TD>
177<TD>Writes from VRAM-D offset <CODE>0x08000</CODE>.</TD>
178    </TR>
179    <TR>
180<TD><CODE>GX_CAPTURE_DEST_VRAM_A_0x10000</CODE></TD>
181<TD>Writes from VRAM-A offset <CODE>0x10000</CODE>.</TD>
182    </TR>
183    <TR>
184<TD><CODE>GX_CAPTURE_DEST_VRAM_B_0x10000</CODE></TD>
185<TD>Writes from VRAM-B offset <CODE>0x10000</CODE>.</TD>
186    </TR>
187    <TR>
188<TD><CODE>GX_CAPTURE_DEST_VRAM_C_0x10000</CODE></TD>
189<TD>Writes from VRAM-C offset <CODE>0x10000</CODE>.</TD>
190    </TR>
191    <TR>
192<TD><CODE>GX_CAPTURE_DEST_VRAM_D_0x10000</CODE></TD>
193<TD>Writes from VRAM-D offset <CODE>0x10000</CODE>.</TD>
194    </TR>
195    <TR>
196<TD><CODE>GX_CAPTURE_DEST_VRAM_A_0x18000</CODE></TD>
197<TD>Writes from VRAM-A offset <CODE>0x18000</CODE>.</TD>
198    </TR>
199    <TR>
200<TD><CODE>GX_CAPTURE_DEST_VRAM_B_0x18000</CODE></TD>
201<TD>Writes from VRAM-B offset <CODE>0x18000</CODE>.</TD>
202    </TR>
203    <TR>
204<TD><CODE>GX_CAPTURE_DEST_VRAM_C_0x18000</CODE></TD>
205<TD>Writes from VRAM-C offset <CODE>0x18000</CODE>.</TD>
206    </TR>
207    <TR>
208<TD><CODE>GX_CAPTURE_DEST_VRAM_D_0x18000</CODE></TD>
209<TD>Writes from VRAM-D offset <CODE>0x18000</CODE>.</TD>
210    </TR>
211  </TBODY>
212</TABLE>
213<P>Below are the matrix format type definitions used in the argument.</P>
214<PRE><CODE>typedef enum
215{
216    GX_CAPTURE_SIZE_128x128 = 0,
217    GX_CAPTURE_SIZE_256x64 = 1,
218    GX_CAPTURE_SIZE_256x128 = 2,
219    GX_CAPTURE_SIZE_256x192 = 3
220}
221GXCaptureSize;
222
223typedef enum
224{
225    GX_CAPTURE_MODE_A = 0,
226    GX_CAPTURE_MODE_B = 1,
227    GX_CAPTURE_MODE_AB = 2
228}
229GXCaptureMode;
230
231typedef enum
232{
233    GX_CAPTURE_SRCA_2D3D = 0,
234    GX_CAPTURE_SRCA_3D = 1
235}
236GXCaptureSrcA;
237
238typedef enum
239{
240    GX_CAPTURE_SRCB_VRAM_0x00000 = 0,
241    GX_CAPTURE_SRCB_WRAM = 1,
242    GX_CAPTURE_SRCB_VRAM_0x08000 = 2,
243    GX_CAPTURE_SRCB_VRAM_0x10000 = 4,
244    GX_CAPTURE_SRCB_VRAM_0x18000 = 6
245}
246GXCaptureSrcB;
247
248typedef enum
249{
250    GX_CAPTURE_DEST_VRAM_A_0x00000 = 0,
251    GX_CAPTURE_DEST_VRAM_B_0x00000 = 1,
252    GX_CAPTURE_DEST_VRAM_C_0x00000 = 2,
253    GX_CAPTURE_DEST_VRAM_D_0x00000 = 3,
254
255    GX_CAPTURE_DEST_VRAM_A_0x08000 = 4,
256    GX_CAPTURE_DEST_VRAM_B_0x08000 = 5,
257    GX_CAPTURE_DEST_VRAM_C_0x08000 = 6,
258    GX_CAPTURE_DEST_VRAM_D_0x08000 = 7,
259
260    GX_CAPTURE_DEST_VRAM_A_0x10000 = 8,
261    GX_CAPTURE_DEST_VRAM_B_0x10000 = 9,
262    GX_CAPTURE_DEST_VRAM_C_0x10000 = 10,
263    GX_CAPTURE_DEST_VRAM_D_0x10000 = 11,
264
265    GX_CAPTURE_DEST_VRAM_A_0x18000 = 12,
266    GX_CAPTURE_DEST_VRAM_B_0x18000 = 13,
267    GX_CAPTURE_DEST_VRAM_C_0x18000 = 14,
268    GX_CAPTURE_DEST_VRAM_D_0x18000 = 15
269}
270GXCaptureDest;</CODE></PRE>
271<H2>Notes</H2>
272<P>In the LCD OFF state, some of the circuitry clocks in the GX are stopped, so the settings of this function are ignored.</P>
273<h2>See Also</h2>
274<H2>Revision History</H2>
275<P>
2762009/02/25 Noted that the settings are ignored when state is LCD OFF. <br /> 2004/01/19 Initial version.
277</P>
278<hr><p>CONFIDENTIAL</p></body>
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