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9<title>GXReadMemMetric</title>
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13
14<h1 align="left">GXReadMemMetric</h1>
15
16
17<h2>C Specification</h2>
18
19<dl>
20<dd><PRE><CODE>#include &lt;revolution/gx.h&gt;</CODE></PRE>
21  </dd>
22<dd><pre><CODE>void GXReadMemMetric( u32*           cp_req,
23u32*           tc_req,
24u32*           cpu_rd_req,
25u32*           cpu_wr_req,
26u32*           dsp_req,
27u32*           io_req,
28u32*           vi_req,
29u32*           pe_req,
30u32*           rf_req,
31u32*           fi_req  );</CODE></pre>
32  </dd>
33</dl>
34
35<h2>Arguments</h2>
36<TABLE border="1" cellpadding="3" cellspacing="0.1">
37  <tr>
38<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>cp_req</font></strong></em></TD>
39<TD width="520">Returns a cp request counter value as a 32-bit unsigned integer.</TD>
40    </tr>
41  <tr>
42<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>tc_req</font></strong></em></TD>
43<TD width="520">Returns a tc request counter value as a 32-bit unsigned integer.</TD>
44    </tr>
45  <tr>
46<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>cpu_rd_req</font></strong></em></TD>
47<TD width="520">Returns a CPU read request counter value as a 32-bit unsigned integer.</TD>
48    </tr>
49  <tr>
50<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>cpu_wr_req</font></strong></em></TD>
51<TD width="520">Returns a CPU write request counter value as a 32-bit unsigned integer.</TD>
52    </tr>
53  <tr>
54<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>dsp_req</font></strong></em></TD>
55<TD width="520">Returns a dps request counter value as a 32-bit unsigned integer.</TD>
56    </tr>
57  <tr>
58<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>io_req</font></strong></em></TD>
59<TD width="520">Returns an io request counter value as a 32-bit unsigned integer.</TD>
60    </tr>
61  <tr>
62<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>vi_req</font></strong></em></TD>
63<TD width="520">Returns a vi request counter value as a 32-bit unsigned integer.</TD>
64    </tr>
65  <tr>
66<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>pe_req</font></strong></em></TD>
67<TD width="520">Returns a pe request counter value as a 32-bit unsigned integer.</TD>
68    </tr>
69  <tr>
70<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>rf_req</font></strong></em></TD>
71<TD width="520">Returns a rf request counter value as a 32-bit unsigned integer.</TD>
72    </tr>
73  <tr>
74<TD width="120" bgcolor="#ffffe8"><em><strong><CODE>fi_req</font></strong></em></TD>
75<TD width="520">Returns an fi request counter value as a 32-bit unsigned integer.</TD>
76    </tr>
77</TABLE>
78<h2>Return Values</h2>
79
80<p>None.</p>
81<H2>Description</H2>
82<P>The graphics processor (GP) can count many internal events that give detailed information on performance.&nbsp;This function returns the number of memory requests made by each memory master. The counters can be cleared by calling <a href="GXClearMemMetric.html"><code>GXClearMemMetric</code></a>.</P>
83
84<P><STRONG><B>Note:</B> This function can measure only access to internal memory (MEM1 region) of the system. It cannot measure access to external memory (MEM2 region).</STRONG></P>
85
86<P><code><font size="3">u32 cp_req, tc_req, cpu_rd_req, cpu_wr_req, dsp_req, io_req, vi_req, pe_req;<br> u32 rf_req, fi_req;<br> <br> GXClearMemMetric();<br> <br> // Draw Object(s)</font></code></P>
87<P><code><font size="3">// wait until object drawn<br> GXSetDrawSync(0xbeef);<br> while (0xbeef != GXReadDrawSync())<br> &nbsp;&nbsp;&nbsp; ;<br> <br> metric = GXReadMemMetric(&amp;cp_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;tc_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;cpu_rd_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;cpu_wr_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;dsp_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;io_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;vi_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;pe_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;rf_req,<br> &nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; &amp;fi_req );<br> <br> OSReport(&quot;Number command processor requests:&nbsp; %d\n&quot;, cp_req);</font></code></P>
88<P>Each <em>request</em> results in a 32-byte transaction on the main memory bus.</P>
89
90<H3>Memory Counter Details</H3>
91<H4><CODE><EM><STRONG>cp_req</STRONG></EM></CODE></H4>
92<P>The command processor (CP) is responsible for reading the graphics FIFO, reading display lists (<a href="../DisplayList/GXCallDisplayList.html"><code>GXCallDisplayList</code></a>), and servicing vertex cache misses.&nbsp;This metric returns the number of memory read requests issued by the command processor.</P>
93<H4><STRONG><EM><CODE>tc_req</CODE></EM></STRONG></H4>
94<P>Returns the number of memory read requests issued by the texture cache (TC).</P>
95<H4><STRONG><EM><CODE>cpu_rd_req</CODE></EM></STRONG></H4>
96<P>Returns the number of memory read requests made by the CPU.</P>
97<H4><STRONG><EM><CODE>cp_wr_req</CODE></EM></STRONG></H4>
98<P>Returns the number of memory write requests made by the CPU.</P>
99<H4><CODE><EM><STRONG>dsp_req</STRONG></EM></CODE></H4>
100<P>Returns the number of memory requests made by the audio DSP.</P>
101<H4><CODE><EM><STRONG>io_req</STRONG></EM></CODE></H4>
102<P>Returns the number of memory requests made by IO devices.</P>
103<H4><CODE><EM><STRONG>vi_req</STRONG></EM></CODE></H4>
104<P>Returns the number of memory read requests made by the video interface (VI).</P>
105<H4><CODE><EM><STRONG>pe_req</STRONG></EM></CODE></H4>
106<P>Returns the number of memory write requests made by the pixel engine (PE).&nbsp;These include texture copies (<a href="../Framebuffer/GXCopyTex.html"><code>GXCopyTex</code></a>) and display copies (<a href="../Framebuffer/GXCopyDisp.html"><code>GXCopyDisp</code></a>).</P>
107<H4><STRONG><EM><CODE>rf_req</CODE></EM></STRONG></H4>
108<P>Returns the number of memory refresh requests.</P>
109<H4><CODE><EM><STRONG>fi_req</STRONG></EM></CODE></H4>
110<P>Returns the number of forced idle (FI) requests, which are dummy requests required to switch the bus direction (read to write, or write to read).</P>
111
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113
114
115<h2>See Also</h2>
116
117<p><a href="GXReadPixMetric.html">GXReadPixMetric</a><br> <a href="GXClearPixMetric.html">GXClearPixMetric</a><br> <a href="GXSetVCacheMetric.html">GXSetVCacheMetric</a><br> <a href="GXReadVCacheMetric.html">GXReadVCacheMetric</a><br> <a href="GXClearVCacheMetric.html">GXClearVCacheMetric</a><br> <a href="GXSetGPMetric.html">GXSetGPMetric</a><br> <a href="GXReadGPMetric.html">GXReadGPMetric</a><br> <a href="GXClearGPMetric.html">GXClearGPMetric</a></p>
118<H2>Revision History</H2>
119<P>03/01/2006 Initial version.</P>