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9<title>GXInitFifoLimits</title>
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13
14<h1 align="left">GXInitFifoLimits</h1>
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16
17<h2>C Specification</h2>
18
19<dl>
20<dd><PRE><CODE>#include &lt;revolution/gx.h&gt;</CODE></PRE>
21  </dd>
22<dd><pre><CODE>void GXInitFifoLimits(
23<a href="../Structures/GXFifoObj.html">GXFifoObj</a>*  fifo,
24u32          hi_water_mark,
25u32          lo_water_mark );</CODE></pre>
26  </dd>
27</dl>
28<h2>Arguments</h2>
29<div align="left">
30<TABLE border="1" cellpadding="3" cellspacing="0.1">
31  <tr>
32<TD width="120" bgcolor="#ffffe8"><code><strong><em>fifo</em></strong></code></TD>
33<TD width="520">A pointer to the FIFO structure.</TD>
34    </tr>
35  <tr>
36<TD width="120" bgcolor="#ffffe8"><code><strong><em>hi_water_mark</em></strong></code></TD>
37<TD width="520">The byte count where the GX API halts writing commands to FIFO. <BR>In 32-byte multiples.</TD>
38    </tr>
39  <tr>
40<TD width="120" bgcolor="#ffffe8"><code><strong><em>lo_water_mark</em></strong></code></TD>
41<TD width="520">The byte count where the GX API restarts writing commands to FIFO. <BR>In 32-byte multiples.</TD>
42    </tr>
43</TABLE>
44</div>
45
46<h2>Return Values</h2>
47
48<p>None.</p>
49<H2>Description</H2>
50<P>This function sets the high and low watermarks for the <em><strong><code>fifo</code></strong></em>.&nbsp;The high and low watermarks are used in <em>immediate-mode</em>, i.e. when the <em><strong><code>fifo</code></strong></em> is attached to both the CPU and Graphics Processor (GP) (see <a href="GXSetCPUFifo.html"><code>GXSetCPUFifo</code></a> and <a href="GXSetGPFifo.html"><code>GXSetGPFifo</code></a>).</P>
51<P>The hardware keeps track of the number of bytes between the read and write pointers.&nbsp;This number represents how full the FIFO is, and when it is greater than or equal to the <code><em><strong>hi_water_mark</strong></em></code>, the hardware issues an interrupt. The GX API will suspend sending graphics to the Graphics FIFO until it has emptied to a certain point. The <code><em><strong>lo_water_mark</strong></em></code> is used to set the point where the FIFO is empty enough to resume sending graphics commands to the FIFO.&nbsp;Both the <code><em><strong>hi_water_mark</strong></em></code> and <code><em><strong>lo_water_mark</strong></em></code> should be in multiples of 32 bytes.&nbsp;The count for <code><em><strong>lo_water_mark</strong></em></code> should be less than <code><em><strong>hi_water_mark</strong></em></code>.&nbsp;Of course, <code><em><strong>hi_water_mark</strong></em></code> and <code><em><strong>lo_water_mark</strong></em></code> must be less than the size of the FIFO.</P>
52<P>When the FIFO is only attached to the CPU or only attached to the GP, the high and low watermark interrupts are disabled.</P>
53
54<h2>See Also</h2>
55<p><a href="GXInitFifoBase.html">GXInitFifoBase</a><a href="GXInitFifoPtrs.html"><br> GXInitFifoPtrs</a></p>
56<H2>Revision History</H2>
57<P>
582007/03/05 In the <B>Description</B> section, deleted the old description.<br>2006/03/01 Initial version.
59</P>
60<hr><p>CONFIDENTIAL</p></body>
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