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8<TITLE>GXPerf1</TITLE>
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11<H1 align="left">GXPerf1</H1>
12<H2>Enumerated Values</H2>
13<DIV align="left">
14<TABLE border="0" width="100%" height="94">
15  <TBODY>
16    <TR>
17<TD width="100%" height="21"><CODE>GX_PERF1_TEXELS</CODE></TD>
18    </TR>
19    <TR>
20<TD width="100%" height="21"><CODE>GX_PERF1_TX_IDLE</CODE></TD>
21    </TR>
22    <TR>
23<TD width="100%" height="21"><CODE>GX_PERF1_TX_REGS</CODE></TD>
24    </TR>
25    <TR>
26<TD width="100%" height="21"><CODE>GX_PERF1_TX_MEMSTALL</CODE></TD>
27    </TR>
28    <TR>
29<TD width="100%" height="21"><CODE>GX_PERF1_TC_CHECK1_2</CODE></TD>
30    </TR>
31    <TR>
32<TD width="100%" height="21"><CODE>GX_PERF1_TC_CHECK3_4</CODE></TD>
33    </TR>
34    <TR>
35<TD width="100%" height="21"><CODE>GX_PERF1_TC_CHECK5_6</CODE></TD>
36    </TR>
37    <TR>
38<TD width="100%" height="21"><CODE>GX_PERF1_TC_CHECK7_8</CODE></TD>
39    </TR>
40    <TR>
41<TD width="100%" height="21"><CODE>GX_PERF0_TC_MISS</CODE></TD>
42    </TR>
43    <TR>
44      <TD width="100%" height="21"></TD>
45    </TR>
46    <TR>
47<TD width="100%" height="21"><CODE>GX_PERF1_VC_ELEMQ_FULL</CODE></TD>
48    </TR>
49    <TR>
50<TD width="100%" height="21"><CODE>GX_PERF1_VC_MISSQ_FULL</CODE></TD>
51    </TR>
52    <TR>
53<TD width="100%" height="21"><CODE>GX_PERF1_VC_MEMREQ_FULL</CODE></TD>
54    </TR>
55    <TR>
56<TD width="100%" height="21"><CODE>GX_PERF1_VC_STATUS7</CODE></TD>
57    </TR>
58    <TR>
59<TD width="100%" height="21"><CODE>GX_PERF1_VC_MISSREP_FULL</CODE></TD>
60    </TR>
61    <TR>
62<TD width="100%" height="21"><CODE>GX_PERF1_VC_STREAMBUF_LOW</CODE></TD>
63    </TR>
64    <TR>
65<TD width="100%" height="21"><CODE>GX_PERF1_VC_ALL_STALLS</CODE></TD>
66    </TR>
67    <TR>
68<TD width="100%" height="21"><CODE>GX_PERF1_VERTICES</CODE></TD>
69    </TR>
70    <TR>
71      <TD width="100%" height="21"></TD>
72    </TR>
73    <TR>
74<TD width="100%" height="21"><CODE>GX_PERF1_FIFO_REQ</CODE></TD>
75    </TR>
76    <TR>
77<TD width="100%" height="21"><CODE>GX_PERF1_CALL_REQ</CODE></TD>
78    </TR>
79    <TR>
80<TD width="100%" height="21"><CODE>GX_PERF1_VC_MISS_REQ</CODE></TD>
81    </TR>
82    <TR>
83<TD width="100%" height="21"><CODE>GX_PERF1_CP_ALL_REQ</CODE></TD>
84    </TR>
85    <TR>
86      <TD width="100%" height="21"></TD>
87    </TR>
88    <TR>
89<TD width="100%" height="21"><CODE>GX_PERF1_CLOCKS</CODE></TD>
90    </TR>
91    <TR>
92<TD width="100%" height="21"><CODE>GX_PERF1_NONE</CODE></TD>
93    </TR>
94  </TBODY>
95</TABLE>
96</DIV>
97<H2>Description</H2>
98<P>These are the performance counter 1 metrics.</P>
99<DIV align="left">
100<TABLE border="1" cellpadding="3" cellspacing="0" height="94">
101  <TBODY>
102    <TR>
103<TD height="21"><CODE>GX_PERF1_TEXELS</CODE></TD>
104<TD>the number of texels processed by the GP</TD>
105    </TR>
106    <TR>
107<TD height="21"><CODE>GX_PERF1_TX_IDLE</CODE></TD>
108<TD>the number of clock cycles for which the TX (texture unit) is idle</TD>
109    </TR>
110    <TR>
111<TD height="21"><CODE>GX_PERF1_TX_REGS</CODE></TD>
112<TD>the number of GP clock cycles spent writing to state registers in the TX (texture unit)</TD>
113    </TR>
114    <TR>
115<TD height="21"><CODE>GX_PERF1_TX_MEMSTALL</CODE></TD>
116<TD>the number of GP clock cycles for which the TX (texture unit) is stalled while waiting for main memory</TD>
117    </TR>
118    <TR>
119<TD height="21"><CODE>GX_PERF1_TC_CHECK1_2</CODE></TD>
120<TD>counts when texture cache misses 1 and 2 lines during pixel drawing</TD>
121    </TR>
122    <TR>
123<TD height="21"><CODE>GX_PERF1_TC_CHECK3_4</CODE></TD>
124<TD>counts when texture cache misses 3 and 4 lines during pixel drawing</TD>
125    </TR>
126    <TR>
127<TD height="21"><CODE>GX_PERF1_TC_CHECK5_6</CODE></TD>
128<TD>counts when texture cache misses 5 and 6 lines during pixel drawing</TD>
129    </TR>
130    <TR>
131<TD height="21"><CODE>GX_PERF1_TC_CHECK7_8</CODE></TD>
132<TD>counts when texture cache misses 7 and 8 lines during pixel drawing</TD>
133    </TR>
134    <TR>
135<TD height="21"><CODE>GX_PERF0_TC_MISS</CODE></TD>
136<TD>counts how many accesses missed the texture cache</TD>
137    </TR>
138    <TR>
139<TD height="21"><CODE>GX_PERF1_VC_ELEMQ_FULL</CODE></TD>
140<TD>counts the number of vertex caches stalled because element queue is full</TD>
141    </TR>
142    <TR>
143<TD height="21"><CODE>GX_PERF1_VC_MISSQ_FULL</CODE></TD>
144<TD>counts the number of vertex caches stalled because miss queue is full</TD>
145    </TR>
146    <TR>
147<TD height="21"><CODE>GX_PERF1_VC_MEMREQ_FULL</CODE></TD>
148<TD>counts the number of vertex caches stalled because too many main memory requests are unresolved</TD>
149    </TR>
150    <TR>
151<TD height="21"><CODE>GX_PERF1_VC_STATUS7</CODE></TD>
152<TD>counts the number of vertex cache stalls because too many elements in the queue are dependent on a single cache line</TD>
153    </TR>
154    <TR>
155<TD height="21"><CODE>GX_PERF1_VC_MISSREP_FULL</CODE></TD>
156<TD>counts vertex cache stalls caused by cache misses when all sets are being used (no replacements available)</TD>
157    </TR>
158    <TR>
159<TD height="21"><CODE>GX_PERF1_VC_STREAMBUF_LOW</CODE></TD>
160<TD>counts vertex cache stalls caused by a near-empty FIFO (streaming buffer) with a higher priority than the vertex cache</TD>
161    </TR>
162    <TR>
163<TD height="21"><CODE>GX_PERF1_VC_ALL_STALLS</CODE></TD>
164<TD>counts all the states for which the above vertex cache stalls</TD>
165    </TR>
166    <TR>
167<TD height="21"><CODE>GX_PERF1_VERTICES</CODE></TD>
168<TD>returns the number of vertices processed by the GP</TD>
169    </TR>
170    <TR>
171<TD height="21"><CODE>GX_PERF1_FIFO_REQ</CODE></TD>
172<TD>counts the number of lines (32 bytes) read from the GP FIFO</TD>
173    </TR>
174    <TR>
175<TD height="21"><CODE>GX_PERF1_CALL_REQ</CODE></TD>
176<TD>counts the number of lines (32 bytes) read from called display lists (<code>GXCallDisplayList</code>)</TD>
177    </TR>
178    <TR>
179<TD height="21"><CODE>GX_PERF1_VC_MISS_REQ</CODE></TD>
180<TD>counts the number of vertex cache miss requests</TD>
181    </TR>
182    <TR>
183<TD height="21"><CODE>GX_PERF1_CP_ALL_REQ</CODE></TD>
184<TD>counts all requests from the GP command processor (CP)</TD>
185    </TR>
186    <TR>
187<TD height="21"><CODE>GX_PERF1_CLOCKS</CODE></TD>
188<TD>counts the number of GP clock cycles that have elapsed since the previous call to <code>GXReadGPlMetric</code></TD>
189    </TR>
190    <TR>
191<TD height="21"><CODE>GX_PERF1_NONE</CODE></TD>
192<TD>disables counting on GP counter 1 and clears current count</TD>
193    </TR>
194  </TBODY>
195</TABLE>
196</DIV>
197<H2>Functions Using This Type</H2>
198<P><A href="../Performance/GXReadGPMetric.html"><CODE>GXReadGPMetric</CODE></A><BR> <A href="../Performance/GXReadGP1Metric.html"><CODE>GXReadGP1Metric</CODE></A></P>
199<H2>Revision History</H2>
200<P>03/01/2006 Initial version.</P>
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