1<html> 2<head> 3<meta http-equiv="Content-Type" content="text/html; charset=utf-8"> 4<meta http-equiv="Content-Style-Type" content="text/css"> 5<title>ctr_VertexShaderAssembler</title> 6<style type="text/css"> 7<!-- 8body { 9/* 10 font-size : 10pt; 11*/ 12 font-weight : normal; 13 color : #000000; 14 margin : 8px; 15} 16 17div { 18 width : 98%; 19 white-space : nowrap; 20} 21 22div.title { 23 text-align : left; 24 font-weight : bold; 25/* 26 font-size : 16pt; 27*/ 28 font-size : 150%; 29 color : #202020; 30 border-style : double; 31 border-width : 8px; 32 /* タイトルを囲む枠線の色を指定 */ 33 border-color : #CD202C; 34 35 /* RVLプラットフォーム系列 */ 36/* 37 border-color : #34beed; 38*/ 39 40 /* TWLプラットフォーム系列 */ 41/* 42 border-color : #ff458f; 43*/ 44 45 margin : 4px; 46 padding : 4px; 47} 48H1 { 49 font-size : 150%; 50 font-family : Arial; 51 border-bottom-width : 5px; 52 border-bottom-style : solid; 53 border-bottom-color : #CD202C; 54 padding-bottom : 1px; 55 margin-bottom : 20px; 56 letter-spacing : normal; 57 font-weight : bold; 58} 59 60h2 { 61 font-weight : bold; 62/* 63 font-size : 16pt; 64*/ 65 font-size : 150%; 66 border-style : none none solid double; 67 border-width : 0px 0px 2px 8px; 68 /* 見出しの線の色を指定 */ 69 border-color : #CD202C; 70 71 /* RVLプラットフォーム系列 */ 72/* 73 border-color : #34beed; 74*/ 75 76 /* TWLプラットフォーム系列 */ 77/* 78 border-color : #ff458f; 79*/ 80 81 margin-left : 2px; 82 padding-left : 4px; 83} 84h3 { 85 font-weight : bold; 86 font-size : 120%; 87 border-style : none none solid solid; 88 border-width : 0px 0px 2px 2px; 89 border-color : #CD202C; 90 margin-left : 2px; 91 padding-left : 4px; 92} 93CODE { 94 font-family : "Courier New", monospace; 95 position : normal; 96 left : 12px; 97 font-size : 10pt; 98} 99table { 100 margin-top : 2pt; 101 margin-bottom : 2pt; 102 margin-left : 0pt; 103 margin-right : 0pt; 104 padding-left : 0pt; 105 padding-right : 0pt; 106 position : relative; 107 left : 12px; 108 font-family : Arial; 109 font-size : 10pt; 110 border-style : none none none none; 111} 112td,th { 113 padding : 2pt; 114 border-width : 2pt; 115 border-style : none none none none; 116 font-style : normal; 117 text-align : left; 118} 119td { 120 background : #e8f4f4; 121 font-weight : normal; 122} 123th { 124 background : #c0d8d8; 125 font-weight : bold; 126} 127 128p { 129 margin-left : 4px; 130} 131p.code { 132 font-family : "Courier New", monospace; 133 position : normal; 134 left : 12px; 135 font-size : 10pt; 136 background : #e8f4f4; 137} 138 139--> 140</style> 141 142</head> 143<body> 144<a name="top"></a> <!-- ※注意事項 --> <!-- ・（任意）となっているものは、記載が無くても問題ありません。 --> <!-- ・各項目についてる（必須）や（任意）は、作成後に削除してください。 --> <!-- ・各項目内の書き方は、パッケージごとに自由で問題ありませんが、同じパッケージ内で違いがでないようにしてください。 --> <!-- ・タグはすべて小文字、終了タグを持たないものは「/>」で閉じてください。--> <!-- ・HTMLコードのインデントは、各種社内コード規約と同様にスペース4文字か4文字幅のタブになるようにしてください--> 145 146<h1>ctr_VertexShaderAssembler</h1> 147 148<h2>Table of Contents</h2> 149<ul style='list-style-type: none'> 150 <li>1. <a href="#intro">Introduction</a></li> 151 <li>2. <a href="#usage">How to Use</a> 152 <ul style='list-style-type: none'> 153 <li>2.1 <a href="#command">Commands</a></li> 154 <li>2.2 <a href="#input_file">Input Files</a></li> 155 <li>2.3 <a href="#option">Options</a></li> 156 </ul> 157 </li> 158 <li>3. <a href="#debug_build">Debug Build</a></li> 159 <li>4. <a href="#err_code">Error Codes (Assembler)</a></li> 160 <ul style='list-style-type: none'> 161 <li>4.1 <a href="#err_mes_format">Error Message Format</a></li> 162 <li>4.2 <a href="#err_message">Error Message</a></li> 163 </ul> 164 <li>5. <a href="#history">Revision History</a></li> 165</ul> 166 167<h2><a name="intro">Introduction</a></h2> 168<P> 169<CODE>ctr_VertexShaderAssembler</CODE> assembles assembler files written in assembler language, conforming to proprietary PICA specifications, and outputs the corresponding object files. 170</P> 171 172<h2><a name="usage">How to Use</a></h2> 173 174<h3><a name="command">Commands</a></h3> 175<p class="code"> 176% ctr_VertexShaderAssembler32 <input file name> [options...] 177</p> 178 179<p class="first_ja"> 180An input file name must be specified. Options can be omitted. Help is displayed if the assembler is executed without any arguments.<BR> 181</p> 182 183<h3><a name="input_file">Input Files</a></h3> 184<p class="first_ja"> 185Specify the assembler files to be input in place of <input file name>.<BR> Files encoded in Shift-JIS and UTF-8 (byte-order marked) are supported.<BR> CRLF is supported for newline codes.<BR> For the file name, specify a string of 128 or fewer characters that contains no spaces, by using ASCII alphanumeric characters and symbols other than \ / : * ? " < > and |. <br> * ? <br /> 186</p> 187 188<h3><a name="option">Options</a></h3> 189<p class="first_ja"> 190The following options can be specified in place of [options...].<br /> 191</p> 192 193<div class="table"> 194<table border="1" summary="options"> 195<thead> 196<tr> 197<th align="center">Options</th> 198<th align="center">Description</th> 199</tr> 200</thead> 201<tbody> 202<tr> 203<td align="center">-O <File Name></td> 204<td align="center">Specifies the output filename.<BR> The file name "input_file_name.obj" is used, if no output file name is specified.</td> 205</tr> 206<tr> 207<td align="center">-I<file path></td> 208<td align="center">Specifies the file path of the input file.<BR> Specify a file path that contains both the assembler file and files included in the assembler file.<BR> The input file and include files are detected in the order in which directories are specified using this option.</td> 209</tr> 210<tr> 211<td align="center">-D<key>[=<value>]</td> 212<td align="center">Defines a macro.<BR> Specify the macro name in <key> and the macro value in <value>. <value> can be omitted.</td> 213</tr> 214<tr> 215<td align="center">-debug</td> 216<td align="center">Creates an object file with debug information.<BR> If this option is not specified, the output object file will not include the full path of the input file.</td> 217</tr> 218<tr> 219<td align="center">-nowarning</td> 220<td align="center">Sets execution so that warning messages are not output.</td> 221</tr> 222<tr> 223<td align="center">-preprocess</td> 224<td align="center">Executes preprocessing only.<BR> This option executes preprocessing on the input assembler file and outputs the result of deleting inactive text, such as blank lines and comments, to the standard output.<BR> File information is added to output results in the form "# line_number file_name." Assembler macro instructions are replaced with expanded instructions. Note, however, that macros are not replaced with expanded instructions if there is a syntax error in the macro instruction itself.</td> 225</tr> 226<tr> 227<td align="center">-dependency</td> 228<td align="center">Outputs assembler file dependencies.<br /> This option executes only preprocessing on the input assembler file, and outputs the names of all input files and include files referenced in input files to the standard output.<BR> The <CODE>-preprocess</CODE> option is ignored if specified along with the <CODE>-preprocess</CODE> option.</td> 229</tr> 230<tr> 231<td align="center">-? or -help</td> 232<td align="center">Displays help.</td> 233</tr> 234</tbody> 235</table> 236</div> 237 238<h2><a name="debug_build">Debug Build</a></h2> 239<p> 240Specifying the <CODE>-debug</CODE> option to the <CODE>ctr_VertexShaderAssembler</CODE> results in a debug build.<BR> Debug build assembler objects can be debugged using the shader debugger, but the operation speed on POD decreases.<br><br> <br> If the <CODE>-debug</CODE> option is not specified, the file path of the input files is removed from object files.<br><br> If the full path of input files is unknown, the shader debugger might not be able to locate the source file.<br><br> 241</p> 242 243<h2><a name="err_code">Error Codes (Assembler)</a></h2> 244 245<h3><a name="err_mes_format">Error Message Format</a></h3> 246<P> 247This page describes error messages output by the assembler. Errors are saved in the following format. <br /> <br /> Input file name (line number of error): Error level (error code): Error description<br/> <br /> Errors have an error level of either "warning" or "error." Execution can continue in the case of a "warning" level error. The input file name and/or error line number may not be displayed, depending on the type of error.<BR> <br /> 248</P> 249 250 251<h3><a name="err_message">Error Message</a></h3> 252<P> 253This table gives the error codes output by the assembler and their description. 254</P> 255 256<a name="8001xxxx"><h4>8001xxxx</h4></a> 257 258<div class="table"> 259<table border="1"> 260<thead> 261<tr> 262<th align="center">Error Code</th> 263<th align="center">Message / Description</th> 264</tr> 265</thead> 266<tbody> 267 268<tr> 269<td align="center" rowspan="2">80010001</td><td>The -O option cannot be specified more than once.</td> 270</tr> 271<tr> 272<td> 273The -O option can be specified only once.<br/> 274</td> 275</tr> 276 277<tr> 278<td align="center" rowspan="2">80010003</td><td> Definition key is not specified with -D option</td> 279</tr> 280<tr> 281<td> 282A key defined for the -D option has not been specified.<BR> Specify this option using the format -Dkey or -Dkey=value.<BR> 283</td> 284</tr> 285 286<tr> 287<td align="center" rowspan="2">80010004</td><td> Definition value is not specified with ‘parameter name’ macro.</td> 288</tr> 289<tr> 290<td> 291The value of the defined macro for the -D option has not been set correctly.<BR> Specify this option using the format -Dkey or -Dkey=value.<BR> 292</td> 293</tr> 294 295<tr> 296<td align="center" rowspan="2">80010005</td><td> ‘parameter name’ includes illegal character.</td> 297</tr> 298<tr> 299<td> 300An attempt was made to use the -D option to define a macro that uses illegal characters.<BR> Macro names must consist of ASCII alphanumeric characters and may include an underscore ("_"). 301</td> 302</tr> 303 304<tr> 305<td align="center" rowspan="2">80010006</td><td> ‘macro name’ macro is redefined.</td> 306</tr> 307<tr> 308<td> 309Two or more macros having the same name have been defined using the -D option.<BR> 310</td> 311</tr> 312 313<tr> 314<td align="center" rowspan="2">80010007</td><td> Only one assembler file can be specified as input.</td> 315</tr> 316<tr> 317<td> 318Two or more assembler files have been specified as input. Only one assembler file can be specified.<BR> 319</td> 320</tr> 321 322<tr> 323<td align="center" rowspan="2">80010008</td><td> Input file is not specified.</td> 324</tr> 325<tr> 326<td> 327No assembler file has been specified as input.<BR> 328</td> 329</tr> 330 331<tr> 332<td align="center" rowspan="2">8001000b</td><td> ‘macro name’ macro name cannot start from number.</td> 333</tr> 334<tr> 335<td> 336The macro name defined with the -D option cannot start with a number. 337</td> 338</tr> 339 340<tr> 341<td align="center" rowspan="2">8001000d</td><td> Unknown options are specified.</td> 342</tr> 343<tr> 344<td> 345An unknown option was specified. 346</td> 347</tr> 348 349</tbody> 350</table> 351</div> 352 353 354<a name="8003xxxx"><h4>8003xxxx</h4></a> 355 356<div class="table"> 357<table border="1"> 358<thead> 359<tr> 360<th align="center">Error Code</th> 361<th align="center">Message / Description</th> 362</tr> 363</thead> 364<tbody> 365 366<tr> 367<td align="center" rowspan="2">80030001</td><td> Cannot open ‘file name’</td> 368</tr> 369<tr> 370<td> 371The specified assembler file cannot be opened.<BR> 372</td> 373</tr> 374 375<tr> 376<td align="center" rowspan="2">80030002</td><td> Include file name is not specified.</td> 377</tr> 378<tr> 379<td> 380The file name has not been specified in an #include statement.<br/> Specify the file name using the format:<BR>#include "file name" 381</td> 382</tr> 383 384<tr> 385<td align="center" rowspan="2">80030003</td><td> Syntax error in #include</td> 386</tr> 387<tr> 388<td> 389The format of the #include statement is incorrect.<BR> Specify the file name using the format:<BR>#include "file name" 390</td> 391</tr> 392 393<tr> 394<td align="center" rowspan="2">80030004</td><td> Cannot open the include file “file name”.</td> 395</tr> 396<tr> 397<td> 398The include file cannot be opened.<BR> Specify an include path using the -I option.<BR> 399</td> 400</tr> 401 402<tr> 403<td align="center" rowspan="2">80030005</td><td> Definition key is not specified.</td> 404</tr> 405<tr> 406<td> 407The format of the #define statement is incorrect.<BR> Specify using the format:<BR>#define key value.<BR> 408</td> 409</tr> 410 411<tr> 412<td align="center" rowspan="2">80030006</td><td> Definition key includes an illegal character.</td> 413</tr> 414<tr> 415<td> 416Macro names defined using <CODE>#define</CODE> must consist of ASCII alphanumeric characters and may include an underscore ("_").<BR> 417</td> 418</tr> 419 420<tr> 421<td align="center" rowspan="2">80030007</td><td> ‘macro name’ macro is redefined.</td> 422</tr> 423<tr> 424<td> 425A macro defined using <CODE>#define</CODE> has been redefined elsewhere.<br/> 426</td> 427</tr> 428 429<tr> 430<td align="center" rowspan="2">80030008</td><td> Definition key is not specified.</td> 431</tr> 432<tr> 433<td> 434The format of the <CODE>#undef</CODE> statement is incorrect.<BR> Specify using the format:<BR>#undef key.<BR> 435</td> 436</tr> 437 438<tr> 439<td align="center" rowspan="2">8003000b</td><td> Correspondent “#ifdef” is not found.</td> 440</tr> 441<tr> 442<td> 443The assembler could not find the <CODE>#ifdef</CODE> statement that corresponds to the <CODE>#endif</CODE> statement.<BR> 444</td> 445</tr> 446 447<tr> 448<td align="center" rowspan="2">8003000c</td><td> Undefined directive.</td> 449</tr> 450<tr> 451<td> 452An unsupported pre-processor pseudo instruction has been specified.<BR> 453</td> 454</tr> 455 456<tr> 457<td align="center" rowspan="2">8003000d</td><td> #ifdef is not closed.</td> 458</tr> 459<tr> 460<td> 461The assembler could not find the <CODE>#endif</CODE> statement that corresponds to the <CODE>#ifdef</CODE> statement.<BR> 462</td> 463</tr> 464 465<tr> 466<td align="center" rowspan="2">8003000e</td><td> Syntax error. Macro is not specified.</td> 467</tr> 468<tr> 469<td> 470A macro has not been defined for the <CODE>#ifdef</CODE> statement.<BR> Specify using the format:<BR>#ifdef macro.<BR> 471</td> 472</tr> 473 474<tr> 475<td align="center" rowspan="2">8003000f</td><td> Syntax error. Invalid string is detected after macro.</td> 476</tr> 477<tr> 478<td> 479The format of the <CODE>#ifdef</CODE> statement is incorrect.<BR> Specify using the format:<BR>#ifdef macro.<BR> 480</td> 481</tr> 482 483<tr> 484<td align="center" rowspan="2">80030010</td><td> Syntax error. Macro is not specified.</td> 485</tr> 486<tr> 487<td> 488A macro has not been defined for the <CODE>#ifndef</CODE> statement.<BR> Specify using the format:<BR>#ifndef macro.<BR> 489</td> 490</tr> 491 492<tr> 493<td align="center" rowspan="2">80030011</td><td> Syntax error. Invalid string is detected after macro.</td> 494</tr> 495<tr> 496<td> 497The format of the <CODE>#ifndef</CODE> statement is incorrect.<BR> Specify using the format:<BR>#ifndef macro.<BR> 498</td> 499</tr> 500 501<tr> 502<td align="center" rowspan="2">80030012</td><td> Syntax Error. Invalid string is detected after directive.</td> 503</tr> 504<tr> 505<td> 506Macro names defined using <CODE>#if</CODE>, <CODE>#ifdef</CODE>, or <CODE>#ifndef</CODE> must consist of ASCII alphanumeric characters and may include an underscore ("_").<BR> 507</td> 508</tr> 509 510<tr> 511<td align="center" rowspan="2">80030013</td><td> Syntax Error. Invalid string is detected after directive.</td> 512</tr> 513<tr> 514<td> 515An illegal string was detected after an <CODE>#else</CODE> statement.<BR> 516</td> 517</tr> 518 519<tr> 520<td align="center" rowspan="2">80030014</td><td> Correspondent “#ifdef” is not found.</td> 521</tr> 522<tr> 523<td> 524The assembler could not find the <CODE>#ifdef</CODE> statement that corresponds to the <CODE>#else</CODE> statement.<BR> 525</td> 526</tr> 527 528<tr> 529<td align="center" rowspan="2">80030015</td><td> Syntax error. Invalid expression is detected.</td> 530</tr> 531<tr> 532<td> 533The format of the <CODE>#if</CODE> statement is incorrect.<BR> 534</td> 535</tr> 536 537<tr> 538<td align="center" rowspan="2">80030017</td><td> Syntax error. Invalid expression is detected.</td> 539</tr> 540<tr> 541<td> 542The macro listed after the <CODE>#if</CODE> statement includes illegal characters.<BR> Macro names specified using <CODE>#if</CODE> must consist of ASCII alphanumeric characters and may include an underscore ("_").<BR> 543</td> 544</tr> 545 546<tr> 547<td align="center" rowspan="2">80030018</td><td> #error</td> 548</tr> 549<tr> 550<td> 551This error is output intentionally by an <CODE>#error</CODE> statement.<BR> 552</td> 553</tr> 554 555<tr> 556<td align="center" rowspan="2">80030019</td><td> The top character of the definition key must not be a number.</td> 557</tr> 558<tr> 559<td> 560The first character of the macro name defined using <CODE>#define</CODE> must not be a number.<BR> 561</td> 562</tr> 563 564<tr> 565<td align="center" rowspan="2">8003001a</td><td> Macro parentheses have not been closed properly.</td> 566</tr> 567<tr> 568<td> 569Parentheses using in a <CODE>#define</CODE> definition have not been paired properly.<BR> 570</td> 571</tr> 572 573<tr> 574<td align="center" rowspan="2">8003001b</td><td> Invalid character is detected in macro argument.</td> 575</tr> 576<tr> 577<td> 578A function macro argument includes an illegal string.<BR> Macro names must consist of ASCII alphanumeric characters and may include an underscore ("_").<BR> 579</td> 580</tr> 581 582<tr> 583<td align="center" rowspan="2">8003001c</td><td> Duplicate macro argument is detected.</td> 584</tr> 585<tr> 586<td> 587More than one function macro argument uses the same string.<BR> 588</td> 589</tr> 590 591<tr> 592<td align="center" rowspan="2">8003001d</td><td> Invalid macro argument is specified.</td> 593</tr> 594<tr> 595<td> 596An attempt was made to use a macro function defined using illegal code.<BR> 597</td> 598</tr> 599 600<tr> 601<td align="center" rowspan="2">8003001e</td><td> pragma command bind_symbol is invalid format.</td> 602</tr> 603<tr> 604<td> 605The <CODE>#pragma bind_symbol</CODE> statement is invalid.<br /> 606</td> 607</tr> 608 609<tr> 610<td align="center" rowspan="2">8003001f</td><td> Undefined pragma command.</td> 611</tr> 612<tr> 613<td> 614An unsupported pragma command has been specified.<BR> 615</td> 616</tr> 617 618<tr> 619<td align="center" rowspan="2">80030020</td><td> Start index should be less than or equal to end index.</td> 620</tr> 621<tr> 622<td> 623The start register index of the <CODE>#pragma bind_symbol</CODE> statement is greater than the end register index.<BR> 624</td> 625</tr> 626 627<tr> 628<td align="center" rowspan="2">80030021</td><td> Binding symbol name is duplicated.</td> 629</tr> 630<tr> 631<td> 632The symbol name used in the <CODE>#pragma bind_symbol</CODE> statement is defined again elsewhere.<BR> 633</td> 634</tr> 635 636<tr> 637<td align="center" rowspan="2">80030022</td><td> Invalid register index is specified.</td> 638</tr> 639<tr> 640<td> 641An invalid register index has been defined by a <CODE>#pragma bind_symbol</CODE> statement.<BR> (Exceeds the maximum number of registers.)）<br /> 642</td> 643</tr> 644 645<tr> 646<td align="center" rowspan="2">80030023</td><td> Specified registers are already bound to other symbol.</td> 647</tr> 648<tr> 649<td> 650The same input register has been bound to more than one symbol by a <CODE>#pragma bind_symbol</CODE> statement.<BR> Only one symbol name can be bound to an input register.<BR> 651</td> 652</tr> 653 654<tr> 655<td align="center" rowspan="2">80030024</td><td> Pragma command output_map is invalid format.</td> 656</tr> 657<tr> 658<td> 659The <CODE>#pragma output_map</CODE> statement is invalid.<br /> 660</td> 661</tr> 662 663<tr> 664<td align="center" rowspan="2">80030025</td><td> Invalid data name is specified for pragma command output_map.</td> 665</tr> 666<tr> 667<td> 668An invalid data attribute name has been specified in a <CODE>#pragma output_map</CODE> statement.<BR> 669</td> 670</tr> 671 672<tr> 673<td align="center" rowspan="2">8003002c</td><td> Specified register is already mapped.</td> 674</tr> 675<tr> 676<td> 677The register specified in a <CODE>#pragma output_map</CODE> statement has already been specified for another <CODE>output_map</CODE>.<BR> 678</td> 679</tr> 680 681<tr> 682<td align="center" rowspan="2">8003002d</td><td> Specified attribute is already mapped.</td> 683</tr> 684<tr> 685<td> 686The data attribute name specified in a <CODE>#pragma output_map</CODE> statement has already been specified for another <CODE>output_map</CODE>.<BR> 687</td> 688</tr> 689 690<tr> 691<td align="center" rowspan="2">80030033</td><td> If all textures are mapped, texture1 and texture2 need to be mapped to same register.</td> 692</tr> 693<tr> 694<td> 695When all textures have been defined using a <CODE>#pragma output_map</CODE> statement, <CODE>texture1</CODE> and <CODE>texture2</CODE> must be mapped to the same register.<BR> 696</td> 697</tr> 698 699<tr> 700<td align="center" rowspan="2">80030034</td><td> comment /* */ is not closed.</td> 701</tr> 702<tr> 703<td> 704A comment of the form /* ... */ has not been terminated correctly.<br /> 705</td> 706</tr> 707 708</tbody> 709</table> 710</div> 711 712 713<a name="8004xxxx"><h4>8004xxxx</h4></a> 714 715<div class="table"> 716<table border="1"> 717<thead> 718<tr> 719<th align="center">Error Code</th> 720<th align="center">Message / Description</th> 721</tr> 722</thead> 723<tbody> 724 725<tr> 726<td align="center" rowspan="2">80040001</td><td> No vertex shader instruction.</td> 727</tr> 728<tr> 729<td> 730No shader instruction has been coded.<BR> 731</td> 732</tr> 733 734<tr> 735<td align="center" rowspan="2">80040005</td><td> loop instruction is not closed by endloop.</td> 736</tr> 737<tr> 738<td> 739The assembler cannot find the <CODE>endloop</CODE> instruction that corresponds to the given <CODE>loop</CODE> instruction. 740</td> 741</tr> 742 743<tr> 744<td align="center" rowspan="2">80040007</td><td> if or else instruction is not closed by endif.</td> 745</tr> 746<tr> 747<td> 748The assembler cannot find the <CODE>endif</CODE> instruction that corresponds to the given <CODE>ifc</CODE> or <CODE>ifb</CODE> instruction.<BR> 749</td> 750</tr> 751 752<tr> 753<td align="center" rowspan="2">80040009</td><td> Unknown instruction.</td> 754</tr> 755<tr> 756<td> 757An unknown shader instruction has been coded.<BR> 758</td> 759</tr> 760 761<tr> 762<td align="center" rowspan="2">8004000c</td><td> The number of operand is short.</td> 763</tr> 764<tr> 765<td> 766There are not enough operands.<BR> 767</td> 768</tr> 769 770<tr> 771<td align="center" rowspan="2">8004000d</td><td> There are some extra operands.</td> 772</tr> 773<tr> 774<td> 775An unnecessary operand or operands have been specified.<BR> 776</td> 777</tr> 778 779<tr> 780<td align="center" rowspan="2">8004000e</td><td> “operand” is unknown operand type.</td> 781</tr> 782<tr> 783<td> 784An operand of unknown type has been specified.<BR> 785</td> 786</tr> 787 788<tr> 789<td align="center" rowspan="2">8004000f</td><td> “operand” is invalid format operand.</td> 790</tr> 791<tr> 792<td> 793An operand has been specified in an invalid format.<BR> 794</td> 795</tr> 796 797<tr> 798<td align="center" rowspan="2">80040010</td><td> “operand” is invalid offset.</td> 799</tr> 800<tr> 801<td> 802The given register offset is invalid.<BR> 803</td> 804</tr> 805 806<tr> 807<td align="center" rowspan="2">80040011</td><td> “operand” is invalid address register offset.</td> 808</tr> 809<tr> 810<td> 811The offset given for the address register is invalid.<BR> 812</td> 813</tr> 814 815<tr> 816<td align="center" rowspan="2">80040012</td><td> “operand” include unknown component.</td> 817</tr> 818<tr> 819<td> 820An unknown component is specified.<BR> 821</td> 822</tr> 823 824<tr> 825<td align="center" rowspan="2">80040015</td><td> break instruction is not between loop and endloop.</td> 826</tr> 827<tr> 828<td> 829There is no <CODE>break</CODE> instruction between the given <CODE>loop</CODE> and <CODE>endloop</CODE> instructions.<BR> 830</td> 831</tr> 832 833<tr> 834<td align="center" rowspan="2">80040016</td><td> loop instruction nest achieved limit.</td> 835</tr> 836<tr> 837<td> 838The number of <CODE>loop</CODE> instructions exceeds the maximum number that can be nested.<BR> <CODE>loop</CODE> instructions can be nested up to four levels deep.<BR> 839</td> 840</tr> 841 842<tr> 843<td align="center" rowspan="2">80040017</td><td> Correspondent loop instruction is not found.</td> 844</tr> 845<tr> 846<td> 847The assembler cannot find the <CODE>loop</CODE> instruction that corresponds to the given <CODE>endloop</CODE> instruction.<BR> 848</td> 849</tr> 850 851<tr> 852<td align="center" rowspan="2">8004001a</td><td> if instruction nest achieved limit.</td> 853</tr> 854<tr> 855<td> 856The number of <CODE>ifb</CODE> or <CODE>ifc</CODE> instructions exceeds the maximum number that can be nested.<BR> <CODE>ifb</CODE> and <CODE>ifc</CODE> instructions can be nested up to a total of eight times.<BR> 857</td> 858</tr> 859 860<tr> 861<td align="center" rowspan="2">8004001b</td><td> Correspondent if instruction is not found.</td> 862</tr> 863<tr> 864<td> 865The assembler cannot find the <CODE>ifc</CODE> or <CODE>ifb</CODE> instruction that corresponds to the given <CODE>else</CODE> instruction.<BR> 866</td> 867</tr> 868 869<tr> 870<td align="center" rowspan="2">8004001d</td><td> loop instruction is not closed, but ret instruction is called.</td> 871</tr> 872<tr> 873<td> 874An <CODE>ret</CODE> instruction cannot be placed between <CODE>loop</CODE> and <CODE>endloop</CODE> instructions.<BR> 875</td> 876</tr> 877 878<tr> 879<td align="center" rowspan="2">8004001f</td><td> if else instruction is not closed, but ret instruction is called.</td> 880</tr> 881<tr> 882<td> 883An <CODE>ret</CODE> instruction cannot be placed between an <CODE>ifc</CODE>, <CODE>ifb</CODE>, or <CODE>else</CODE> instruction and an <CODE>endif</CODE> instruction.<BR> 884</td> 885</tr> 886 887<tr> 888<td align="center" rowspan="2">80040021</td><td> “operand” is invalid format operand.</td> 889</tr> 890<tr> 891<td> 892An operand has been specified in an invalid format.<BR> 893</td> 894</tr> 895 896<tr> 897<td align="center" rowspan="2">80040022</td><td> “operand” is invalid index.</td> 898</tr> 899<tr> 900<td> 901An invalid index has been specified for the operand register.<BR> 902</td> 903</tr> 904 905<tr> 906<td align="center" rowspan="2">80040023</td><td> “operand” is invalid format operand.</td> 907</tr> 908<tr> 909<td> 910Parentheses used to specify the offset for the operand register are not paired correctly.<BR> 911</td> 912</tr> 913 914<tr> 915<td align="center" rowspan="2">80040024</td><td> “operand” is invalid offset.</td> 916</tr> 917<tr> 918<td> 919An invalid offset has been specified for the operand register.<BR> 920</td> 921</tr> 922 923<tr> 924<td align="center" rowspan="2">80040025</td><td> “operand” is invalid offset.</td> 925</tr> 926<tr> 927<td> 928A register that cannot be used in an index specification is being used for the offset specification of the operand register. 929</td> 930</tr> 931 932<tr> 933<td align="center" rowspan="2">80040026</td><td> “operand” is invalid offset.</td> 934</tr> 935<tr> 936<td> 937An invalid index has been specified for the operand register.<BR> 938</td> 939</tr> 940 941<tr> 942<td align="center" rowspan="2">80040027</td><td> Correspondent if instruction is not found.</td> 943</tr> 944<tr> 945<td> 946The assembler cannot find the <CODE>ifc</CODE> or <CODE>ifb</CODE> instruction that corresponds to the given <CODE>endif</CODE> instruction.<BR> 947</td> 948</tr> 949 950<tr> 951<td align="center" rowspan="2">8004002a</td><td> Const register definition is duplicate.</td> 952</tr> 953<tr> 954<td> 955The floating point constant register defined by the given <CODE>def</CODE> instruction has been defined again elsewhere.<BR> 956</td> 957</tr> 958 959<tr> 960<td align="center" rowspan="2">8004002b</td><td> Bool register definition is duplicate.</td> 961</tr> 962<tr> 963<td> 964The boolean register defined by the given <CODE>defb</CODE> instruction has been defined again elsewhere.<BR> 965</td> 966</tr> 967 968<tr> 969<td align="center" rowspan="2">8004002c</td><td> Integer register definition is duplicate.</td> 970</tr> 971<tr> 972<td> 973The integer register defined by the given <CODE>defi</CODE> instruction has been defined again elsewhere.<BR> 974</td> 975</tr> 976 977<tr> 978<td align="center" rowspan="2">80040031</td><td> “label name” is already used label name.</td> 979</tr> 980<tr> 981<td> 982The same label name is being used elsewhere.<BR> 983</td> 984</tr> 985 986<tr> 987<td align="center" rowspan="2">80040032</td><td> Invalid label name is specified.</td> 988</tr> 989<tr> 990<td> 991The label name includes an invalid string.<BR> Label names must consist of ASCII alphanumeric characters and may include an underscore ("_").<BR> 992</td> 993</tr> 994 995<tr> 996<td align="center" rowspan="2">80040035</td><td> Error occurred while replacing macro instruction.</td> 997</tr> 998<tr> 999<td> 1000An error occurred while replacing a macro instruction.<BR> Check whether a floating point const register automatically defined by <CODE>sincos</CODE> (for instance) has already been defined using a <CODE>def</CODE> instruction. 1001</td> 1002</tr> 1003 1004<tr> 1005<td align="center" rowspan="2">80040039</td><td> Cannot break from if statement.</td> 1006</tr> 1007<tr> 1008<td> 1009A <CODE>break</CODE> instruction cannot be placed in code controlled by an <CODE>ifb</CODE> or <CODE>ifc</CODE> instruction.<BR> 1010</td> 1011</tr> 1012 1013<tr> 1014<td align="center" rowspan="2">8004003a</td><td> ret instruction cannot be used just after endloop or endif.</td> 1015</tr> 1016<tr> 1017<td> 1018An <CODE>ret</CODE> instruction cannot be called immediately after an <CODE>endloop</CODE> or <CODE>endif</CODE> instruction.<BR> 1019</td> 1020</tr> 1021 1022<tr> 1023<td align="center" rowspan="2">8004003b</td><td>At least 1 instruction need to be between if and else.</td> 1024</tr> 1025<tr> 1026<td> 1027At least one assembler instruction must be included between an <CODE>ifb</CODE> or <CODE>ifc</CODE> instruction and the corresponding <CODE>else</CODE> instruction. 1028</td> 1029</tr> 1030 1031<tr> 1032<td align="center" rowspan="2">8004003c</td><td>At least one instruction needs to be between <CODE>else</CODE> and <CODE>endif</CODE>.</td> 1033</tr> 1034<tr> 1035<td> 1036At least one assembler instruction must be included between an <CODE>else</CODE> instruction and the corresponding <CODE>endif</CODE> instruction.<BR> 1037</td> 1038</tr> 1039 1040<tr> 1041<td align="center" rowspan="2">8004003d</td><td>def instruction cannot specify the register defined by pragma bind_symbol.</td> 1042</tr> 1043<tr> 1044<td> 1045Registers specified in a <CODE>#pragma bind_symbol</CODE> statement cannot be specified in a <CODE>def</CODE> instruction.<br /> 1046</td> 1047</tr> 1048 1049<tr> 1050<td align="center" rowspan="2">8004003e</td><td>defb instruction cannot specify the register defined by pragma bind_symbol.</td> 1051</tr> 1052<tr> 1053<td> 1054Registers specified in a <CODE>#pragma bind_symbol</CODE> statement cannot be specified in a <CODE>defb</CODE> instruction.<br /> 1055</td> 1056</tr> 1057 1058<tr> 1059<td align="center" rowspan="2">8004003f</td><td>defi instruction cannot specify the register defined by pragma bind_symbol.</td> 1060</tr> 1061<tr> 1062<td> 1063Registers specified in a <CODE>#pragma bind_symbol</CODE> statement cannot be specified in a <CODE>defi</CODE> instruction.<br /> 1064</td> 1065</tr> 1066 1067<tr> 1068<td align="center" rowspan="2">80040040</td><td>At least 1 instruction need to be between loop and endloop.</td> 1069</tr> 1070<tr> 1071<td> 1072At least one assembler instruction must be included between a <CODE>loop</CODE> instruction and the corresponding <CODE>endloop</CODE> instruction.<BR> 1073</td> 1074</tr> 1075 1076<tr> 1077<td align="center" rowspan="2">80040041</td><td>mova cannot be called continuously.</td> 1078</tr> 1079<tr> 1080<td> 1081The <CODE>mova</CODE> instruction cannot be called consecutively.<BR> 1082</td> 1083</tr> 1084 1085<tr> 1086<td align="center" rowspan="2">80040042</td><td> ret cannot be called just after jpb and jpc.</td> 1087</tr> 1088<tr> 1089<td> 1090An <CODE>ret</CODE> instruction cannot be called immediately after a <CODE>jpb</CODE> or <CODE>jpc</CODE> instruction.<BR> 1091</td> 1092</tr> 1093 1094</tbody> 1095</table> 1096</div> 1097 1098 1099<a name="8005xxxx"><h4>8005xxxx</h4></a> 1100 1101<div class="table"> 1102<table border="1"> 1103<thead> 1104<tr> 1105<th align="center">Error Code</th> 1106<th align="center">Message / Description</th> 1107</tr> 1108</thead> 1109<tbody> 1110 1111<tr> 1112<td align="center" rowspan="2">80050001</td><td> Cannot open output file.</td> 1113</tr> 1114<tr> 1115<td> 1116The output file cannot be opened.<BR> Check whether there is another file having the same name with a read-only attribute.<BR> 1117</td> 1118</tr> 1119 1120<tr> 1121<td align="center" rowspan="2">80050003</td><td> The size of swizzle register is short.</td> 1122</tr> 1123<tr> 1124<td> 1125The number of swizzling or masking patterns exceeds the upper limit.<BR> 1126</td> 1127</tr> 1128 1129<tr> 1130<td align="center" rowspan="2">80050005</td><td> <CODE>ret</CODE> instruction cannot be found for Label “label name.”</td> 1131</tr> 1132<tr> 1133<td> 1134An <CODE>ret</CODE> instruction has not been set for the label.<BR> An <CODE>ret</CODE> instruction is required for labels called as subroutines.<BR> 1135</td> 1136</tr> 1137 1138<tr> 1139<td align="center" rowspan="2">80050007</td><td> The number of label is too big.</td> 1140</tr> 1141<tr> 1142<td> 1143The number of labels cannot exceed 65535.<BR> 1144</td> 1145</tr> 1146 1147<tr> 1148<td align="center" rowspan="2">8005000a</td><td> The exceptional jump is detected.</td> 1149</tr> 1150<tr> 1151<td> 1152An exceptional jump is being made.<BR> See "Instructions That Cannot be Continuously Called." 1153</td> 1154</tr> 1155 1156<tr> 1157<td align="center" rowspan="2">8005000b</td><td> Cannot jump out from if statement and loop statement.</td> 1158</tr> 1159<tr> 1160<td> 1161An exceptional jump cannot be made using the <CODE>jbp</CODE> or <CODE>jpc</CODE> instructions from within a pair of <CODE>ifc</CODE> or <CODE>ifb</CODE> and <CODE>endif</CODE> instructions, or from within a pair of <CODE>loop</CODE> and <CODE>endloop</CODE> instructions.<BR> 1162</td> 1163</tr> 1164 1165<tr> 1166<td align="center" rowspan="2">8005000c</td><td> breakc cannot be called just before endloop instruction.</td> 1167</tr> 1168<tr> 1169<td> 1170The <CODE>breakc</CODE> instruction cannot be called immediately before an <CODE>endloop</CODE> instruction.<BR> 1171</td> 1172</tr> 1173 1174<tr> 1175<td align="center" rowspan="2">8005000d</td><td> jpb and jpc cannot be called just before endloop instruction.</td> 1176</tr> 1177<tr> 1178<td> 1179A <CODE>jpb</CODE> or <CODE>jpc</CODE> instruction cannot be called immediately before an <CODE>endloop</CODE> instruction.<BR> 1180</td> 1181</tr> 1182 1183<tr> 1184<td align="center" rowspan="2">8005000e</td><td> jpb and jpc cannot be called just before endif instruction.</td> 1185</tr> 1186<tr> 1187<td> 1188A <CODE>jpb</CODE> or <CODE>jpc</CODE> instruction cannot be called immediately before an <CODE>endif</CODE> instruction.<BR> 1189</td> 1190</tr> 1191 1192<tr> 1193<td align="center" rowspan="2">8005000f</td><td> jpb and jpc cannot be called just before else instruction.</td> 1194</tr> 1195<tr> 1196<td> 1197A <CODE>jpb</CODE> or <CODE>jpc</CODE> instruction cannot be called immediately before an <CODE>else</CODE> instruction.<BR> 1198</td> 1199</tr> 1200 1201<tr> 1202<td align="center" rowspan="2">80050010</td><td> jpb and jpc cannot jump into if statement and loop statement.</td> 1203</tr> 1204<tr> 1205<td> 1206An internal jump using the <CODE>jpb</CODE> or <CODE>jpc</CODE> instruction cannot be made inside a pair of <CODE>if</CODE> and <CODE>endif</CODE> instructions or a pair of <CODE>loop</CODE> and <CODE>endloop</CODE> instructions.<BR> 1207</td> 1208</tr> 1209 1210</tbody> 1211</table> 1212</div> 1213 1214 1215<a name="8006xxxx"><h4>8006xxxx</h4></a> 1216 1217<div class="table"> 1218<table border="1"> 1219<thead> 1220<tr> 1221<th align="center">Error Code</th> 1222<th align="center">Message / Description</th> 1223</tr> 1224</thead> 1225<tbody> 1226 1227<tr> 1228<td align="center" rowspan="2">80060004</td><td> “operand” is invalid operand type.</td> 1229</tr> 1230<tr> 1231<td> 1232An operand that is not supported by a shader instruction has been specified.<BR> 1233</td> 1234</tr> 1235 1236<tr> 1237<td align="center" rowspan="2">80060005</td><td> Value cannot be specified for “operand”.</td> 1238</tr> 1239<tr> 1240<td> 1241A direct value cannot be specified for the operand.<BR> 1242</td> 1243</tr> 1244 1245<tr> 1246<td align="center" rowspan="2">80060006</td><td> Index cannot be specified for “operand”.</td> 1247</tr> 1248<tr> 1249<td> 1250A register number cannot be specified for the operand.<BR> 1251</td> 1252</tr> 1253 1254<tr> 1255<td align="center" rowspan="2">80060007</td><td>Component cannot be specified for “operand”.</td> 1256</tr> 1257<tr> 1258<td> 1259A component cannot be specified for the operand.<BR> 1260</td> 1261</tr> 1262 1263<tr> 1264<td align="center" rowspan="2">80060009</td><td> ‘ - ’ cannot be specified for "operand".</td> 1265</tr> 1266<tr> 1267<td> 1268"-" cannot be specified for the operand.<br /> 1269</td> 1270</tr> 1271 1272<tr> 1273<td align="center" rowspan="2">8006000b</td><td> Offset index cannot be specified for “operand”.</td> 1274</tr> 1275<tr> 1276<td> 1277An index offset cannot be specified for the operand.<BR> 1278</td> 1279</tr> 1280 1281<tr> 1282<td align="center" rowspan="2">8006000c</td><td> Address register offset cannot be specified for “operand”.</td> 1283</tr> 1284<tr> 1285<td> 1286An address register index offset cannot be specified for the operand.<BR> 1287</td> 1288</tr> 1289 1290<tr> 1291<td align="center" rowspan="2">8006000d</td><td> Loop counter register offset cannot be specified for “operand”.</td> 1292</tr> 1293<tr> 1294<td> 1295A loop counter index offset cannot be specified for the operand.<BR> 1296</td> 1297</tr> 1298 1299<tr> 1300<td align="center" rowspan="2">8006000e</td><td> Loop counter register and address register cannot be specified together.</td> 1301</tr> 1302<tr> 1303<td> 1304A loop counter register and address register cannot be specified at the same time.<BR> 1305</td> 1306</tr> 1307 1308<tr> 1309<td align="center" rowspan="2">8006000f</td><td> Index is not specified in “operand”.</td> 1310</tr> 1311<tr> 1312<td> 1313A register number has not been specified for the operand register.<BR> 1314</td> 1315</tr> 1316 1317<tr> 1318<td align="center" rowspan="2">80060010</td><td> Invalid index is specified in “operand”.</td> 1319</tr> 1320<tr> 1321<td> 1322The register number of the operand exceeds the number of registers.<BR> 1323</td> 1324</tr> 1325 1326<tr> 1327<td align="center" rowspan="2">80060011</td><td> Invalid mask is specified for dest.</td> 1328</tr> 1329<tr> 1330<td> 1331Masking has not been specified correctly for the operand dest.<BR> Specify masking in the order of x, y, z, w.<BR> 1332</td> 1333</tr> 1334 1335<tr> 1336<td align="center" rowspan="2">80060012</td><td> Multiple constant registers cannot be specified at the same time.</td> 1337</tr> 1338<tr> 1339<td> 1340More than one floating point constant register cannot be specified at the same time for an operand.<BR> 1341</td> 1342</tr> 1343 1344<tr> 1345<td align="center" rowspan="2">80060016</td><td> <CODE>Src</CODE> must have one of the following masks. .x|.y|.z|.w.</td> 1346</tr> 1347<tr> 1348<td> 1349Either .x, .y, .z, or .w must be specified for swizzling for the src operand.<BR> 1350</td> 1351</tr> 1352 1353<tr> 1354<td align="center" rowspan="2">80060017</td><td>Src0 and dest cannot be the same.</td> 1355</tr> 1356<tr> 1357<td> 1358The same register cannot be specified for <SPAN class="argument">src0</SPAN> and <SPAN class="argument">dest</SPAN>. 1359</td> 1360</tr> 1361 1362<tr> 1363<td align="center" rowspan="2">80060018</td><td> Src0 cannot have any swizzle except the default swizzle (.xyzw)</td> 1364</tr> 1365<tr> 1366<td> 1367Swizzling other than .xyzw cannot be specified src0.<BR> 1368</td> 1369</tr> 1370 1371<tr> 1372<td align="center" rowspan="2">80060019</td><td> <CODE>Dest</CODE> must have one of the following masks. .x|.y|.z|.xy|.xz|.yz|.xyz.</td> 1373</tr> 1374<tr> 1375<td> 1376Any one of .x, .y, .z, .xy, .xz, .yz, or .xyz must be specified as the masking for dest.<BR> 1377</td> 1378</tr> 1379 1380<tr> 1381<td align="center" rowspan="2">8006001b</td><td> Dest must have “mask pattern” mask.</td> 1382</tr> 1383<tr> 1384<td> 1385The masking indicated by the mask pattern must be specified for dest.<BR> 1386</td> 1387</tr> 1388 1389<tr> 1390<td align="center" rowspan="2">8006001f</td><td> Dest and src0 cannot be the same.</td> 1391</tr> 1392<tr> 1393<td> 1394The same register cannot be specified for <SPAN class="argument">dest</SPAN> and <SPAN class="argument">src0</SPAN>. 1395</td> 1396</tr> 1397 1398<tr> 1399<td align="center" rowspan="2">80060020</td><td> Dest and src cannot be the same.</td> 1400</tr> 1401<tr> 1402<td> 1403The same register cannot be specified for <SPAN class="argument">dest</SPAN> and <SPAN class="argument">src</SPAN>. 1404</td> 1405</tr> 1406 1407<tr> 1408<td align="center" rowspan="2">80060021</td><td> <CODE>Src0</CODE> must have one of the following masks. .x|.y|.z|.w.</td> 1409</tr> 1410<tr> 1411<td> 1412Any one of .x, .y, .z, or .w must be specified as the swizzling for src0.<BR> 1413</td> 1414</tr> 1415 1416<tr> 1417<td align="center" rowspan="2">80060022</td><td> <CODE>Src1</CODE> must have one of the following masks. .x|.y|.z|.w.</td> 1418</tr> 1419<tr> 1420<td> 1421Any one of .x, .y, .z, or .w must be specified as the swizzling for src1.<BR> 1422</td> 1423</tr> 1424 1425<tr> 1426<td align="center" rowspan="2">80060023</td><td> Dest and src1 cannot be the same.</td> 1427</tr> 1428<tr> 1429<td> 1430The same register cannot be specified for <SPAN class="argument">dest</SPAN> and <SPAN class="argument">src1</SPAN>. 1431</td> 1432</tr> 1433 1434<tr> 1435<td align="center" rowspan="2">80060024</td><td> All operand must be the different register.</td> 1436</tr> 1437<tr> 1438<td> 1439All operands must have a different register.<BR> 1440</td> 1441</tr> 1442 1443<tr> 1444<td align="center" rowspan="2">80060025</td><td> <CODE>Dest</CODE> must have one of the following masks. .x|.y|.xy.</td> 1445</tr> 1446<tr> 1447<td> 1448Any one of .x, .y, or .xy must be specified as the masking for dest.<BR> 1449</td> 1450</tr> 1451 1452<tr> 1453<td align="center" rowspan="2">80060026</td><td> Source modifier and swizzling cannot be specified for src1 and src2.</td> 1454</tr> 1455<tr> 1456<td> 1457Swizzling and negative signs cannot be specified for src1 and src2.<BR> 1458</td> 1459</tr> 1460 1461<tr> 1462<td align="center" rowspan="2">80060028</td><td> Dest and src1 cannot be the same.</td> 1463</tr> 1464<tr> 1465<td> 1466The same register cannot be specified for <SPAN class="argument">dest</SPAN> and <SPAN class="argument">src1</SPAN>. 1467</td> 1468</tr> 1469 1470<tr> 1471<td align="center" rowspan="2">80060029</td><td> Src1 cannot have any swizzle except the default swizzle (.xyzw)</td> 1472</tr> 1473<tr> 1474<td> 1475Swizzling other than .xyzw cannot be specified for src1.<BR> 1476</td> 1477</tr> 1478 1479<tr> 1480<td align="center" rowspan="2">8006002a</td><td> <CODE>Dest</CODE> must have one of the following masks. .x|.y|.z|.xy|.xz|.yz|.xyz.</td> 1481</tr> 1482<tr> 1483<td> 1484Any one of .x, .y, .z, .xy, .xz, .yz, or .xyz must be specified as the masking for dest.<BR> 1485</td> 1486</tr> 1487 1488<tr> 1489<td align="center" rowspan="2">8006002c</td><td> Source modifier and swizzling cannot be specified for src1.</td> 1490</tr> 1491<tr> 1492<td> 1493Swizzling and negative signs cannot be specified for src1.<BR> 1494</td> 1495</tr> 1496 1497<tr> 1498<td align="center" rowspan="2">8006002d</td><td> Source modifier and swizzling cannot be specified for src2.</td> 1499</tr> 1500<tr> 1501<td> 1502Swizzling and negative signs cannot be specified for src2.<BR> 1503</td> 1504</tr> 1505 1506<tr> 1507<td align="center" rowspan="2">8006002e</td><td> Invalid index is specified in “operand”.</td> 1508</tr> 1509<tr> 1510<td> 1511An invalid register number has been specified by the operand.<BR> The <CODE>m4x4</CODE> and other instructions specify the first number of the register for the operand. Check whether the register number used after macro expansion exceeds the maximum number of registers.<BR> 1512</td> 1513</tr> 1514 1515<tr> 1516<td align="center" rowspan="2">8006002f</td><td> Constant register cannot be used for src0.</td> 1517</tr> 1518<tr> 1519<td> 1520A floating point constant register cannot be used for src0.<BR> 1521</td> 1522</tr> 1523 1524<tr> 1525<td align="center" rowspan="2">80060030</td><td> Compare mode must be 0 or 1, 2, 3, 4, 5.</td> 1526</tr> 1527<tr> 1528<td> 1529A value from 0 through 5 must be specified for the comparison mode used by the <CODE>cmp</CODE> instruction.<BR> 1530</td> 1531</tr> 1532 1533<tr> 1534<td align="center" rowspan="2">80060031</td><td> Status register bit must be 0 or 1.</td> 1535</tr> 1536<tr> 1537<td> 1538A value of 0 or 1 must be specified for the status register value.<BR> 1539</td> 1540</tr> 1541 1542<tr> 1543<td align="center" rowspan="2">80060032</td><td> Condition mode is 0:OR 1:AND 2:OnlyStatus0 3:OnlyStatus1.</td> 1544</tr> 1545<tr> 1546<td> 1547A condition mode of 0 (OR), 1 (AND), 2 (OnlyStatus0), or 3 (OnlyStatus1) must be specified.<BR> 1548</td> 1549</tr> 1550 1551<tr> 1552<td align="center" rowspan="2">80060033</td><td> Address register component must be x or y.</td> 1553</tr> 1554<tr> 1555<td> 1556x or y must be specified for the address register component.<BR> 1557</td> 1558</tr> 1559 1560<tr> 1561<td align="center" rowspan="2">80060036</td><td> Src0 and src1 cannot be the same.</td> 1562</tr> 1563<tr> 1564<td> 1565The same register cannot be specified for <SPAN class="argument">src0</SPAN> and <SPAN class="argument">src1</SPAN>. 1566</td> 1567</tr> 1568 1569<tr> 1570<td align="center" rowspan="2">80060037</td><td> Src1 and src2 cannot be the same.</td> 1571</tr> 1572<tr> 1573<td> 1574The same register cannot be specified for <SPAN class="argument">src1</SPAN> and <SPAN class="argument">src2</SPAN>. 1575</td> 1576</tr> 1577 1578<tr> 1579<td align="center" rowspan="2">80060038</td><td> Dest and src2 cannot be the same.</td> 1580</tr> 1581<tr> 1582<td> 1583The same register cannot be specified for <SPAN class="argument">dest</SPAN> and <SPAN class="argument">src2</SPAN>. 1584</td> 1585</tr> 1586 1587<tr> 1588<td align="center" rowspan="2">8006003b</td><td> Loop count must be in the range [0, 255].</td> 1589</tr> 1590<tr> 1591<td> 1592The loop count for an integer register defined in a <CODE>defi</CODE> instruction must have a value in the range 0 through 255.<BR> 1593</td> 1594</tr> 1595 1596<tr> 1597<td align="center" rowspan="2">8006003c</td><td> Loop counter initial value must be in the range [0, 255].</td> 1598</tr> 1599<tr> 1600<td> 1601The initial loop counter register value for an integer register defined in a <CODE>defi</CODE> statement must have a value in the range 0 through 255.<BR> 1602</td> 1603</tr> 1604 1605<tr> 1606<td align="center" rowspan="2">8006003d</td><td> Loop counter step must be in the range [-128, 127].</td> 1607</tr> 1608<tr> 1609<td> 1610The loop counter register increment value for an integer register defined in a <CODE>defi</CODE> statement must have a value in the range -128 through 127.<BR> 1611</td> 1612</tr> 1613 1614<tr> 1615<td align="center" rowspan="2">80060040</td><td> Multiple input registers cannot be specified at the same time.</td> 1616</tr> 1617<tr> 1618<td> 1619More than one input register cannot be specified for an src operand at the same time. However, the same register can be registered twice at the same time.<BR> Example)<br/> add r0 , v0 , v0 // Does not result in an error<br/> add r0 , v0, v1 // Results in an error<br /> 1620</td> 1621</tr> 1622 1623</tbody> 1624</table> 1625</div> 1626 1627 1628<a name="400xxxxx"><h4>400xxxxx</h4></a> 1629 1630<div class="table"> 1631<table border="1"> 1632<thead> 1633<tr> 1634<th align="center">Warning Code</th> 1635<th align="center">Warning Message / Description</th> 1636</tr> 1637</thead> 1638<tbody> 1639 1640<tr> 1641<td align="center" rowspan="2">40070001</td><td> Label “label name” is undefined.</td> 1642</tr> 1643<tr> 1644<td> 1645The label cannot be found.<br/> (This can be resolved through a link if another object includes the label.)）<br /> 1646</td> 1647</tr> 1648 1649<tr> 1650<td align="center" rowspan="2">40070003</td><td> mova instruction both before else and after endif might cause hardware hang-up.</td> 1651</tr> 1652<tr> 1653<td> 1654A hardware error may result if a <CODE>mova</CODE> instruction is included both immediately before an <CODE>else</CODE> instruction and immediately after an <CODE>endif</CODE> instruction. See "Malfunctions Caused by the mova Instruction."<BR> 1655</td> 1656</tr> 1657 1658<tr> 1659<td align="center" rowspan="2">40070004</td><td> mova instruction at both first and last code in loop statement might cause hardware hang-up.</td> 1660</tr> 1661<tr> 1662<td> 1663A hardware error may result if a <CODE>mova</CODE> instruction is included both immediately after a <CODE>loop</CODE> instruction and immediately before an <CODE>endloop</CODE> instruction. See "Malfunctions Caused by the mova Instruction."<BR> 1664</td> 1665</tr> 1666 1667<tr> 1668<td align="center" rowspan="2">400a0001</td><td> The series of four instructions from here might cause hardware hang-up if this instruction stalled more than three clock cycles.</td> 1669</tr> 1670<tr> 1671<td> 1672A series of four instructions matches conditions for a hardware malfunction. If execution stalls for three or more clock cycles on the error line, hardware may malfunction. <BR> See "Malfunctions Caused by Executing Certain Instruction Sequences."<BR> 1673</td> 1674</tr> 1675 1676<tr> 1677<td align="center" rowspan="2">400a0002</td><td> The series of four instructions from here might cause hardware hang-up if this instruction stalled more than one clock cycle.</td> 1678</tr> 1679<tr> 1680<td> 1681A series of four instructions matches conditions for a hardware malfunction. If execution stalls for two or more clock cycles on the error line, hardware may malfunction. <BR> See "Malfunctions Caused by Executing Certain Instruction Sequences."<BR> 1682</td> 1683</tr> 1684 1685<tr> 1686<td align="center" rowspan="2">400a0003</td><td> mova instruction just before end instruction might cause hardware hang-up.</td> 1687</tr> 1688<tr> 1689<td> 1690Hardware malfunction may result if a <CODE>mova</CODE> instruction is included immediately before an <CODE>end</CODE> instruction.<BR> See "Malfunctions Caused by the mova Instruction."<BR> 1691</td> 1692</tr> 1693 1694<tr> 1695<td align="center" rowspan="2">400a0004</td><td> mova instruction just before the last instruction writing to output register might cause hardware hang-up.</td> 1696</tr> 1697<tr> 1698<td> 1699Hardware malfunction may result if a <CODE>mova</CODE> instruction is followed by an instruction that writes to an output register, and then followed by an <CODE>end</CODE> instruction. See "Malfunctions Caused by the mova Instruction."<BR> 1700</td> 1701</tr> 1702 1703<tr> 1704<td align="center" rowspan="2">400a0005</td><td> mova instruction just before branch instruction might cause hardware hang-up if mova stalled for register dependency.</td> 1705</tr> 1706<tr> 1707<td> 1708Hardware malfunction may result if a <CODE>mova</CODE> instruction is included immediately before a branch instruction, and execution stalls if a register depends on an instruction included even before that.<BR> See "Malfunctions Caused by the mova Instruction."<BR> 1709</td> 1710</tr> 1711 1712<tr> 1713<td align="center" rowspan="2">400a0006</td><td> The <CODE>mova</CODE> instruction and the following two instructions might cause the hardware to hang if a 1-clock cycle stall occurs immediately after the <CODE>mova</CODE> instruction.</td> 1714</tr> 1715<tr> 1716<td> 1717An illegal operation may occur if the instruction immediately after the <CODE>mova</CODE> instruction reads a temporary register and then the <CODE>mova</CODE> instruction and the following two instructions all read an input register or temporary register. For more information, see "Illegal Operations Caused by the Register Dependencies of Instructions Before and After the <CODE>mova</CODE> Instruction."<br /> 1718</td> 1719</tr> 1720 1721 1722</tbody> 1723</table> 1724</div> 1725 1726 1727<h2><a name="history">Revision History</a></h2> 1728 <dl class="history"> 1729 <dt>2012/06/20</dt> 1730<dd>Added warning code 400a0006.<br /> 1731 </dd> 1732 <dt>2011/12/20</dt> 1733 <dd>Initial version.<br /> 1734 </dd> 1735 </dl> 1736<hr><p>CONFIDENTIAL</p></body> 1737</html>