1 /*---------------------------------------------------------------------------*
2 Project: Horizon
3 File: math_Types.cpp
4
5 Copyright (C)2009 Nintendo Co., Ltd. All rights reserved.
6
7 These coded instructions, statements, and computer programs contain
8 proprietary information of Nintendo of America Inc. and/or Nintendo
9 Company Ltd., and are protected by Federal copyright law. They may
10 not be disclosed to third parties or copied or duplicated in any form,
11 in whole or in part, without the prior written consent of Nintendo.
12
13 $Rev: 24870 $
14 *---------------------------------------------------------------------------*/
15
16 #include <nn/math.h>
17
18 #include <nn/math/math_Types.h>
19 #include <nn/types.h>
20
21 #if !defined(NN_MATH_AS_INLINE)
22 #include <nn/math/inline/math_Types.ipp>
23 #include <nn/math/ARMv6/inline/math_Types.ipp>
24 #endif
25
26
27 namespace nn {
28 namespace math {
29 namespace ARMv6 {
30
31 #include <nn/hw/ARM/code32.h>
32
33 NN_FUNC_ATTR_PRIVATE_SECTION
34 asm MTX33*
MTX34ToMTX33Asm(MTX33 *,const MTX34 *)35 MTX34ToMTX33Asm(MTX33* , const MTX34* )
36 {
37 VLDMIA r1,{s0-s11} // The entire pM matrix is put in the [S0-S11] registers
38 MOV r2,r0
39
40 VSTMIA r2!,{s0-s2} // Store result
41 VSTMIA r2!,{s4-s6} // Store result
42 VSTMIA r2,{s8-s10} // Store result
43
44 BX lr // Return
45 }
46
47 NN_FUNC_ATTR_PRIVATE_SECTION
MTX43TransposeAsm(MTX34 *,const MTX43 *)48 asm MTX34* MTX43TransposeAsm(MTX34* , const MTX43* )
49 {
50 VLDR.F32 s0,[r1,#0*12+0*4]
51 VLDR.F32 s1,[r1,#1*12+0*4]
52 VLDR.F32 s2,[r1,#2*12+0*4]
53 VLDR.F32 s3,[r1,#3*12+0*4]
54 VLDR.F32 s4,[r1,#0*12+1*4]
55 VLDR.F32 s5,[r1,#1*12+1*4]
56 VLDR.F32 s6,[r1,#2*12+1*4]
57 VLDR.F32 s7,[r1,#3*12+1*4]
58 VLDR.F32 s8,[r1,#0*12+2*4]
59 VLDR.F32 s9,[r1,#1*12+2*4]
60 VLDR.F32 s10,[r1,#2*12+2*4]
61 VLDR.F32 s11,[r1,#3*12+2*4]
62
63 VSTMIA r0,{s0-s11} // Store result
64 BX lr // Return
65 }
66
67 NN_FUNC_ATTR_PRIVATE_SECTION
MTX34TransposeAsm(MTX43 *,const MTX34 *)68 asm MTX43* MTX34TransposeAsm(MTX43*, const MTX34*)
69 {
70 VLDR.F32 s0,[r1,#0*16+0*4]
71 VLDR.F32 s1,[r1,#1*16+0*4]
72 VLDR.F32 s2,[r1,#2*16+0*4]
73
74 VLDR.F32 s3,[r1,#0*16+1*4]
75 VLDR.F32 s4,[r1,#1*16+1*4]
76 VLDR.F32 s5,[r1,#2*16+1*4]
77
78 VLDR.F32 s6,[r1,#0*16+2*4]
79 VLDR.F32 s7,[r1,#1*16+2*4]
80 VLDR.F32 s8,[r1,#2*16+2*4]
81
82 VLDR.F32 s9,[r1,#0*16+3*4]
83 VLDR.F32 s10,[r1,#1*16+3*4]
84 VLDR.F32 s11,[r1,#2*16+3*4]
85
86 VSTMIA r0,{s0-s11} // Store result
87 BX lr // Return
88 }
89
90 #include <nn/hw/ARM/codereset.h>
91
92
93 } // namespace ARMv6
94 } // namespace math
95 } // namespace nn
96
97
98