1 /*---------------------------------------------------------------------------*
2 Project: TwlSDK - MI
3 File: mi_ndma.c
4
5 Copyright 2007-2008 Nintendo. All rights reserved.
6
7 These coded instructions, statements, and computer programs contain
8 proprietary information of Nintendo of America Inc. and/or Nintendo
9 Company Ltd., and are protected by Federal copyright law. They may
10 not be disclosed to third parties or copied or duplicated in any form,
11 in whole or in part, without the prior written consent of Nintendo.
12
13 $Date:: 2008-11-17#$
14 $Rev: 9325 $
15 $Author: kitase_hirotake $
16 *---------------------------------------------------------------------------*/
17 #ifdef SDK_ARM9
18 #include <twl.h>
19 #else
20 #include <twl_sp.h>
21 #endif
22
23 #include <nitro/os/common/system.h>
24 #include "../include/mi_ndma.h"
25
26 #ifdef SDK_ARM7
27 #include <twl/ltdwram_begin.h>
28 #endif
29
30 #ifdef SDK_ARM9
31 #include <twl/ltdmain_begin.h>
32 #endif
33
34
35 MINDmaConfig MIi_NDmaConfig[ MI_NDMA_MAX_NUM + 1 ];
36
37 //================================================================
38
39 static void MIi_Wait(u32 ndmaNo);
40
41 //---------------- Register setting
MIi_SetSrc(u32 ndmaNo,u32 src)42 static inline void MIi_SetSrc( u32 ndmaNo, u32 src )
43 {
44 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_SAD_WOFFSET ) = src;
45 }
MIi_SetDest(u32 ndmaNo,u32 dest)46 static inline void MIi_SetDest( u32 ndmaNo, u32 dest )
47 {
48 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_DAD_WOFFSET ) = dest;
49 }
MIi_SetTotalWordCount(u32 ndmaNo,u32 size)50 static inline void MIi_SetTotalWordCount( u32 ndmaNo, u32 size )
51 {
52 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_TCNT_WOFFSET ) = size;
53 }
MIi_SetWordCount(u32 ndmaNo,u32 size)54 static inline void MIi_SetWordCount( u32 ndmaNo, u32 size )
55 {
56 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_WCNT_WOFFSET ) = size;
57 }
MIi_SetInterval(u32 ndmaNo,u32 intervalTimer,u32 prescaler)58 static inline void MIi_SetInterval( u32 ndmaNo, u32 intervalTimer, u32 prescaler )
59 {
60 #ifdef SDK_ARM7
61 //---- In case of ARM7, intervalTimer==1 is nonsense
62 SDK_ASSERT(intervalTimer != 1);
63 #endif
64 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_BCNT_WOFFSET ) = intervalTimer | prescaler;
65 }
MIi_SetFillData(u32 ndmaNo,u32 data)66 static inline void MIi_SetFillData( u32 ndmaNo, u32 data )
67 {
68 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_FDATA_WOFFSET ) = data;
69 }
MIi_SetControl(u32 ndmaNo,u32 contData)70 static inline void MIi_SetControl( u32 ndmaNo, u32 contData )
71 {
72 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_CNT_WOFFSET ) = contData;
73 }
74 //---------------- Decide src and dest directions by type
75
MIi_GetControlData(MIiNDmaType ndmaType)76 static u32 MIi_GetControlData( MIiNDmaType ndmaType )
77 {
78 u32 contData;
79
80 switch( ndmaType )
81 {
82 case MIi_NDMA_TYPE_FILL:
83 contData = MIi_SRC_FILLDATA | MIi_DEST_INC;
84 break;
85 case MIi_NDMA_TYPE_COPY:
86 contData = MI_NDMA_SRC_INC | MIi_DEST_INC;
87 break;
88 case MIi_NDMA_TYPE_SEND:
89 case MIi_NDMA_TYPE_GXCOPY:
90 contData = MI_NDMA_SRC_INC | MIi_DEST_FIX;
91 break;
92 case MIi_NDMA_TYPE_GXCOPY_IF:
93 contData = MI_NDMA_SRC_INC | MIi_DEST_FIX | MI_NDMA_IF_ENABLE;
94 break;
95 case MIi_NDMA_TYPE_RECV:
96 contData = MI_NDMA_SRC_FIX | MIi_DEST_INC;
97 break;
98 case MIi_NDMA_TYPE_PIPE:
99 contData = MI_NDMA_SRC_FIX | MIi_DEST_FIX;
100 break;
101 case MIi_NDMA_TYPE_CAMERACONT:
102 contData = MI_NDMA_SRC_FIX | MIi_DEST_INC_RELOAD | MIi_CONT | MI_NDMA_IF_ENABLE;
103 break;
104 case MIi_NDMA_TYPE_HBLANK:
105 contData = MI_NDMA_SRC_INC | MIi_DEST_INC_RELOAD | MIi_CONT;
106 break;
107 case MIi_NDMA_TYPE_HBLANK_IF:
108 contData = MI_NDMA_SRC_INC | MIi_DEST_INC_RELOAD | MIi_CONT | MI_NDMA_IF_ENABLE;
109 break;
110 case MIi_NDMA_TYPE_MMCOPY:
111 contData = MI_NDMA_SRC_INC | MIi_DEST_FIX | MIi_CONT;
112 break;
113 default:
114 contData = 0;
115 break;
116 }
117
118 return contData;
119 }
120
121 //================================================================================
122 //----------------------------------------------------------------
MIi_NDma_withConfig_Dev(MIiNDmaType ndmaType,u32 ndmaNo,const void * src,void * dest,u32 data,u32 size,const MINDmaConfig * config,MINDmaDevice dev,u32 enable)123 void MIi_NDma_withConfig_Dev(MIiNDmaType ndmaType,
124 u32 ndmaNo,
125 const void* src, void* dest, u32 data, u32 size,
126 const MINDmaConfig *config,
127 MINDmaDevice dev,
128 u32 enable )
129 {
130 MIi_ASSERT_DMANO( ndmaNo );
131 MIi_WARNING_ADDRINTCM(dest, size);
132
133 if ( size > 0 )
134 {
135 u32 contData;
136 OSIntrMode enabled = OS_DisableInterrupts();
137
138 //---- Confirm DMA free
139 MIi_Wait( ndmaNo );
140
141 //---- Set up registers
142 if ( ndmaType != MIi_NDMA_TYPE_FILL )
143 {
144 MIi_SetSrc( ndmaNo, (u32)src );
145 }
146 MIi_SetDest( ndmaNo, (u32)dest );
147 MIi_SetInterval( ndmaNo, config->intervalTimer, config->prescaler );
148 if ( ndmaType == MIi_NDMA_TYPE_FILL )
149 {
150 MIi_SetFillData( ndmaNo, data );
151 }
152 if ( dev == MIi_NDMA_TIMING_IMMIDIATE )
153 {
154 MIi_SetWordCount( ndmaNo, size/4 );
155 }
156 else
157 {
158 MIi_SetTotalWordCount( ndmaNo, size/4 );
159 MIi_SetWordCount( ndmaNo,
160 (config->wordCount == MI_NDMA_AT_A_TIME)?
161 size/4:
162 config->wordCount );
163 }
164
165 //---- Decide control register
166 contData = config->blockWord | (enable & MI_NDMA_ENABLE_MASK);
167 contData |= MIi_GetControlData( ndmaType );
168 contData |= ( dev == MIi_NDMA_TIMING_IMMIDIATE )? MIi_IMM: dev;
169
170 //---- Start
171 MIi_SetControl( ndmaNo, contData );
172
173 //---- Wait till NDMA finish
174 MIi_Wait( ndmaNo );
175
176 (void)OS_RestoreInterrupts( enabled );
177 }
178 }
179
180 //----------------------------------------------------------------
181 // Async
MIi_NDmaAsync_withConfig_Dev(MIiNDmaType ndmaType,u32 ndmaNo,const void * src,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev,u32 enable)182 void MIi_NDmaAsync_withConfig_Dev(MIiNDmaType ndmaType,
183 u32 ndmaNo,
184 const void* src, void* dest, u32 data, u32 size,
185 MINDmaCallback callback, void *arg,
186 const MINDmaConfig *config,
187 MINDmaDevice dev,
188 u32 enable )
189 {
190 MIi_ASSERT_DMANO( ndmaNo );
191 MIi_WARNING_ADDRINTCM(dest, size);
192
193 if ( size == 0 )
194 {
195 MIi_CallCallback(callback, arg);
196 }
197 else
198 {
199 u32 contData;
200 OSIntrMode enabled = OS_DisableInterrupts();
201
202 //---- Confirm DMA free
203 MIi_Wait( ndmaNo );
204
205 //---- Set callback
206 if ( callback )
207 {
208 OSi_EnterNDmaCallback(ndmaNo, callback, arg);
209 }
210
211 //---- Set up registers
212 if ( ndmaType != MIi_NDMA_TYPE_FILL )
213 {
214 MIi_SetSrc( ndmaNo, (u32)src );
215 }
216 MIi_SetDest( ndmaNo, (u32)dest );
217 MIi_SetInterval( ndmaNo, config->intervalTimer, config->prescaler );
218 if ( ndmaType == MIi_NDMA_TYPE_FILL )
219 {
220 MIi_SetFillData( ndmaNo, data );
221 }
222 if ( dev == MIi_NDMA_TIMING_IMMIDIATE )
223 {
224 MIi_SetWordCount( ndmaNo, size/4 );
225 }
226 else
227 {
228 MIi_SetTotalWordCount( ndmaNo, size/4 );
229 MIi_SetWordCount( ndmaNo,
230 (config->wordCount == MI_NDMA_AT_A_TIME)?
231 size/4:
232 config->wordCount );
233 }
234
235 //---- Decide control register
236 contData = config->blockWord | (enable & MI_NDMA_ENABLE_MASK);
237 contData |= MIi_GetControlData( ndmaType );
238 contData |= ( dev == MIi_NDMA_TIMING_IMMIDIATE )? MIi_IMM: dev;
239
240 //---- Set interrupt enable
241 if ( callback )
242 {
243 contData |= MI_NDMA_IF_ENABLE;
244 }
245
246 //---- Start
247 MIi_SetControl( ndmaNo, contData );
248
249 (void)OS_RestoreInterrupts( enabled );
250 }
251 }
252
253
254 //================================================================================
255 // Initialize NDMA
256 //================================================================================
257 /*---------------------------------------------------------------------------*
258 Name: MI_InitNDma
259
260 Description: Initializes NDMA.
261
262 Arguments: None.
263
264 Returns: None.
265 *---------------------------------------------------------------------------*/
MI_InitNDma(void)266 void MI_InitNDma( void )
267 {
268 MI_SetNDmaArbitrament( MI_NDMA_ARBITRAMENT_ROUND, MI_NDMA_RCYCLE_DEFAULT );
269 MI_InitNDmaConfig();
270 }
271
272 //================================================================================
273 // do Fill, Copy, Send, Recv, Pipe by using NDMA
274 //
275 // (1) MI_NDmaXXX imm
276 // (2) MI_NDmaXXXAsync async
277 // (3) MI_NDmaXXXEx useConfig imm
278 // (4) MI_NDmaXXXExAsync useConfig, async,
279 // (5) MI_NDmaXXX_Dev imm drivenByDevice
280 // (6) MI_NDmaXXXAsync_Dev async, drivenByDevice
281 // (7) MI_NDmaXXXEx_Dev useConfig, imm drivenByDevice
282 // (8) MI_NDmaXXXExAsync_Dev useConfig, async, drivenByDevice
283 //
284 //================================================================================
285 /*---------------------------------------------------------------------------*
286 Name: MI_NDmaFill
287
288 Description: Fills memory with specified data.
289
290 Arguments: dmaNo: NDMA channel number
291 dest: Destination address
292 data: Fill data
293 size: Size (bytes)
294
295 Returns: None.
296
297 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
298 Name: MI_NDmaCopy
299
300 Description: Copies memory with NDMA.
301
302 Arguments: dmaNo: NDMA channel number
303 src: Source address
304 dest: Destination address
305 size: Size (bytes)
306
307 Returns: None.
308 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
309 Name: MI_NDmaSend
310
311 Description: Sends data to fixed address.
312
313 Arguments: dmaNo: NDMA channel number
314 src: Source address
315 dest: Destination address
316 size: Size (bytes)
317
318 Returns: None.
319
320 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
321 Name: MI_NDmaRecv
322
323 Description: Receives data from fixed address.
324
325 Arguments: dmaNo: NDMA channel number
326 src: Source address
327 dest: Destination address
328 size: Size (bytes)
329
330 Returns: None.
331
332 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
333 Name: MI_NDmaPipe
334
335 Description: Pipes data from fixed address to fixed address.
336
337 Arguments: dmaNo: NDMA channel number
338 src: Source address
339 dest: Destination address
340 size: Size (bytes)
341
342 Returns: None.
343
344 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
345 Name: MI_NDmaClear
346
347 Description: Fills memory with 0
348 (define of MI_NDmaFill)
349
350 Arguments: dmaNo: NDMA channel number
351 dest: Destination address
352 size: Size (bytes)
353
354 Returns: None.
355
356 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - -
357 (Common)
358 Arguments: callback: Callback that will be called at NDMA finish
359 arg: Argument of callback
360 config: Pointer to NDMA config struct
361 dev: Device that causes NDMA (MI_NDMA_TIMING_xxxx)
362
363 *---------------------------------------------------------------------------*/
364 // (1)
MI_NDmaFill(u32 ndmaNo,void * dest,u32 data,u32 size)365 void MI_NDmaFill(u32 ndmaNo, void *dest, u32 data, u32 size)
366 {
367 MIi_NDma( MIi_NDMA_TYPE_FILL,
368 ndmaNo,
369 0, /*Not used*/
370 dest,
371 data,
372 size,
373 MI_NDMA_ENABLE );
374 }
MI_NDmaFill_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size)375 void MI_NDmaFill_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size)
376 {
377 MIi_NDma( MIi_NDMA_TYPE_FILL,
378 ndmaNo,
379 0, /*Not used*/
380 dest,
381 data,
382 size,
383 MI_NDMA_DISABLE );
384 }
385
MI_NDmaCopy(u32 ndmaNo,const void * src,void * dest,u32 size)386 void MI_NDmaCopy(u32 ndmaNo, const void *src, void *dest, u32 size )
387 {
388 MIi_NDma( MIi_NDMA_TYPE_COPY,
389 ndmaNo,
390 src,
391 dest,
392 0,/*Not used*/
393 size,
394 MI_NDMA_ENABLE );
395 }
396
MI_NDmaCopy_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size)397 void MI_NDmaCopy_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size )
398 {
399 MIi_NDma( MIi_NDMA_TYPE_COPY,
400 ndmaNo,
401 src,
402 dest,
403 0,/*Not used*/
404 size,
405 MI_NDMA_DISABLE );
406 }
407
MI_NDmaSend(u32 ndmaNo,const void * src,volatile void * dest,u32 size)408 void MI_NDmaSend(u32 ndmaNo, const void *src, volatile void *dest, u32 size )
409 {
410 MIi_NDma( MIi_NDMA_TYPE_SEND,
411 ndmaNo,
412 src,
413 (void*)dest,
414 0,/*Not used*/
415 size,
416 MI_NDMA_ENABLE );
417 }
418
MI_NDmaSend_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size)419 void MI_NDmaSend_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size )
420 {
421 MIi_NDma( MIi_NDMA_TYPE_SEND,
422 ndmaNo,
423 src,
424 (void*)dest,
425 0,/*Not used*/
426 size,
427 MI_NDMA_DISABLE );
428 }
429
MI_NDmaRecv(u32 ndmaNo,volatile const void * src,void * dest,u32 size)430 void MI_NDmaRecv(u32 ndmaNo, volatile const void *src, void *dest, u32 size )
431 {
432 MIi_NDma( MIi_NDMA_TYPE_RECV,
433 ndmaNo,
434 (const void*)src,
435 dest,
436 0,/*Not used*/
437 size,
438 MI_NDMA_ENABLE );
439 }
440
MI_NDmaRecv_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size)441 void MI_NDmaRecv_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size )
442 {
443 MIi_NDma( MIi_NDMA_TYPE_RECV,
444 ndmaNo,
445 (const void*)src,
446 dest,
447 0,/*Not used*/
448 size,
449 MI_NDMA_DISABLE );
450 }
451
MI_NDmaPipe(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size)452 void MI_NDmaPipe(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size )
453 {
454 MIi_NDma( MIi_NDMA_TYPE_PIPE,
455 ndmaNo,
456 (const void*)src,
457 (void*)dest,
458 0,/*Not used*/
459 size,
460 MI_NDMA_ENABLE );
461 }
462
MI_NDmaPipe_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size)463 void MI_NDmaPipe_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size )
464 {
465 MIi_NDma( MIi_NDMA_TYPE_PIPE,
466 ndmaNo,
467 (const void*)src,
468 (void*)dest,
469 0,/*Not used*/
470 size,
471 MI_NDMA_DISABLE );
472 }
473
474 // (2)
MI_NDmaFillAsync(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg)475 void MI_NDmaFillAsync(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void *arg )
476 {
477 MIi_NDmaAsync( MIi_NDMA_TYPE_FILL,
478 ndmaNo,
479 0,/*Not used*/
480 dest,
481 data,
482 size,
483 callback,
484 arg,
485 MI_NDMA_ENABLE );
486 }
487
MI_NDmaFillAsync_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg)488 void MI_NDmaFillAsync_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void *arg )
489 {
490 MIi_NDmaAsync( MIi_NDMA_TYPE_FILL,
491 ndmaNo,
492 0,/*Not used*/
493 dest,
494 data,
495 size,
496 callback,
497 arg,
498 MI_NDMA_DISABLE );
499 }
500
MI_NDmaCopyAsync(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg)501 void MI_NDmaCopyAsync(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg )
502 {
503 MIi_NDmaAsync( MIi_NDMA_TYPE_COPY,
504 ndmaNo,
505 src,
506 dest,
507 0,/*Not used*/
508 size,
509 callback,
510 arg,
511 MI_NDMA_ENABLE );
512 }
513
MI_NDmaCopyAsync_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg)514 void MI_NDmaCopyAsync_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg )
515 {
516 MIi_NDmaAsync( MIi_NDMA_TYPE_COPY,
517 ndmaNo,
518 src,
519 dest,
520 0,/*Not used*/
521 size,
522 callback,
523 arg,
524 MI_NDMA_DISABLE );
525 }
526
MI_NDmaSendAsync(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg)527 void MI_NDmaSendAsync(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg )
528 {
529 MIi_NDmaAsync( MIi_NDMA_TYPE_SEND,
530 ndmaNo,
531 src,
532 (void*)dest,
533 0,/*Not used*/
534 size,
535 callback,
536 arg,
537 MI_NDMA_ENABLE );
538 }
539
MI_NDmaSendAsync_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg)540 void MI_NDmaSendAsync_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg )
541 {
542 MIi_NDmaAsync( MIi_NDMA_TYPE_SEND,
543 ndmaNo,
544 src,
545 (void*)dest,
546 0,/*Not used*/
547 size,
548 callback,
549 arg,
550 MI_NDMA_DISABLE );
551 }
552
MI_NDmaRecvAsync(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg)553 void MI_NDmaRecvAsync(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg )
554 {
555 MIi_NDmaAsync( MIi_NDMA_TYPE_RECV,
556 ndmaNo,
557 (const void*)src,
558 dest,
559 0,/*Not used*/
560 size,
561 callback,
562 arg,
563 MI_NDMA_ENABLE );
564 }
565
MI_NDmaRecvAsync_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg)566 void MI_NDmaRecvAsync_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg )
567 {
568 MIi_NDmaAsync( MIi_NDMA_TYPE_RECV,
569 ndmaNo,
570 (const void*)src,
571 dest,
572 0,/*Not used*/
573 size,
574 callback,
575 arg,
576 MI_NDMA_DISABLE );
577 }
578
MI_NDmaPipeAsync(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg)579 void MI_NDmaPipeAsync(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg )
580 {
581 MIi_NDmaAsync( MIi_NDMA_TYPE_PIPE,
582 ndmaNo,
583 (const void*)src,
584 (void*)dest,
585 0,/*Not used*/
586 size,
587 callback,
588 arg,
589 MI_NDMA_ENABLE );
590 }
591
MI_NDmaPipeAsync_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg)592 void MI_NDmaPipeAsync_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg )
593 {
594 MIi_NDmaAsync( MIi_NDMA_TYPE_PIPE,
595 ndmaNo,
596 (const void*)src,
597 (void*)dest,
598 0,/*Not used*/
599 size,
600 callback,
601 arg,
602 MI_NDMA_DISABLE );
603 }
604
605 // (3)
MI_NDmaFillEx(u32 ndmaNo,void * dest,u32 data,u32 size,const MINDmaConfig * config)606 void MI_NDmaFillEx(u32 ndmaNo, void *dest, u32 data, u32 size, const MINDmaConfig *config)
607 {
608 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_FILL,
609 ndmaNo,
610 0/*Not used*/,
611 dest,
612 data,
613 size,
614 config,
615 MIi_NDMA_TIMING_IMMIDIATE,
616 MI_NDMA_ENABLE );
617 }
618
MI_NDmaFillEx_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,const MINDmaConfig * config)619 void MI_NDmaFillEx_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, const MINDmaConfig *config)
620 {
621 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_FILL,
622 ndmaNo,
623 0/*Not used*/,
624 dest,
625 data,
626 size,
627 config,
628 MIi_NDMA_TIMING_IMMIDIATE,
629 MI_NDMA_DISABLE );
630 }
631
MI_NDmaCopyEx(u32 ndmaNo,const void * src,void * dest,u32 size,const MINDmaConfig * config)632 void MI_NDmaCopyEx(u32 ndmaNo, const void *src, void *dest, u32 size, const MINDmaConfig *config )
633 {
634 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_COPY,
635 ndmaNo,
636 src,
637 dest,
638 0/*Not used*/,
639 size,
640 config,
641 MIi_NDMA_TIMING_IMMIDIATE,
642 MI_NDMA_ENABLE );
643 }
644
MI_NDmaCopyEx_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,const MINDmaConfig * config)645 void MI_NDmaCopyEx_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, const MINDmaConfig *config )
646 {
647 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_COPY,
648 ndmaNo,
649 src,
650 dest,
651 0/*Not used*/,
652 size,
653 config,
654 MIi_NDMA_TIMING_IMMIDIATE,
655 MI_NDMA_DISABLE );
656 }
657
MI_NDmaSendEx(u32 ndmaNo,const void * src,volatile void * dest,u32 size,const MINDmaConfig * config)658 void MI_NDmaSendEx(u32 ndmaNo, const void *src, volatile void *dest, u32 size, const MINDmaConfig *config )
659 {
660 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_SEND,
661 ndmaNo,
662 src,
663 (void*)dest,
664 0/*Not used*/,
665 size,
666 config,
667 MIi_NDMA_TIMING_IMMIDIATE,
668 MI_NDMA_ENABLE );
669 }
670
MI_NDmaSendEx_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,const MINDmaConfig * config)671 void MI_NDmaSendEx_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, const MINDmaConfig *config )
672 {
673 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_SEND,
674 ndmaNo,
675 src,
676 (void*)dest,
677 0/*Not used*/,
678 size,
679 config,
680 MIi_NDMA_TIMING_IMMIDIATE,
681 MI_NDMA_DISABLE );
682 }
683
MI_NDmaRecvEx(u32 ndmaNo,volatile const void * src,void * dest,u32 size,const MINDmaConfig * config)684 void MI_NDmaRecvEx(u32 ndmaNo, volatile const void *src, void *dest, u32 size, const MINDmaConfig *config )
685 {
686 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_RECV,
687 ndmaNo,
688 (const void*)src,
689 dest,
690 0/*Not used*/,
691 size,
692 config,
693 MIi_NDMA_TIMING_IMMIDIATE,
694 MI_NDMA_ENABLE );
695 }
696
MI_NDmaRecvEx_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,const MINDmaConfig * config)697 void MI_NDmaRecvEx_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, const MINDmaConfig *config )
698 {
699 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_RECV,
700 ndmaNo,
701 (const void*)src,
702 dest,
703 0/*Not used*/,
704 size,
705 config,
706 MIi_NDMA_TIMING_IMMIDIATE,
707 MI_NDMA_DISABLE );
708 }
709
MI_NDmaPipeEx(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,const MINDmaConfig * config)710 void MI_NDmaPipeEx(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, const MINDmaConfig *config )
711 {
712 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_PIPE,
713 ndmaNo,
714 (const void*)src,
715 (void*)dest,
716 0/*Not used*/,
717 size,
718 config,
719 MIi_NDMA_TIMING_IMMIDIATE,
720 MI_NDMA_ENABLE );
721 }
722
MI_NDmaPipeEx_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,const MINDmaConfig * config)723 void MI_NDmaPipeEx_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, const MINDmaConfig *config )
724 {
725 MIi_NDma_withConfig_Dev( MIi_NDMA_TYPE_PIPE,
726 ndmaNo,
727 (const void*)src,
728 (void*)dest,
729 0/*Not used*/,
730 size,
731 config,
732 MIi_NDMA_TIMING_IMMIDIATE,
733 MI_NDMA_DISABLE );
734 }
735
736 // (4)
MI_NDmaFillExAsync(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)737 void MI_NDmaFillExAsync(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void *arg, const MINDmaConfig *config)
738 {
739 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_FILL,
740 ndmaNo,
741 0,/*Not used*/
742 dest,
743 data,
744 size,
745 callback,
746 arg,
747 config,
748 MIi_NDMA_TIMING_IMMIDIATE,
749 MI_NDMA_ENABLE );
750 }
751
MI_NDmaFillExAsync_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)752 void MI_NDmaFillExAsync_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void *arg, const MINDmaConfig *config)
753 {
754 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_FILL,
755 ndmaNo,
756 0,/*Not used*/
757 dest,
758 data,
759 size,
760 callback,
761 arg,
762 config,
763 MIi_NDMA_TIMING_IMMIDIATE,
764 MI_NDMA_DISABLE );
765 }
766
MI_NDmaCopyExAsync(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)767 void MI_NDmaCopyExAsync(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config )
768 {
769 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_COPY,
770 ndmaNo,
771 src,
772 dest,
773 0,/*Not used*/
774 size,
775 callback,
776 arg,
777 config,
778 MIi_NDMA_TIMING_IMMIDIATE,
779 MI_NDMA_ENABLE );
780 }
781
MI_NDmaCopyExAsync_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)782 void MI_NDmaCopyExAsync_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config )
783 {
784 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_COPY,
785 ndmaNo,
786 src,
787 dest,
788 0,/*Not used*/
789 size,
790 callback,
791 arg,
792 config,
793 MIi_NDMA_TIMING_IMMIDIATE,
794 MI_NDMA_DISABLE );
795 }
796
MI_NDmaSendExAsync(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)797 void MI_NDmaSendExAsync(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config)
798 {
799 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_SEND,
800 ndmaNo,
801 src,
802 (void*)dest,
803 0,/*Not used*/
804 size,
805 callback,
806 arg,
807 config,
808 MIi_NDMA_TIMING_IMMIDIATE,
809 MI_NDMA_ENABLE );
810 }
811
MI_NDmaSendExAsync_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)812 void MI_NDmaSendExAsync_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config)
813 {
814 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_SEND,
815 ndmaNo,
816 src,
817 (void*)dest,
818 0,/*Not used*/
819 size,
820 callback,
821 arg,
822 config,
823 MIi_NDMA_TIMING_IMMIDIATE,
824 MI_NDMA_DISABLE );
825 }
826
MI_NDmaRecvExAsync(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)827 void MI_NDmaRecvExAsync(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config)
828 {
829 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_RECV,
830 ndmaNo,
831 (const void*)src,
832 dest,
833 0,/*Not used*/
834 size,
835 callback,
836 arg,
837 config,
838 MIi_NDMA_TIMING_IMMIDIATE,
839 MI_NDMA_ENABLE );
840 }
841
MI_NDmaRecvExAsync_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)842 void MI_NDmaRecvExAsync_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config)
843 {
844 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_RECV,
845 ndmaNo,
846 (const void*)src,
847 dest,
848 0,/*Not used*/
849 size,
850 callback,
851 arg,
852 config,
853 MIi_NDMA_TIMING_IMMIDIATE,
854 MI_NDMA_DISABLE );
855 }
856
MI_NDmaPipeExAsync(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)857 void MI_NDmaPipeExAsync(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config)
858 {
859 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_PIPE,
860 ndmaNo,
861 (const void*)src,
862 (void*)dest,
863 0,/*Not used*/
864 size,
865 callback,
866 arg,
867 config,
868 MIi_NDMA_TIMING_IMMIDIATE,
869 MI_NDMA_ENABLE );
870 }
871
MI_NDmaPipeExAsync_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config)872 void MI_NDmaPipeExAsync_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config)
873 {
874 MIi_NDmaAsync_withConfig_Dev( MIi_NDMA_TYPE_PIPE,
875 ndmaNo,
876 (const void*)src,
877 (void*)dest,
878 0,/*Not used*/
879 size,
880 callback,
881 arg,
882 config,
883 MIi_NDMA_TIMING_IMMIDIATE,
884 MI_NDMA_DISABLE );
885 }
886
887 // (5)
MI_NDmaFill_Dev(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaDevice dev)888 void MI_NDmaFill_Dev(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaDevice dev )
889 {
890 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_FILL,
891 ndmaNo,
892 0/*Not used*/,
893 dest,
894 data,
895 size,
896 &MIi_NDmaConfig[ndmaNo],
897 dev,
898 MI_NDMA_ENABLE );
899 }
900
MI_NDmaFill_Dev_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaDevice dev)901 void MI_NDmaFill_Dev_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaDevice dev )
902 {
903 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_FILL,
904 ndmaNo,
905 0/*Not used*/,
906 dest,
907 data,
908 size,
909 &MIi_NDmaConfig[ndmaNo],
910 dev,
911 MI_NDMA_DISABLE );
912 }
913
MI_NDmaCopy_Dev(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaDevice dev)914 void MI_NDmaCopy_Dev(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaDevice dev )
915 {
916 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_COPY,
917 ndmaNo,
918 src,
919 dest,
920 0/*Not used*/,
921 size,
922 &MIi_NDmaConfig[ndmaNo],
923 dev,
924 MI_NDMA_ENABLE );
925 }
926
MI_NDmaCopy_Dev_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaDevice dev)927 void MI_NDmaCopy_Dev_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaDevice dev )
928 {
929 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_COPY,
930 ndmaNo,
931 src,
932 dest,
933 0/*Not used*/,
934 size,
935 &MIi_NDmaConfig[ndmaNo],
936 dev,
937 MI_NDMA_DISABLE );
938 }
939
MI_NDmaSend_Dev(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaDevice dev)940 void MI_NDmaSend_Dev(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaDevice dev )
941 {
942 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_SEND,
943 ndmaNo,
944 src,
945 (void*)dest,
946 0/*Not used*/,
947 size,
948 &MIi_NDmaConfig[ndmaNo],
949 dev,
950 MI_NDMA_ENABLE );
951 }
952
MI_NDmaSend_Dev_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaDevice dev)953 void MI_NDmaSend_Dev_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaDevice dev )
954 {
955 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_SEND,
956 ndmaNo,
957 src,
958 (void*)dest,
959 0/*Not used*/,
960 size,
961 &MIi_NDmaConfig[ndmaNo],
962 dev,
963 MI_NDMA_DISABLE );
964 }
965
MI_NDmaRecv_Dev(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaDevice dev)966 void MI_NDmaRecv_Dev(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaDevice dev )
967 {
968 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_RECV,
969 ndmaNo,
970 (const void*)src,
971 dest,
972 0/*Not used*/,
973 size,
974 &MIi_NDmaConfig[ndmaNo],
975 dev,
976 MI_NDMA_ENABLE );
977 }
978
MI_NDmaRecv_Dev_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaDevice dev)979 void MI_NDmaRecv_Dev_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaDevice dev )
980 {
981 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_RECV,
982 ndmaNo,
983 (const void*)src,
984 dest,
985 0/*Not used*/,
986 size,
987 &MIi_NDmaConfig[ndmaNo],
988 dev,
989 MI_NDMA_DISABLE );
990 }
991
MI_NDmaPipe_Dev(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaDevice dev)992 void MI_NDmaPipe_Dev(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaDevice dev )
993 {
994 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
995 ndmaNo,
996 (const void*)src,
997 (void*)dest,
998 0/*Not used*/,
999 size,
1000 &MIi_NDmaConfig[ndmaNo],
1001 dev,
1002 MI_NDMA_ENABLE );
1003 }
1004
MI_NDmaPipe_Dev_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaDevice dev)1005 void MI_NDmaPipe_Dev_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaDevice dev )
1006 {
1007 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1008 ndmaNo,
1009 (const void*)src,
1010 (void*)dest,
1011 0/*Not used*/,
1012 size,
1013 &MIi_NDmaConfig[ndmaNo],
1014 dev,
1015 MI_NDMA_DISABLE );
1016 }
1017
1018 // (6)
MI_NDmaFillAsync_Dev(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1019 void MI_NDmaFillAsync_Dev(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev)
1020 {
1021 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_FILL,
1022 ndmaNo,
1023 0/*Not used*/,
1024 dest,
1025 data,
1026 size,
1027 callback,
1028 arg,
1029 &MIi_NDmaConfig[ndmaNo],
1030 dev,
1031 MI_NDMA_ENABLE );
1032 }
1033
MI_NDmaFillAsync_Dev_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1034 void MI_NDmaFillAsync_Dev_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev)
1035 {
1036 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_FILL,
1037 ndmaNo,
1038 0/*Not used*/,
1039 dest,
1040 data,
1041 size,
1042 callback,
1043 arg,
1044 &MIi_NDmaConfig[ndmaNo],
1045 dev,
1046 MI_NDMA_DISABLE );
1047 }
1048
MI_NDmaCopyAsync_Dev(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1049 void MI_NDmaCopyAsync_Dev(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1050 {
1051 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_COPY,
1052 ndmaNo,
1053 src,
1054 dest,
1055 0/*Not used*/,
1056 size,
1057 callback,
1058 arg,
1059 &MIi_NDmaConfig[ndmaNo],
1060 dev,
1061 MI_NDMA_ENABLE );
1062 }
1063
MI_NDmaCopyAsync_Dev_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1064 void MI_NDmaCopyAsync_Dev_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1065 {
1066 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_COPY,
1067 ndmaNo,
1068 src,
1069 dest,
1070 0/*Not used*/,
1071 size,
1072 callback,
1073 arg,
1074 &MIi_NDmaConfig[ndmaNo],
1075 dev,
1076 MI_NDMA_DISABLE );
1077 }
1078
MI_NDmaSendAsync_Dev(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1079 void MI_NDmaSendAsync_Dev(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1080 {
1081 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_SEND,
1082 ndmaNo,
1083 src,
1084 (void*)dest,
1085 0/*Not used*/,
1086 size,
1087 callback,
1088 arg,
1089 &MIi_NDmaConfig[ndmaNo],
1090 dev,
1091 MI_NDMA_ENABLE );
1092 }
1093
MI_NDmaSendAsync_Dev_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1094 void MI_NDmaSendAsync_Dev_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1095 {
1096 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_SEND,
1097 ndmaNo,
1098 src,
1099 (void*)dest,
1100 0/*Not used*/,
1101 size,
1102 callback,
1103 arg,
1104 &MIi_NDmaConfig[ndmaNo],
1105 dev,
1106 MI_NDMA_DISABLE );
1107 }
1108
MI_NDmaRecvAsync_Dev(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1109 void MI_NDmaRecvAsync_Dev(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1110 {
1111 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_RECV,
1112 ndmaNo,
1113 (const void*)src,
1114 dest,
1115 0/*Not used*/,
1116 size,
1117 callback,
1118 arg,
1119 &MIi_NDmaConfig[ndmaNo],
1120 dev,
1121 MI_NDMA_ENABLE );
1122 }
1123
MI_NDmaRecvAsync_Dev_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1124 void MI_NDmaRecvAsync_Dev_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1125 {
1126 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_RECV,
1127 ndmaNo,
1128 (const void*)src,
1129 dest,
1130 0/*Not used*/,
1131 size,
1132 callback,
1133 arg,
1134 &MIi_NDmaConfig[ndmaNo],
1135 dev,
1136 MI_NDMA_DISABLE );
1137 }
1138
MI_NDmaPipeAsync_Dev(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1139 void MI_NDmaPipeAsync_Dev(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1140 {
1141 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1142 ndmaNo,
1143 (const void*)src,
1144 (void*)dest,
1145 0/*Not used*/,
1146 size,
1147 callback,
1148 arg,
1149 &MIi_NDmaConfig[ndmaNo],
1150 dev,
1151 MI_NDMA_ENABLE );
1152 }
1153
MI_NDmaPipeAsync_Dev_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,MINDmaDevice dev)1154 void MI_NDmaPipeAsync_Dev_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, MINDmaDevice dev )
1155 {
1156 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1157 ndmaNo,
1158 (const void*)src,
1159 (void*)dest,
1160 0/*Not used*/,
1161 size,
1162 callback,
1163 arg,
1164 &MIi_NDmaConfig[ndmaNo],
1165 dev,
1166 MI_NDMA_DISABLE );
1167 }
1168
1169 // (7)
MI_NDmaFillEx_Dev(u32 ndmaNo,void * dest,u32 data,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1170 void MI_NDmaFillEx_Dev(u32 ndmaNo, void *dest, u32 data, u32 size, const MINDmaConfig *config, MINDmaDevice dev)
1171 {
1172 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_FILL,
1173 ndmaNo, 0/*Not used*/,
1174 dest,
1175 data,
1176 size,
1177 config,
1178 dev,
1179 MI_NDMA_ENABLE );
1180 }
1181
MI_NDmaFillEx_Dev_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1182 void MI_NDmaFillEx_Dev_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, const MINDmaConfig *config, MINDmaDevice dev)
1183 {
1184 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_FILL,
1185 ndmaNo, 0/*Not used*/,
1186 dest,
1187 data,
1188 size,
1189 config,
1190 dev,
1191 MI_NDMA_DISABLE );
1192 }
1193
MI_NDmaCopyEx_Dev(u32 ndmaNo,const void * src,void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1194 void MI_NDmaCopyEx_Dev(u32 ndmaNo, const void *src, void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1195 {
1196 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_COPY,
1197 ndmaNo,
1198 src,
1199 dest,
1200 0/*Not used*/,
1201 size,
1202 config,
1203 dev,
1204 MI_NDMA_ENABLE );
1205 }
1206
MI_NDmaCopyEx_Dev_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1207 void MI_NDmaCopyEx_Dev_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1208 {
1209 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_COPY,
1210 ndmaNo,
1211 src,
1212 dest,
1213 0/*Not used*/,
1214 size,
1215 config,
1216 dev,
1217 MI_NDMA_DISABLE );
1218 }
1219
MI_NDmaSendEx_Dev(u32 ndmaNo,const void * src,volatile void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1220 void MI_NDmaSendEx_Dev(u32 ndmaNo, const void *src, volatile void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1221 {
1222 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_SEND,
1223 ndmaNo,
1224 src,
1225 (void*)dest,
1226 0/*Not used*/,
1227 size,
1228 config,
1229 dev,
1230 MI_NDMA_ENABLE );
1231 }
1232
MI_NDmaSendEx_Dev_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1233 void MI_NDmaSendEx_Dev_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1234 {
1235 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_SEND,
1236 ndmaNo,
1237 src,
1238 (void*)dest,
1239 0/*Not used*/,
1240 size,
1241 config,
1242 dev,
1243 MI_NDMA_DISABLE );
1244 }
1245
MI_NDmaRecvEx_Dev(u32 ndmaNo,volatile const void * src,void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1246 void MI_NDmaRecvEx_Dev(u32 ndmaNo, volatile const void *src, void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1247 {
1248 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_RECV,
1249 ndmaNo,
1250 (const void*)src,
1251 dest,
1252 0/*Not used*/,
1253 size,
1254 config,
1255 dev,
1256 MI_NDMA_ENABLE );
1257 }
1258
MI_NDmaRecvEx_Dev_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1259 void MI_NDmaRecvEx_Dev_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1260 {
1261 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_RECV,
1262 ndmaNo,
1263 (const void*)src,
1264 dest,
1265 0/*Not used*/,
1266 size,
1267 config,
1268 dev,
1269 MI_NDMA_DISABLE );
1270 }
1271
MI_NDmaPipeEx_Dev(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1272 void MI_NDmaPipeEx_Dev(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1273 {
1274 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1275 ndmaNo,
1276 (const void*)src,
1277 (void*)dest,
1278 0/*Not used*/,
1279 size,
1280 config,
1281 dev,
1282 MI_NDMA_ENABLE );
1283 }
1284
MI_NDmaPipeEx_Dev_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,const MINDmaConfig * config,MINDmaDevice dev)1285 void MI_NDmaPipeEx_Dev_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, const MINDmaConfig *config, MINDmaDevice dev )
1286 {
1287 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1288 ndmaNo,
1289 (const void*)src,
1290 (void*)dest,
1291 0/*Not used*/,
1292 size,
1293 config,
1294 dev,
1295 MI_NDMA_DISABLE );
1296 }
1297
1298 // (8)
MI_NDmaFillExAsync_Dev(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1299 void MI_NDmaFillExAsync_Dev(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev)
1300 {
1301 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_FILL,
1302 ndmaNo,
1303 0/*Not used*/,
1304 dest,
1305 data,
1306 size,
1307 callback,
1308 arg,
1309 config,
1310 dev,
1311 MI_NDMA_ENABLE );
1312 }
1313
MI_NDmaFillExAsync_Dev_SetUp(u32 ndmaNo,void * dest,u32 data,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1314 void MI_NDmaFillExAsync_Dev_SetUp(u32 ndmaNo, void *dest, u32 data, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev)
1315 {
1316 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_FILL,
1317 ndmaNo,
1318 0/*Not used*/,
1319 dest,
1320 data,
1321 size,
1322 callback,
1323 arg,
1324 config,
1325 dev,
1326 MI_NDMA_DISABLE );
1327 }
1328
MI_NDmaCopyExAsync_Dev(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1329 void MI_NDmaCopyExAsync_Dev(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1330 {
1331 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_COPY,
1332 ndmaNo,
1333 src,
1334 dest,
1335 0/*Not used*/,
1336 size,
1337 callback,
1338 arg,
1339 config,
1340 dev,
1341 MI_NDMA_ENABLE );
1342 }
1343
MI_NDmaCopyExAsync_Dev_SetUp(u32 ndmaNo,const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1344 void MI_NDmaCopyExAsync_Dev_SetUp(u32 ndmaNo, const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1345 {
1346 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_COPY,
1347 ndmaNo,
1348 src,
1349 dest,
1350 0/*Not used*/,
1351 size,
1352 callback,
1353 arg,
1354 config,
1355 dev,
1356 MI_NDMA_DISABLE );
1357 }
1358
MI_NDmaSendExAsync_Dev(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1359 void MI_NDmaSendExAsync_Dev(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1360 {
1361 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_SEND,
1362 ndmaNo,
1363 src,
1364 (void*)dest,
1365 0/*Not used*/,
1366 size,
1367 callback,
1368 arg,
1369 config,
1370 dev,
1371 MI_NDMA_ENABLE );
1372 }
1373
MI_NDmaSendExAsync_Dev_SetUp(u32 ndmaNo,const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1374 void MI_NDmaSendExAsync_Dev_SetUp(u32 ndmaNo, const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1375 {
1376 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_SEND,
1377 ndmaNo,
1378 src,
1379 (void*)dest,
1380 0/*Not used*/,
1381 size,
1382 callback,
1383 arg,
1384 config,
1385 dev,
1386 MI_NDMA_DISABLE );
1387 }
1388
MI_NDmaRecvExAsync_Dev(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1389 void MI_NDmaRecvExAsync_Dev(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1390 {
1391 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_RECV,
1392 ndmaNo,
1393 (const void*)src,
1394 dest,
1395 0/*Not used*/,
1396 size,
1397 callback,
1398 arg,
1399 config,
1400 dev,
1401 MI_NDMA_ENABLE );
1402 }
1403
MI_NDmaRecvExAsync_Dev_SetUp(u32 ndmaNo,volatile const void * src,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1404 void MI_NDmaRecvExAsync_Dev_SetUp(u32 ndmaNo, volatile const void *src, void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1405 {
1406 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_RECV,
1407 ndmaNo,
1408 (const void*)src,
1409 dest,
1410 0/*Not used*/,
1411 size,
1412 callback,
1413 arg,
1414 config,
1415 dev,
1416 MI_NDMA_DISABLE );
1417 }
1418
MI_NDmaPipeExAsync_Dev(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1419 void MI_NDmaPipeExAsync_Dev(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1420 {
1421 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1422 ndmaNo,
1423 (const void*)src,
1424 (void*)dest,
1425 0/*Not used*/,
1426 size,
1427 callback,
1428 arg,
1429 config,
1430 dev,
1431 MI_NDMA_ENABLE );
1432 }
1433
MI_NDmaPipeExAsync_Dev_SetUp(u32 ndmaNo,volatile const void * src,volatile void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * config,MINDmaDevice dev)1434 void MI_NDmaPipeExAsync_Dev_SetUp(u32 ndmaNo, volatile const void *src, volatile void *dest, u32 size, MINDmaCallback callback, void* arg, const MINDmaConfig *config, MINDmaDevice dev )
1435 {
1436 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_PIPE,
1437 ndmaNo,
1438 (const void*)src,
1439 (void*)dest,
1440 0/*Not used*/,
1441 size,
1442 callback,
1443 arg,
1444 config,
1445 dev,
1446 MI_NDMA_DISABLE );
1447 }
1448
1449 //================================================================================
1450 // DMA WAIT
1451 //================================================================================
1452 /*---------------------------------------------------------------------------*
1453 Name: MI_IsNDmaBusy
1454
1455 Description: Checks whether DMA is busy or not.
1456
1457 Arguments: ndmaNo: DMA channel number
1458
1459 Returns: TRUE if DMA is busy, FALSE if not.
1460 *---------------------------------------------------------------------------*/
MI_IsNDmaBusy(u32 ndmaNo)1461 BOOL MI_IsNDmaBusy(u32 ndmaNo)
1462 {
1463 MIi_ASSERT_DMANO(ndmaNo);
1464
1465 {
1466 vu32 *dmaCntp = MI_NDMA_REGADDR( ndmaNo, MI_NDMA_REG_CNT_WOFFSET );
1467 return (BOOL)(( *dmaCntp & REG_MI_NDMA0CNT_E_MASK ) >> REG_MI_NDMA0CNT_E_SHIFT );
1468 }
1469 }
1470
1471 /*---------------------------------------------------------------------------*
1472 Name: MI_WaitNDma
1473
1474 Description: Waits while DMA is busy.
1475
1476 Arguments: ndmaNo: DMA channel number
1477
1478 Returns: None.
1479 *---------------------------------------------------------------------------*/
MI_WaitNDma(u32 ndmaNo)1480 void MI_WaitNDma(u32 ndmaNo)
1481 {
1482 MIi_ASSERT_DMANO(ndmaNo);
1483
1484 {
1485 OSIntrMode enabled = OS_DisableInterrupts();
1486 vu32 *dmaCntp = MI_NDMA_REGADDR( ndmaNo, MI_NDMA_REG_CNT_WOFFSET );
1487 while(*dmaCntp & REG_MI_DMA0CNT_E_MASK)
1488 {
1489 // Nothing
1490 }
1491 (void)OS_RestoreInterrupts( enabled );
1492 }
1493 }
1494
1495 /*---------------------------------------------------------------------------*
1496 Name: MI_StopNDma
1497
1498 Description: Stops DMA.
1499
1500 Arguments: ndmaNo: DMA channel number
1501
1502 Returns: None.
1503 *---------------------------------------------------------------------------*/
MI_StopNDma(u32 ndmaNo)1504 void MI_StopNDma(u32 ndmaNo)
1505 {
1506 OSIntrMode enabled = OS_DisableInterrupts();
1507
1508 vu32* regCont = MI_NDMA_REGADDR( ndmaNo, MI_NDMA_REG_CNT_WOFFSET );
1509
1510 *regCont = *regCont & (~MI_NDMA_ENABLE);
1511
1512 //---- ARM9 must wait 2 cycles (load is 1/2 cycle)
1513 {
1514 u32 dummy = *regCont;
1515 }
1516 {
1517 u32 dummy = *regCont;
1518 }
1519
1520 (void)OS_RestoreInterrupts(enabled);
1521 }
1522
1523 /*---------------------------------------------------------------------------*
1524 Name: MI_StopAllNDma
1525
1526 Description: Stops all DMA.
1527
1528 Arguments: None.
1529
1530 Returns: None.
1531 *---------------------------------------------------------------------------*/
MI_StopAllNDma(void)1532 void MI_StopAllNDma(void)
1533 {
1534 MI_StopNDma(0);
1535 MI_StopNDma(1);
1536 MI_StopNDma(2);
1537 MI_StopNDma(3);
1538 }
1539
1540 /*---------------------------------------------------------------------------*
1541 Name: MIi_Wait
1542
1543 Description: Waits while DMA is busy.
1544
1545 Arguments: ndmaNo: DMA channel number
1546
1547 Returns: None.
1548 *---------------------------------------------------------------------------*/
MIi_Wait(u32 ndmaNo)1549 static void MIi_Wait(u32 ndmaNo)
1550 {
1551 MIi_ASSERT_DMANO(ndmaNo);
1552
1553 while( MI_IsNDmaBusy(ndmaNo) == TRUE )
1554 {
1555 // Do nothing
1556 }
1557 }
1558
1559 //================================================================================
1560 // restart NDMA
1561 //================================================================================
1562 /*---------------------------------------------------------------------------*
1563 Name: MI_NDmaRestart
1564
1565 Description: Restarts DMA.
1566 Just set the enable bit.
1567
1568 Arguments: ndmaNo: DMA channel number
1569
1570 Returns: None.
1571 *---------------------------------------------------------------------------*/
MI_NDmaRestart(u32 ndmaNo)1572 void MI_NDmaRestart(u32 ndmaNo)
1573 {
1574 MIi_ASSERT_DMANO(ndmaNo);
1575
1576 MIi_Wait( ndmaNo );
1577 MI_NDMA_REG( ndmaNo, MI_NDMA_REG_CNT_WOFFSET ) |= MI_NDMA_ENABLE;
1578 }
1579
1580 //================================================================================
1581 // NDMA configure
1582 //================================================================================
1583 /*---------------------------------------------------------------------------*
1584 Name: MI_SetNDmaArbitrament
1585
1586 Description: Sets arbitrament mode and cycle for DSP and CPU access to AHB
1587
1588 Arguments: mode: Arbitrament mode
1589
1590 MI_NDMA_ARBITRAMENT_FIX fix
1591 MI_NDMA_ARBITRAMENT_ROUND round robin
1592
1593 cycle: Cycles for DSP and CPU access to AHB
1594 This parameter is available only when mode is round robin.
1595
1596 MI_NDMA_RCYCLE_n
1597 (n = 0, 1, 2, 4, 8, ..., 8192, 16384)
1598
1599 Returns: None.
1600 *---------------------------------------------------------------------------*/
MI_SetNDmaArbitrament(u32 mode,u32 cycle)1601 void MI_SetNDmaArbitrament( u32 mode, u32 cycle )
1602 {
1603 if ( mode == MI_NDMA_ARBITRAMENT_ROUND )
1604 {
1605 reg_MI_NDMAGCNT = MI_NDMA_ARBITRAMENT_ROUND | cycle;
1606 }
1607 else
1608 {
1609 reg_MI_NDMAGCNT = MI_NDMA_ARBITRAMENT_FIX;
1610 }
1611 }
1612
1613 /*---------------------------------------------------------------------------*
1614 Name: MI_GetNDmaArbitramentMode
1615
1616 Description: Gets NDMA arbitrament mode setting.
1617
1618 Arguments: None.
1619
1620 Returns: Value that is set.
1621
1622 MI_NDMA_ARBITRAMENT_FIX fix
1623 MI_NDMA_ARBITRAMENT_ROUND round robin
1624
1625 *---------------------------------------------------------------------------*/
MI_GetNDmaArbitramentMode(void)1626 u32 MI_GetNDmaArbitramentMode(void)
1627 {
1628 return (reg_MI_NDMAGCNT & REG_MI_NDMAGCNT_ARBITER_MASK);
1629 }
1630
1631 /*---------------------------------------------------------------------------*
1632 Name: MI_GetNDmaArbitramentRoundRobinCycle
1633
1634 Description: Gets cycle setting for DSP and CPU access to AHB.
1635
1636 Arguments: None.
1637
1638 Returns: Value that is set.
1639
1640 MI_NDMA_RCYCLE_n (n = 0, 1, 2, 4, 8, ..., 16384)
1641
1642 *---------------------------------------------------------------------------*/
MI_GetNDmaArbitramentRoundRobinCycle(void)1643 u32 MI_GetNDmaArbitramentRoundRobinCycle(void)
1644 {
1645 return (reg_MI_NDMAGCNT & MI_NDMA_RCYCLE_MASK);
1646 }
1647
1648 /*---------------------------------------------------------------------------*
1649 Name: MI_SetNDmaInterval
1650
1651 Description: Sets interval time and prescaler.
1652
1653 Arguments: ndmaNo: NDMA number. (0-3)
1654 intervalTime: Interval time (0-0xffff)
1655 prescaler: Prescaler (MI_NDMA_INTERVAL_PS_n (n=1,4,16,64))
1656
1657 Returns: None.
1658 *---------------------------------------------------------------------------*/
MI_SetNDmaInterval(u32 ndmaNo,u32 intervalTimer,u32 prescaler)1659 void MI_SetNDmaInterval( u32 ndmaNo, u32 intervalTimer, u32 prescaler )
1660 {
1661 MIi_NDmaConfig[ndmaNo].intervalTimer = intervalTimer;
1662 MIi_NDmaConfig[ndmaNo].prescaler = prescaler;
1663 }
1664
1665 /*---------------------------------------------------------------------------*
1666 Name: MI_GetNDmaIntervalTimer
1667
1668 Description: Gets interval time that has been set.
1669
1670 Arguments: ndmaNo: NDMA number. (0-3)
1671
1672 Returns: Interval time (0-0xffff).
1673 *---------------------------------------------------------------------------*/
MI_GetNDmaIntervalTimer(u32 ndmaNo)1674 u32 MI_GetNDmaIntervalTimer( u32 ndmaNo )
1675 {
1676 return MIi_NDmaConfig[ndmaNo].intervalTimer;
1677 }
1678
1679 /*---------------------------------------------------------------------------*
1680 Name: MI_GetNDmaIntervalPrescaler
1681
1682 Description: Gets prescaler setting that has been set.
1683
1684 Arguments: ndmaNo: NDMA number. (0-3)
1685
1686 Returns: Prescaler.
1687 MI_NDMA_INTERVAL_PS_n (n=1,4,16,64)
1688 *---------------------------------------------------------------------------*/
MI_GetNDmaIntervalPrescaler(u32 ndmaNo)1689 u32 MI_GetNDmaIntervalPrescaler( u32 ndmaNo )
1690 {
1691 return MIi_NDmaConfig[ndmaNo].prescaler;
1692 }
1693
1694 /*---------------------------------------------------------------------------*
1695 Name: MI_SetNDmaBlockWord
1696
1697 Description: Sets block word, transferred by DMA at one time.
1698
1699 Arguments: ndmaNo: NDMA number. (0-3)
1700 word: Block word
1701
1702 MI_NDMA_WORD_n (n=1,2,4,8,...,32768)
1703
1704 Returns: None.
1705
1706 *---------------------------------------------------------------------------*/
MI_SetNDmaBlockWord(u32 ndmaNo,u32 word)1707 void MI_SetNDmaBlockWord( u32 ndmaNo, u32 word )
1708 {
1709 MIi_NDmaConfig[ndmaNo].blockWord = word;
1710 }
1711
1712 /*---------------------------------------------------------------------------*
1713 Name: MI_GetNDmaBlockWord
1714
1715 Description: Gets block word, transferred by DMA at one time.
1716
1717 Arguments: ndmaNo
1718
1719 Returns: Value that is set.
1720
1721 MI_NDMA_RCYCLE_n
1722 (n = 0, 1, 2, 4, 8, ..., 8192, 16384)
1723
1724 *---------------------------------------------------------------------------*/
MI_GetNDmaBlockWord(u32 ndmaNo)1725 u32 MI_GetNDmaBlockWord( u32 ndmaNo )
1726 {
1727 return MIi_NDmaConfig[ndmaNo].blockWord;
1728 }
1729
1730 /*---------------------------------------------------------------------------*
1731 Name: MI_SetNDmaWordCount
1732
1733 Description: Sets word count for each DMA request to start.
1734
1735 Arguments: ndmaNo: NDMA number (0-3)
1736 wordCount: Word count for each DMA request to start
1737
1738 0 - 0xffff
1739 (0 means 0x100000000)
1740
1741 Returns: None.
1742
1743 *---------------------------------------------------------------------------*/
MI_SetNDmaWordCount(u32 ndmaNo,u32 wordCount)1744 void MI_SetNDmaWordCount( u32 ndmaNo, u32 wordCount )
1745 {
1746 MIi_NDmaConfig[ndmaNo].wordCount = wordCount;
1747 }
1748
1749 /*---------------------------------------------------------------------------*
1750 Name: MI_GetNDmaWordCount
1751
1752 Description: Gets word count for each DMA request to start.
1753
1754 Arguments: ndmaNo
1755
1756 Returns: Value that is set.
1757
1758 0 - 0xffff
1759 (0 means 0x100000000)
1760
1761 *---------------------------------------------------------------------------*/
MI_GetNDmaWordCount(u32 ndmaNo)1762 u32 MI_GetNDmaWordCount( u32 ndmaNo )
1763 {
1764 return MIi_NDmaConfig[ndmaNo].wordCount;
1765 }
1766
1767 /*---------------------------------------------------------------------------*
1768 Name: MI_InitNDmaConfig
1769
1770 Description: Initializes NDMA config.
1771
1772 Arguments: None.
1773
1774 Returns: None.
1775 *---------------------------------------------------------------------------*/
MI_InitNDmaConfig(void)1776 void MI_InitNDmaConfig( void )
1777 {
1778 MINDmaConfig *p = &MIi_NDmaConfig[0];
1779
1780 int n;
1781 for( n=0; n<=MI_NDMA_MAX_NUM; n++ )
1782 {
1783 p->intervalTimer = 1;
1784 p->prescaler = MI_NDMA_INTERVAL_PS_1;
1785 p->blockWord = MI_NDMA_BWORD_16;
1786 p->wordCount = MI_NDMA_AT_A_TIME;
1787 p ++;
1788 }
1789 }
1790
1791 /*---------------------------------------------------------------------------*
1792 Name: MI_GetNDmaConfig
1793
1794 Description: Copies NDMA config data to local variable.
1795
1796 Arguments: ndmaNo: NDMA channel number
1797 config: Pointer to NDMA config struct
1798
1799 Returns: None.
1800 *---------------------------------------------------------------------------*/
MI_GetNDmaConfig(u32 ndmaNo,MINDmaConfig * config)1801 void MI_GetNDmaConfig( u32 ndmaNo, MINDmaConfig *config )
1802 {
1803 MIi_ASSERT_DMANO(ndmaNo);
1804 MI_CpuCopy32( &MIi_NDmaConfig[ndmaNo], config, sizeof(MINDmaConfig) );
1805 }
1806
1807 /*---------------------------------------------------------------------------*
1808 Name: MI_SetNDmaConfig
1809
1810 Description: Copies NDMA config data from local variable.
1811
1812 Arguments: ndmaNo: NDMA channel number
1813 config: Pointer to NDMA config struct
1814
1815 Returns: None.
1816 *---------------------------------------------------------------------------*/
MI_SetNDmaConfig(u32 ndmaNo,const MINDmaConfig * config)1817 void MI_SetNDmaConfig( u32 ndmaNo, const MINDmaConfig *config )
1818 {
1819 MIi_ASSERT_DMANO(ndmaNo);
1820 MI_CpuCopy32( config, &MIi_NDmaConfig[ndmaNo], sizeof(MINDmaConfig) );
1821 }
1822
1823
1824
1825 //================================================================================
1826 // Timer DMA
1827 //================================================================================
MI_TimerNDmaCopy(u32 ndmaNo,u32 timerNo,const void * src,void * dest,u32 size)1828 void MI_TimerNDmaCopy(u32 ndmaNo, u32 timerNo, const void *src, void *dest, u32 size)
1829 {
1830 MIi_ASSERT_DMANO( ndmaNo );
1831 MIi_ASSERT_TIMERNO( timerNo );
1832 {
1833 MINDmaDevice dev = MI_NDMA_TIMING_TIMER0 + timerNo;
1834 MI_NDmaCopy_Dev( ndmaNo, src, dest, size, dev );
1835 }
1836 }
1837
1838 #ifdef SDK_ARM9
1839 //================================================================================
1840 // H-Blank DMA
1841 //================================================================================
MI_HBlankNDmaCopy(u32 ndmaNo,const void * src,void * dest,u32 size)1842 void MI_HBlankNDmaCopy(u32 ndmaNo, const void *src, void *dest, u32 size)
1843 {
1844 MIi_ASSERT_DMANO( ndmaNo );
1845 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_HBLANK, ndmaNo, src, dest, 0/*Not used*/,
1846 size, &MIi_NDmaConfig[ndmaNo], MI_NDMA_TIMING_H_BLANK, MI_NDMA_ENABLE );
1847 }
MI_HBlankNDmaCopyIf(u32 ndmaNo,const void * src,void * dest,u32 size)1848 void MI_HBlankNDmaCopyIf(u32 ndmaNo, const void *src, void *dest, u32 size)
1849 {
1850 MIi_ASSERT_DMANO( ndmaNo );
1851 MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_HBLANK_IF, ndmaNo, src, dest, 0/*Not used*/,
1852 size, &MIi_NDmaConfig[ndmaNo], MI_NDMA_TIMING_H_BLANK, MI_NDMA_ENABLE );
1853 }
1854 #endif
1855
1856 //================================================================================
1857 // V-Blank DMA
1858 //================================================================================
MI_VBlankNDmaCopy(u32 ndmaNo,const void * src,void * dest,u32 size)1859 void MI_VBlankNDmaCopy(u32 ndmaNo, const void *src, void *dest, u32 size)
1860 {
1861 MIi_ASSERT_DMANO( ndmaNo );
1862 MI_NDmaCopy_Dev( ndmaNo, src, dest, size, MI_NDMA_TIMING_V_BLANK );
1863 }
1864
MI_VBlankNDmaCopyAsync(u32 ndmaNo,const void * src,void * dest,u32 size,MIDmaCallback callback,void * arg)1865 void MI_VBlankNDmaCopyAsync(u32 ndmaNo, const void *src, void *dest, u32 size,
1866 MIDmaCallback callback, void *arg)
1867 {
1868 MIi_ASSERT_DMANO( ndmaNo );
1869 MI_NDmaCopyAsync_Dev( ndmaNo, src, dest, size, callback, arg, MI_NDMA_TIMING_V_BLANK );
1870 }
1871
1872 //================================================================================
1873 // CARD DMA
1874 //================================================================================
1875
1876 /*---------------------------------------------------------------------------*
1877 Name: MIi_CardNDmaCopy32
1878
1879 Description: CARD DMA copy.
1880 32bit, sync version.
1881 (This sets only DMA-control. CARD register must be set after)
1882
1883 Arguments: dmaNo: DMA channel number
1884 src: Source address
1885 dest: Destination address
1886 size: Transfer size (bytes)
1887
1888 Returns: None.
1889 *---------------------------------------------------------------------------*/
MIi_CardNDmaRecv32(u32 ndmaNo,const void * src,void * dest)1890 static void MIi_CardNDmaRecv32(u32 ndmaNo, const void *src, void *dest)
1891 {
1892 MIi_ASSERT_DMANO(ndmaNo);
1893 {
1894 const MINDmaConfig *config = &MIi_NDmaConfig[ndmaNo];
1895 const u32 size = sizeof(u32);
1896 OSIntrMode enabled = OS_DisableInterrupts();
1897 u32 contData;
1898 MIi_Wait(ndmaNo);
1899 MIi_SetSrc(ndmaNo, (u32)src);
1900 MIi_SetDest(ndmaNo, (u32)dest);
1901 MIi_SetTotalWordCount(ndmaNo, size / sizeof(u32));
1902 MIi_SetWordCount(ndmaNo, size / sizeof(u32));
1903 contData = (config->blockWord | MI_NDMA_TIMING_CARD |
1904 MI_NDMA_SRC_FIX | MI_NDMA_DEST_INC | MI_NDMA_DEST_RELOAD_DISABLE |
1905 MI_NDMA_ENABLE | MI_NDMA_CONTINUOUS_ON);
1906 MIi_SetControl(ndmaNo, contData);
1907 // Here, all that has happened is automatic startup has turned ON.
1908 // It will start up for the first time when commands are configured in the CARD register.
1909 (void)OS_RestoreInterrupts(enabled);
1910 }
1911 }
1912
MI_Card_NDmaCopy(u32 ndmaNo,const void * src,void * dest,u32 size)1913 void MI_Card_NDmaCopy(u32 ndmaNo, const void *src, void *dest, u32 size)
1914 {
1915 (void)size;
1916 MIi_CardNDmaRecv32(ndmaNo, src, dest);
1917 }
1918
1919 //================================================================================
1920 // Main memory display DMA
1921 //================================================================================
1922 //void MI_DispMemDmaCopy(u32 ndmaNo, const void *src)
1923 //{
1924 // MIi_ASSERT_DMANO( ndmaNo );
1925 // MIi_NDma_withConfig_Dev(MIi_NDMA_TYPE_MMCOPY, ndmaNo, src, dest, 0/*not used*/,
1926 // size, &MIi_NDmaConfig[ndmaNo], MI_NDMA_TIMING_DISP, MI_NDMA_ENABLE );
1927 //}
1928
1929 //================================================================================
1930 // Work RAM
1931 //================================================================================
1932
1933 #ifdef SDK_ARM9
1934 //================================================================================
1935 // Camera
1936 //================================================================================
1937 #define CAMERA_DMA_BLOCK_SIZE MI_NDMA_BWORD_16
1938 #define CAMERA_DMA_INTERVAL 2
1939 #define CAMERA_DMA_PRESCALER MI_NDMA_INTERVAL_PS_1
1940
MI_Camera_NDmaRecv(u32 ndmaNo,void * dest,u32 unit,u32 size,BOOL contSw)1941 void MI_Camera_NDmaRecv(u32 ndmaNo, void *dest, u32 unit, u32 size, BOOL contSw )
1942 {
1943 MINDmaConfig config;
1944
1945 MIiNDmaType type = ( contSw )? MIi_NDMA_TYPE_CAMERACONT: MIi_NDMA_TYPE_RECV;
1946
1947 MIi_ASSERT_DMANO( ndmaNo );
1948
1949 MI_GetNDmaConfig( ndmaNo, &config );
1950 config.intervalTimer = CAMERA_DMA_INTERVAL;
1951 config.prescaler = CAMERA_DMA_PRESCALER;
1952 config.blockWord = CAMERA_DMA_BLOCK_SIZE;
1953 config.wordCount = unit;
1954
1955 MIi_NDma_withConfig_Dev(type, ndmaNo, (void*)REG_DAT_ADDR, dest, 0/*Not used*/,
1956 size, &config, MI_NDMA_TIMING_CAMERA, MI_NDMA_ENABLE );
1957 }
1958
MI_Camera_NDmaRecvEx(u32 ndmaNo,void * dest,u32 size,BOOL contSw,const MINDmaConfig * config)1959 void MI_Camera_NDmaRecvEx(u32 ndmaNo, void *dest, u32 size, BOOL contSw, const MINDmaConfig *config )
1960 {
1961 MIiNDmaType type = ( contSw )? MIi_NDMA_TYPE_CAMERACONT: MIi_NDMA_TYPE_RECV;
1962
1963 MIi_ASSERT_DMANO( ndmaNo );
1964
1965 MIi_NDma_withConfig_Dev(type, ndmaNo, (void*)REG_DAT_ADDR, dest, 0/*Not used*/,
1966 size, config, MI_NDMA_TIMING_CAMERA, MI_NDMA_ENABLE );
1967 }
1968
MI_Camera_NDmaRecvAsync(u32 ndmaNo,void * dest,u32 unit,u32 size,BOOL contSw,MINDmaCallback callback,void * arg)1969 void MI_Camera_NDmaRecvAsync(u32 ndmaNo, void *dest, u32 unit, u32 size, BOOL contSw, MINDmaCallback callback, void* arg )
1970 {
1971 MINDmaConfig config;
1972
1973 MIiNDmaType type = ( contSw )? MIi_NDMA_TYPE_CAMERACONT: MIi_NDMA_TYPE_RECV;
1974
1975 MIi_ASSERT_DMANO( ndmaNo );
1976
1977 MI_GetNDmaConfig( ndmaNo, &config );
1978 config.intervalTimer = CAMERA_DMA_INTERVAL;
1979 config.prescaler = CAMERA_DMA_PRESCALER;
1980 config.blockWord = CAMERA_DMA_BLOCK_SIZE;
1981 config.wordCount = unit;
1982
1983 MIi_NDmaAsync_withConfig_Dev(type, ndmaNo, (void*)REG_DAT_ADDR, dest, 0/*Not used*/,
1984 size, callback, arg, &config, MI_NDMA_TIMING_CAMERA, MI_NDMA_ENABLE );
1985 }
1986
MI_Camera_NDmaRecvAsyncEx(u32 ndmaNo,void * dest,u32 size,BOOL contSw,MINDmaCallback callback,void * arg,const MINDmaConfig * config)1987 void MI_Camera_NDmaRecvAsyncEx(u32 ndmaNo, void *dest, u32 size, BOOL contSw, MINDmaCallback callback, void* arg, const MINDmaConfig *config )
1988 {
1989 MIiNDmaType type = ( contSw )? MIi_NDMA_TYPE_CAMERACONT: MIi_NDMA_TYPE_RECV;
1990
1991 MIi_ASSERT_DMANO( ndmaNo );
1992
1993 MIi_NDmaAsync_withConfig_Dev(type, ndmaNo, (void*)REG_DAT_ADDR, dest, 0/*Not used*/,
1994 size, callback, arg, config, MI_NDMA_TIMING_CAMERA, MI_NDMA_ENABLE );
1995 }
1996 #endif
1997
1998 #ifndef SDK_ARM9
1999 //================================================================================
2000 // Aes
2001 //================================================================================
MIi_Aes_NDmaSend(u32 ndmaNo,const void * src,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * pConfig)2002 void MIi_Aes_NDmaSend(u32 ndmaNo, const void *src, u32 size,
2003 MINDmaCallback callback, void* arg, const MINDmaConfig* pConfig)
2004 {
2005 MIi_ASSERT_DMANO( ndmaNo );
2006
2007 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_SEND, ndmaNo, src, (void*)®_AES_AES_IFIFO, 0/*Not used*/,
2008 size, callback, arg, pConfig, MI_NDMA_TIMING_AES_IN, MI_NDMA_ENABLE );
2009 }
MIi_Aes_NDmaRecv(u32 ndmaNo,void * dest,u32 size,MINDmaCallback callback,void * arg,const MINDmaConfig * pConfig)2010 void MIi_Aes_NDmaRecv(u32 ndmaNo, void *dest, u32 size,
2011 MINDmaCallback callback, void* arg, const MINDmaConfig* pConfig)
2012 {
2013 MIi_ASSERT_DMANO( ndmaNo );
2014
2015 MIi_NDmaAsync_withConfig_Dev(MIi_NDMA_TYPE_RECV, ndmaNo, (const void*)®_AES_AES_OFIFO, dest, 0/*Not used*/,
2016 size, callback, arg, pConfig, MI_NDMA_TIMING_AES_OUT, MI_NDMA_ENABLE );
2017 }
2018 #endif
2019
2020 //================================================================================
2021 // Setting each register directly (internal)
2022 //================================================================================
MIi_SetNDmaSrc(u32 ndmaNo,void * src)2023 void MIi_SetNDmaSrc( u32 ndmaNo, void *src )
2024 {
2025 MIi_SetSrc( ndmaNo, (u32)src );
2026 }
MIi_SetNDmaDest(u32 ndmaNo,void * dest)2027 void MIi_SetNDmaDest( u32 ndmaNo, void *dest )
2028 {
2029 MIi_SetDest( ndmaNo, (u32)dest );
2030 }
MIi_SetNDmaTotalWordCount(u32 ndmaNo,u32 size)2031 void MIi_SetNDmaTotalWordCount( u32 ndmaNo, u32 size )
2032 {
2033 MIi_SetTotalWordCount( ndmaNo, size );
2034 }
MIi_SetNDmaWordCount(u32 ndmaNo,u32 size)2035 void MIi_SetNDmaWordCount( u32 ndmaNo, u32 size )
2036 {
2037 MIi_SetWordCount( ndmaNo, size );
2038 }
MIi_SetNDmaInterval(u32 ndmaNo,u32 intervalTimer,u32 prescaler)2039 void MIi_SetNDmaInterval( u32 ndmaNo, u32 intervalTimer, u32 prescaler )
2040 {
2041 MIi_SetInterval( ndmaNo, intervalTimer, prescaler );
2042 }
2043
2044 #ifdef SDK_ARM7
2045 #include <twl/ltdwram_end.h>
2046 #endif
2047
2048 #ifdef SDK_ARM9
2049 #include <twl/ltdmain_end.h>
2050 #endif
2051