1 /*---------------------------------------------------------------------------*
2 Project: TwlSDK - MI - include
3 File: sharedWram.h
4
5 Copyright 2007-2008 Nintendo. All rights reserved.
6
7 These coded instructions, statements, and computer programs contain
8 proprietary information of Nintendo of America Inc. and/or Nintendo
9 Company Ltd., and are protected by Federal copyright law. They may
10 not be disclosed to third parties or copied or duplicated in any form,
11 in whole or in part, without the prior written consent of Nintendo.
12
13 $Date:: 2008-11-19#$
14 $Rev: 9345 $
15 $Author: okubata_ryoma $
16 *---------------------------------------------------------------------------*/
17 #ifndef TWL_MI_SHAREDWRAM_H_
18 #define TWL_MI_SHAREDWRAM_H_
19
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23
24 //================================================================
25 // defines about register SCFG_MBKs
26 //================================================================
27 typedef enum
28 {
29 MI_WRAM_A = 0,
30 MI_WRAM_B = 1,
31 MI_WRAM_C = 2
32 } MIWramPos;
33
34
35 #define MI_WRAM_A_MAX_NUM 4
36 #define MI_WRAM_B_MAX_NUM 8
37 #define MI_WRAM_C_MAX_NUM 8
38
39 #define MI_WRAM_A_SIZE HW_WRAM_A_SIZE
40 #define MI_WRAM_B_SIZE HW_WRAM_B_SIZE
41 #define MI_WRAM_C_SIZE HW_WRAM_C_SIZE
42
43 #ifdef SDK_TWLHYB
44 #define MI_WRAM_ADDRESS_A0 0x03000000
45 #else
46 #define MI_WRAM_ADDRESS_A0 0x037c0000
47 #endif
48 #define MI_WRAM_ADDRESS_B0 HW_WRAM_B
49 #define MI_WRAM_ADDRESS_C0 HW_WRAM_C
50
51 #define MI_WRAM_A_SLOT_SIZE 0x10000
52 #define MI_WRAM_B_SLOT_SIZE 0x8000
53 #define MI_WRAM_C_SLOT_SIZE 0x8000
54
55 //---- master proc
56 typedef enum
57 {
58 MI_WRAM_ARM9 = 0,
59 MI_WRAM_ARM7 = 1,
60 MI_WRAM_DSP = 2, // only for WRAM_B and WRAM_C
61
62 MI_WRAM_FREE = 3
63 } MIWramProc;
64
65
66 #define MI_WRAM_MASTER_MASK_A REG_MI_MBK_A0_M_MASK
67 #define MI_WRAM_MASTER_MASK_B REG_MI_MBK_B0_M_MASK
68 #define MI_WRAM_MASTER_MASK_C REG_MI_MBK_C0_M_MASK
69
70 //---- start offset
71 typedef enum
72 {
73 MI_WRAM_OFFSET_0KB = 0,
74 MI_WRAM_OFFSET_32KB = 1,
75 MI_WRAM_OFFSET_64KB = 2,
76 MI_WRAM_OFFSET_96KB = 3,
77 MI_WRAM_OFFSET_128KB = 4,
78 MI_WRAM_OFFSET_160KB = 5,
79 MI_WRAM_OFFSET_192KB = 6,
80 MI_WRAM_OFFSET_224KB = 7
81 } MIWramOffset;
82
83 #define MI_WRAM_OFFSET_MASK_A REG_MI_MBK_A0_OF_MASK
84 #define MI_WRAM_OFFSET_MASK_B REG_MI_MBK_B0_OF_MASK
85 #define MI_WRAM_OFFSET_MASK_C REG_MI_MBK_C0_OF_MASK
86 #define MI_WRAM_OFFSET_SHIFT_A REG_MI_MBK_A0_OF_SHIFT
87 #define MI_WRAM_OFFSET_SHIFT_B REG_MI_MBK_B0_OF_SHIFT
88 #define MI_WRAM_OFFSET_SHIFT_C REG_MI_MBK_C0_OF_SHIFT
89
90 //---- enable/disable
91 typedef enum
92 {
93 MI_WRAM_ENABLE = TRUE,
94 MI_WRAM_DISABLE = FALSE
95 } MIWramEnable;
96
97 #define MI_WRAM_ENABLE_MASK_A REG_MI_MBK_A0_E_MASK
98 #define MI_WRAM_ENABLE_MASK_B REG_MI_MBK_B0_E_MASK
99 #define MI_WRAM_ENABLE_MASK_C REG_MI_MBK_C0_E_MASK
100
101 //---- image type
102 typedef enum
103 {
104 MI_WRAM_IMAGE_32KB = 0, // only for WRAM_B and WRAM_C
105 MI_WRAM_IMAGE_64KB = 1,
106 MI_WRAM_IMAGE_128KB = 2,
107 MI_WRAM_IMAGE_256KB = 3
108 } MIWramImage;
109
110
111 //---- size
112 typedef enum
113 {
114 MI_WRAM_SIZE_0KB = 0,
115 MI_WRAM_SIZE_32KB = 1,
116 MI_WRAM_SIZE_64KB = 2,
117 MI_WRAM_SIZE_96KB = 3,
118 MI_WRAM_SIZE_128KB = 4,
119 MI_WRAM_SIZE_160KB = 5,
120 MI_WRAM_SIZE_192KB = 6,
121 MI_WRAM_SIZE_224KB = 7,
122 MI_WRAM_SIZE_256KB = 8
123 } MIWramSize;
124
125 // Convert between size and enum number.
126 // Notice: Size does not contain KB.
127 // i.e. To get enum of 64KB, do MI_WRAM_SIZE_TO_ENUM(64), not (64KB) or (65536).
128 // i.e. The value of MI_WRAM_ENUM_TO_SIZE(MI_WRAM_SIZE_64KB) is 64, not 65536(64KB).
129 #define MI_WRAM_SIZE_TO_ENUM(size) ((MIWramSize)((int)(size)>>5))
130 #define MI_WRAM_ENUM_TO_SIZE(n) ((int)((n)<<5))
131
132 #define MI_WRAM_ERROR_LOCKED -1
133
134 //================================================================================
135 //
136 //================================================================================
137 #ifdef SDK_ARM9
138 /*---------------------------------------------------------------------------*
139 Name: MIi_SetWramBank_A / MIi_SetWramBank_B / MIi_SetWramBank_C
140
141 Description: set up shared WRAM bank
142
143 Arguments: num : slot num
144 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
145 proc : master select
146 MI_WRAM_ARM9 : ARM9
147 MI_WRAM_ARM7 : ARM7
148 MI_WRAM_DSP : DSP (only for WRAM_B and WRAM_C)
149 offset : offset of WRAM allocation
150 (for WRAM_A)
151 MI_WRAM_OFFSET_0KB : 0KB from top
152 MI_WRAM_OFFSET_64KB : 64KB from top
153 MI_WRAM_OFFSET_128KB : 128KB from top
154 MI_WRAM_OFFSET_192KB : 192KB from top
155
156 (for WRAM_B and WRAM_C)
157 MI_WRAM_OFFSET_0KB : 0KB from top
158 MI_WRAM_OFFSET_32KB : 32KB from top
159 MI_WRAM_OFFSET_64KB : 64KB from top
160 MI_WRAM_OFFSET_96KB : 96KB from top
161 MI_WRAM_OFFSET_128KB : 128KB from top
162 MI_WRAM_OFFSET_160KB : 160KB from top
163 MI_WRAM_OFFSET_192KB : 192KB from top
164 MI_WRAM_OFFSET_224KB : 224KB from top
165
166 enable : enable flag
167 MI_WRAM_ENABLE : enable
168 MI_WRAM_DISABLE : disable
169
170 Returns: None
171 *---------------------------------------------------------------------------*/
172 void MIi_SetWramBank_A( int num, MIWramProc proc, MIWramOffset offset, MIWramEnable enable );
173 void MIi_SetWramBank_B( int num, MIWramProc proc, MIWramOffset offset, MIWramEnable enable );
174 void MIi_SetWramBank_C( int num, MIWramProc proc, MIWramOffset offset, MIWramEnable enable );
175 void MIi_SetWramBank( MIWramPos wram, int num, MIWramProc proc, MIWramOffset offset, MIWramEnable enable );
176 //---- for convenience
177 void MIi_SetWramBankMaster_A( int num, MIWramProc proc );
178 void MIi_SetWramBankMaster_B( int num, MIWramProc proc );
179 void MIi_SetWramBankMaster_C( int num, MIWramProc proc );
180 void MIi_SetWramBankMaster( MIWramPos wram, int num, MIWramProc proc );
181 //- - - - - - - - -
182 void MIi_SetWramBankEnable_A( int num, MIWramEnable enable );
183 void MIi_SetWramBankEnable_B( int num, MIWramEnable enable );
184 void MIi_SetWramBankEnable_C( int num, MIWramEnable enable );
185 void MIi_SetWramBankEnable( MIWramPos wram, int num, MIWramEnable enable );
186 #endif
187
188 /*---------------------------------------------------------------------------*
189 Name: MIi_GetWramBank_A / MIi_SetWramBank_B / MIi_SetWramBank_C
190
191 Description: get WRAM bank setting
192
193 Arguments: num ; slot num
194
195 Returns: value of setting
196 *---------------------------------------------------------------------------*/
197 vu8 MIi_GetWramBank_A( int num );
198 vu8 MIi_GetWramBank_B( int num );
199 vu8 MIi_GetWramBank_C( int num );
200 vu8 MIi_GetWramBank( MIWramPos wram, int num );
201
202 /*---------------------------------------------------------------------------*
203 Name: MI_GetWramBankMaster_A / MI_GetWramBankMaster_B / MI_GetWramBankMaster_C
204
205 Description: get master which is set to shared WRAM bank
206
207 Arguments: num ; slot num
208 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
209
210 Returns: master select
211 MI_WRAM_ARM9 : ARM9
212 MI_WRAM_ARM7 : ARM7
213 MI_WRAM_DSP : DSP (only for WRAM_B and WRAM_C)
214 *---------------------------------------------------------------------------*/
215 MIWramProc MI_GetWramBankMaster_A( int num );
216 MIWramProc MI_GetWramBankMaster_B( int num );
217 MIWramProc MI_GetWramBankMaster_C( int num );
218 MIWramProc MI_GetWramBankMaster( MIWramPos wram, int num );
219
220 /*---------------------------------------------------------------------------*
221 Name: MI_GetWramBankOffset_A / MI_GetWramBankOffset_B / MI_GetWramBankOffset_C
222
223 Description: get offset which is set to shared WRAM bank
224
225 Arguments: num ; slot num
226 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
227
228 Returns: offset : offset of WRAM allocation
229 (for WRAM_A)
230 MI_WRAM_OFFSET_0KB : 0KB from top
231 MI_WRAM_OFFSET_64KB : 64KB from top
232 MI_WRAM_OFFSET_128KB : 128KB from top
233 MI_WRAM_OFFSET_192KB : 192KB from top
234
235 (for WRAM_B and WRAM_C)
236 MI_WRAM_OFFSET_0KB : 0KB from top
237 MI_WRAM_OFFSET_32KB : 32KB from top
238 MI_WRAM_OFFSET_64KB : 64KB from top
239 MI_WRAM_OFFSET_96KB : 96KB from top
240 MI_WRAM_OFFSET_128KB : 128KB from top
241 MI_WRAM_OFFSET_160KB : 160KB from top
242 MI_WRAM_OFFSET_192KB : 192KB from top
243 MI_WRAM_OFFSET_224KB : 224KB from top
244
245 *---------------------------------------------------------------------------*/
246 MIWramOffset MI_GetWramBankOffset_A( int num );
247 MIWramOffset MI_GetWramBankOffset_B( int num );
248 MIWramOffset MI_GetWramBankOffset_C( int num );
249 MIWramOffset MI_GetWramBankOffset( MIWramPos wram, int num );
250
251 /*---------------------------------------------------------------------------*
252 Name: MI_GetWramBankEnable_A / MI_GetWramBankEnable_B /MI_GetWramBankEnable_C
253
254 Description: get enable/disable which is set to shared WRAM bank
255
256 Arguments: num ; slot num
257 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
258
259 Returns: enable flag
260 MI_WRAM_ENABLE : enable
261 MI_WRAM_DISABLE : disable
262
263 *---------------------------------------------------------------------------*/
264 MIWramEnable MI_GetWramBankEnable_A( int num );
265 MIWramEnable MI_GetWramBankEnable_B( int num );
266 MIWramEnable MI_GetWramBankEnable_C( int num );
267 MIWramEnable MI_GetWramBankEnable( MIWramPos wram, int num );
268
269 //================================================================================
270 // low level functions of wram maps
271 //================================================================================
272 /*---------------------------------------------------------------------------*
273 Name: MIi_SetWramMap_A / MIi_SetWramMap_B / MIi_SetWramMap_C
274
275 Description: set WRAM map
276
277 Arguments: start : start address
278 (for WRAM_A)
279 0x03000000 - 0x03FF0000 (64KB step)
280 (for WRAM_B and WRAM_C)
281 0x03000000 - 0x03FF0000 (32KB step)
282
283 end : end address
284 (for WRAM_A)
285 0x02FFFFFF - 0x03FFFFFF (64KB step)
286 (for WRAM_B and WRAM_C)
287 0x02FFFFFF - 0x03FFFFFF (32KB step)
288
289 image : MI_WRAM_IMAGE_32KB (only for WRAM_B and WRAM_C)
290 MI_WRAM_IMAGE_64KB
291 MI_WRAM_IMAGE_128KB
292 MI_WRAM_IMAGE_256KB
293
294 Returns: None
295 *---------------------------------------------------------------------------*/
296 void MIi_SetWramMap_A( u32 start, u32 end, MIWramImage image );
297 void MIi_SetWramMap_B( u32 start, u32 end, MIWramImage image );
298 void MIi_SetWramMap_C( u32 start, u32 end, MIWramImage image );
299
300 /*---------------------------------------------------------------------------*
301 Name: MI_GetWramMapStart_A / MI_GetWramMapStart_B / MI_GetWramMapStart_C
302
303 Description: get start address of shared WRAM
304
305 Arguments: None
306
307 Return: start : start address
308 (for WRAM_A)
309 0x03000000 - 0x03FF0000 (64KB step)
310 (for WRAM_B and WRAM_C)
311 0x03000000 - 0x03FF0000 (32KB step)
312 *---------------------------------------------------------------------------*/
313 u32 MI_GetWramMapStart_A(void);
314 u32 MI_GetWramMapStart_B(void);
315 u32 MI_GetWramMapStart_C(void);
316 u32 MI_GetWramMapStart( MIWramPos wram );
317
318 /*---------------------------------------------------------------------------*
319 Name: MI_GetWramMapEnd_A / MI_GetWramMapEnd_B / MI_GetWramMapEnd_C
320
321 Description: get end address of shared WRAM
322
323 Arguments: None
324
325 Returns: end : end address
326 (for WRAM_A)
327 0x02FFFFFF - 0x03FFFFFF (64KB step)
328 (for WRAM_B and WRAM_C)
329 0x02FFFFFF - 0x03FF0000 (32KB step)
330 *---------------------------------------------------------------------------*/
331 u32 MI_GetWramMapEnd_A(void);
332 u32 MI_GetWramMapEnd_B(void);
333 u32 MI_GetWramMapEnd_C(void);
334 u32 MI_GetWramMapEnd( MIWramPos wram );
335
336 /*---------------------------------------------------------------------------*
337 Name: MI_GetWramMapImage_A / MI_GetWramMapImage_B / MI_GetWramMapImage_C
338
339 Description: get image setting of shared WRAM
340
341 Arguments: None
342
343 Returns: image : MI_WRAM_IMAGE_32KB (only for WRAM_B and WRAM_C)
344 MI_WRAM_IMAGE_64KB
345 MI_WRAM_IMAGE_128KB
346 MI_WRAM_IMAGE_256KB
347 *---------------------------------------------------------------------------*/
348 MIWramImage MI_GetWramMapImage_A(void);
349 MIWramImage MI_GetWramMapImage_B(void);
350 MIWramImage MI_GetWramMapImage_C(void);
351 MIWramImage MI_GetWramMapImage( MIWramPos wram );
352
353 /*---------------------------------------------------------------------------*
354 Name: MI_IsWramSlotLocked_A / MI_IsWramSlotLocked_B / MI_IsWramSlotLocked_C
355
356 Description: check if WRAM slot locked
357
358 Arguments: num : slot num
359 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
360
361 Returns: TRUE : locked
362 FALSE : not locked
363 *---------------------------------------------------------------------------*/
364 BOOL MI_IsWramSlotLocked_A( int num );
365 BOOL MI_IsWramSlotLocked_B( int num );
366 BOOL MI_IsWramSlotLocked_C( int num );
367 BOOL MI_IsWramSlotLocked( MIWramPos wram, int num );
368
369 /*---------------------------------------------------------------------------*
370 Name: MIi_AddressToWramSlot
371
372 Description: convert address to slot number of WRAM-B/C
373
374 Arguments: address : address of WRAM-B/C
375 type : destination to store WRAM type
376
377 Returns: slot number of WRAM-B/C if specified address is valid
378 -1 means failure
379 *---------------------------------------------------------------------------*/
MIi_AddressToWramSlot(const void * address,MIWramPos * type)380 SDK_INLINE int MIi_AddressToWramSlot(const void *address, MIWramPos *type)
381 {
382 int retval = -1;
383 static const u32 wramBCtop = HW_WRAM_C;
384 static const u32 wramBCbototm = HW_WRAM_B_END;
385 SDK_COMPILER_ASSERT(HW_WRAM_C < HW_WRAM_B);
386 SDK_COMPILER_ASSERT(wramBCbototm - wramBCtop == HW_WRAM_B_SIZE + HW_WRAM_C_SIZE);
387 u32 slot = (u32)(((u32)address - wramBCtop) / MI_WRAM_B_SLOT_SIZE);
388 if (slot < MI_WRAM_C_MAX_NUM)
389 {
390 if (type)
391 {
392 *type = MI_WRAM_C;
393 }
394 retval = (int)slot;
395 }
396 else if (slot < MI_WRAM_B_MAX_NUM + MI_WRAM_C_MAX_NUM)
397 {
398 if (type)
399 {
400 *type = MI_WRAM_B;
401 }
402 retval = (int)(slot - MI_WRAM_C_MAX_NUM);
403 }
404 return retval;
405 }
406
407 //================================================================================
408 // WRAM manager
409 //================================================================================
410 /*---------------------------------------------------------------------------*
411 Name: MI_InitWramManager
412
413 Description: initialize the WRAM manager on ARM9
414
415 Arguments: None
416
417 Returns: None
418 *---------------------------------------------------------------------------*/
419 void MI_InitWramManager(void);
420
421 /*---------------------------------------------------------------------------*
422 Name: MI_AllocWram
423
424 Description: allocate WRAM slot
425
426 Arguments: wram : wram position
427 MI_WRAM_A : WRAM A
428 MI_WRAM_B : WRAM B
429 MI_WRAM_C : WRAM C
430 size : size to allocate
431 (for WRAM_A)
432 MI_WRAM_SIZE_0KB : 0KB
433 MI_WRAM_SIZE_64KB : 64KB
434 MI_WRAM_SIZE_128KB : 128KB
435 MI_WRAM_SIZE_192KB : 192KB
436 MI_WRAM_SIZE_256KB : 256KB
437
438 (for WRAM_B and WRAM_C)
439 MI_WRAM_SIZE_0KB : 0KB
440 MI_WRAM_SIZE_32KB : 16KB
441 MI_WRAM_SIZE_64KB : 32KB
442 MI_WRAM_SIZE_96KB : 64KB
443 MI_WRAM_SIZE_128KB : 128KB
444 MI_WRAM_SIZE_160KB : 160KB
445 MI_WRAM_SIZE_192KB : 192KB
446 MI_WRAM_SIZE_224KB : 224KB
447 MI_WRAM_SIZE_256KB : 256KB
448 proc : processor
449 MI_WRAM_ARM9 : ARM9
450 MI_WRAM_ARM7 : ARM7
451 MI_WRAM_DSP : DSP
452
453 Returns: top address of allocated WRAM
454 0 means failure
455 *---------------------------------------------------------------------------*/
456 u32 MI_AllocWram( MIWramPos wram, MIWramSize size, MIWramProc proc );
457 #define MI_AllocWram_A(size, proc) MI_AllocWram( MI_WRAM_A, size, proc )
458 #define MI_AllocWram_B(size, proc) MI_AllocWram( MI_WRAM_B, size, proc )
459 #define MI_AllocWram_C(size, proc) MI_AllocWram( MI_WRAM_C, size, proc )
460
461 /*---------------------------------------------------------------------------*
462 Name: MI_AllocWramSlot
463
464 Description: allocate specified WRAM slot
465
466 Arguments: wram : wram position
467 MI_WRAM_A : WRAM A
468 MI_WRAM_B : WRAM B
469 MI_WRAM_C : WRAM C
470 slot : wram slot
471 proc : processor
472 MI_WRAM_ARM9 : ARM9
473 MI_WRAM_ARM7 : ARM7
474 MI_WRAM_DSP : DSP
475
476 Returns: top address of allocated WRAM
477 0 means failure
478 *---------------------------------------------------------------------------*/
479 u32 MI_AllocWramSlot( MIWramPos wram, int slot, MIWramSize size, MIWramProc proc );
480 #define MI_AllocWramSlot_A(slot, size, proc) MI_AllocWramSlot( MI_WRAM_A, slot, size, proc )
481 #define MI_AllocWramSlot_B(slot, size, proc) MI_AllocWramSlot( MI_WRAM_B, slot, size, proc )
482 #define MI_AllocWramSlot_C(slot, size, proc) MI_AllocWramSlot( MI_WRAM_C, slot, size, proc )
483
484 /*---------------------------------------------------------------------------*
485 Name: MI_FreeWram
486
487 Description: release WRAM
488
489 Arguments: wram : wram position
490 MI_WRAM_A : WRAM A
491 MI_WRAM_B : WRAM B
492 MI_WRAM_C : WRAM C
493
494 proc : processor
495 MI_WRAM_ARM9 : ARM9
496 MI_WRAM_ARM7 : ARM7
497 MI_WRAM_DSP : DSP
498
499 Returns: number of blocks set to be free.
500 -1 means failure
501 *---------------------------------------------------------------------------*/
502 int MI_FreeWram( MIWramPos wram, MIWramProc proc );
503 #define MI_FreeWram_A(proc) MI_FreeWram( MI_WRAM_A, proc )
504 #define MI_FreeWram_B(proc) MI_FreeWram( MI_WRAM_B, proc )
505 #define MI_FreeWram_C(proc) MI_FreeWram( MI_WRAM_C, proc )
506
507 /*---------------------------------------------------------------------------*
508 Name: MI_FreeWramSlot
509
510 Description: release WRAM
511
512 Arguments: wram : wram position
513 MI_WRAM_A : WRAM A
514 MI_WRAM_B : WRAM B
515 MI_WRAM_C : WRAM C
516 slot : slot number
517 (for WRAM_A)
518 0-3
519 (for WRAM_B and WRAM_C)
520 0-7
521 size :
522 (for WRAM_A)
523 MI_WRAM_SIZE_0KB : 0KB
524 MI_WRAM_SIZE_64KB : 64KB
525 MI_WRAM_SIZE_128KB : 128KB
526 MI_WRAM_SIZE_192KB : 192KB
527 MI_WRAM_SIZE_256KB : 256KB
528
529 (for WRAM_B and WRAM_C)
530 MI_WRAM_SIZE_0KB : 0KB
531 MI_WRAM_SIZE_32KB : 16KB
532 MI_WRAM_SIZE_64KB : 32KB
533 MI_WRAM_SIZE_96KB : 64KB
534 MI_WRAM_SIZE_128KB : 128KB
535 MI_WRAM_SIZE_160KB : 160KB
536 MI_WRAM_SIZE_192KB : 192KB
537 MI_WRAM_SIZE_224KB : 224KB
538 MI_WRAM_SIZE_256KB : 256KB
539
540 proc : processor
541 MI_WRAM_ARM9 : ARM9
542 MI_WRAM_ARM7 : ARM7
543 MI_WRAM_DSP : DSP
544
545 Returns: number of blocks set to be free.
546 -1 means failure
547 *---------------------------------------------------------------------------*/
548 int MI_FreeWramSlot( MIWramPos wram, int slot, MIWramSize size, MIWramProc proc );
549 #define MI_FreeWramSlot_A(slot, size, proc) MI_FreeWramSlot( MI_WRAM_A, slot, size, proc )
550 #define MI_FreeWramSlot_B(slot, size, proc) MI_FreeWramSlot( MI_WRAM_B, slot, size, proc )
551 #define MI_FreeWramSlot_C(slot, size, proc) MI_FreeWramSlot( MI_WRAM_C, slot, size, proc )
552
553 /*---------------------------------------------------------------------------*
554 Name: MI_SwitchWram
555
556 Description: switch WRAM master
557
558 Arguments: wram : wram position
559 MI_WRAM_A : WRAM A
560 MI_WRAM_B : WRAM B
561 MI_WRAM_C : WRAM C
562
563 proc : processor
564 MI_WRAM_ARM9 : ARM9
565 MI_WRAM_ARM7 : ARM7
566 MI_WRAM_DSP : DSP
567
568 newProc : processor
569 MI_WRAM_ARM9 : ARM9
570 MI_WRAM_ARM7 : ARM7
571 MI_WRAM_DSP : DSP
572
573 Returns: number of changed slots
574 -1 means failure
575 *---------------------------------------------------------------------------*/
576 int MI_SwitchWram( MIWramPos wram, MIWramProc proc, MIWramProc newProc );
577 #define MI_SwitchWram_A(proc, newProc) MI_SwitchWram( MI_WRAM_A, proc, newProc )
578 #define MI_SwitchWram_B(proc, newProc) MI_SwitchWram( MI_WRAM_B, proc, newProc )
579 #define MI_SwitchWram_C(proc, newProc) MI_SwitchWram( MI_WRAM_C, proc, newProc )
580
581 /*---------------------------------------------------------------------------*
582 Name: MI_SwitchWramSlot
583
584 Description: switch WRAM master
585
586 Arguments: wram : wram position
587 MI_WRAM_A : WRAM A
588 MI_WRAM_B : WRAM B
589 MI_WRAM_C : WRAM C
590
591 slot : slot number
592 (for WRAM_A)
593 0-3
594 (for WRAM_B and WRAM_C)
595 0-7
596 size :
597 (for WRAM_A)
598 MI_WRAM_SIZE_0KB : 0KB
599 MI_WRAM_SIZE_64KB : 64KB
600 MI_WRAM_SIZE_128KB : 128KB
601 MI_WRAM_SIZE_192KB : 192KB
602 MI_WRAM_SIZE_256KB : 256KB
603
604 (for WRAM_B and WRAM_C)
605 MI_WRAM_SIZE_0KB : 0KB
606 MI_WRAM_SIZE_32KB : 16KB
607 MI_WRAM_SIZE_64KB : 32KB
608 MI_WRAM_SIZE_96KB : 64KB
609 MI_WRAM_SIZE_128KB : 128KB
610 MI_WRAM_SIZE_160KB : 160KB
611 MI_WRAM_SIZE_192KB : 192KB
612 MI_WRAM_SIZE_224KB : 224KB
613 MI_WRAM_SIZE_256KB : 256KB
614
615 proc : processor
616 MI_WRAM_ARM9 : ARM9
617 MI_WRAM_ARM7 : ARM7
618 MI_WRAM_DSP : DSP
619
620 newProc : processor
621 MI_WRAM_ARM9 : ARM9
622 MI_WRAM_ARM7 : ARM7
623 MI_WRAM_DSP : DSP
624
625 Returns: number of changed slots
626 -1 means failure
627 *---------------------------------------------------------------------------*/
628 int MI_SwitchWramSlot( MIWramPos wram, int slot, MIWramSize size, MIWramProc proc, MIWramProc newProc );
629 #define MI_SwitchWramSlot_A(slot, size, proc, newProc) MI_SwitchWramSlot(MI_WRAM_A, slot, size, proc, newProc)
630 #define MI_SwitchWramSlot_B(slot, size, proc, newProc) MI_SwitchWramSlot(MI_WRAM_B, slot, size, proc, newProc)
631 #define MI_SwitchWramSlot_C(slot, size, proc, newProc) MI_SwitchWramSlot(MI_WRAM_C, slot, size, proc, newProc)
632
633 /*---------------------------------------------------------------------------*
634 Name: MI_ReserveWram
635
636 Description: reserve WRAM
637
638 Arguments: wram : wram position
639 MI_WRAM_A : WRAM A
640 MI_WRAM_B : WRAM B
641 MI_WRAM_C : WRAM C
642 size : size to reserve
643 MI_WRAM_SIZE_0KB : 0KB
644 MI_WRAM_SIZE_32KB : 16KB
645 MI_WRAM_SIZE_64KB : 32KB
646 MI_WRAM_SIZE_96KB : 64KB
647 MI_WRAM_SIZE_128KB : 128KB
648 MI_WRAM_SIZE_160KB : 160KB
649 MI_WRAM_SIZE_192KB : 192KB
650 MI_WRAM_SIZE_224KB : 224KB
651 MI_WRAM_SIZE_256KB : 256KB
652 proc : processor
653 MI_WRAM_ARM9 : ARM9
654 MI_WRAM_ARM7 : ARM7
655 MI_WRAM_DSP : DSP
656
657 Returns: top address of reserved WRAM
658 0 means failure
659 *---------------------------------------------------------------------------*/
660 u32 MI_ReserveWram( MIWramPos wram, MIWramSize size, MIWramProc proc );
661 #define MI_ReserveWram_A(size, proc) MI_ReserveWram( MI_WRAM_A, size, proc )
662 #define MI_ReserveWram_B(size, proc) MI_ReserveWram( MI_WRAM_B, size, proc )
663 #define MI_ReserveWram_C(size, proc) MI_ReserveWram( MI_WRAM_C, size, proc )
664
665 /*---------------------------------------------------------------------------*
666 Name: MI_ReserveWramSlot
667
668 Description: reserve specified WRAM slot
669
670 Arguments: wram : wram position
671 MI_WRAM_A : WRAM A
672 MI_WRAM_B : WRAM B
673 MI_WRAM_C : WRAM C
674 slot : wram slot
675 size : size to reserve
676 MI_WRAM_SIZE_0KB : 0KB
677 MI_WRAM_SIZE_32KB : 16KB
678 MI_WRAM_SIZE_64KB : 32KB
679 MI_WRAM_SIZE_96KB : 64KB
680 MI_WRAM_SIZE_128KB : 128KB
681 MI_WRAM_SIZE_160KB : 160KB
682 MI_WRAM_SIZE_192KB : 192KB
683 MI_WRAM_SIZE_224KB : 224KB
684 MI_WRAM_SIZE_256KB : 256KB
685 proc : processor
686 MI_WRAM_ARM9 : ARM9
687 MI_WRAM_ARM7 : ARM7
688 MI_WRAM_DSP : DSP
689
690 Returns: top address of reserved WRAM
691 0 means failure
692 *---------------------------------------------------------------------------*/
693 u32 MI_ReserveWramSlot( MIWramPos wram, int slot, MIWramSize size, MIWramProc proc );
694 #define MI_ReserveWramSlot_A(slot, size, proc) MI_ReserveWramSlot( MI_WRAM_A, slot, size, proc )
695 #define MI_ReserveWramSlot_B(slot, size, proc) MI_ReserveWramSlot( MI_WRAM_B, slot, size, proc )
696 #define MI_ReserveWramSlot_C(slot, size, proc) MI_ReserveWramSlot( MI_WRAM_C, slot, size, proc )
697
698 /*---------------------------------------------------------------------------*
699 Name: MI_CancelWram
700
701 Description: cancel reserved WRAM
702
703 Arguments: wram : wram position
704 MI_WRAM_A : WRAM A
705 MI_WRAM_B : WRAM B
706 MI_WRAM_C : WRAM C
707 proc : processor
708 MI_WRAM_ARM9 : ARM9
709 MI_WRAM_ARM7 : ARM7
710 MI_WRAM_DSP : DSP
711
712 Returns: nunmber of canceled blocks
713 -1 means failure
714 *---------------------------------------------------------------------------*/
715 int MI_CancelWram( MIWramPos wram, MIWramProc proc );
716 #define MI_CancelWram_A(proc) MI_CancelWram( MI_WRAM_A, proc )
717 #define MI_CancelWram_B(proc) MI_CancelWram( MI_WRAM_B, proc )
718 #define MI_CancelWram_C(proc) MI_CancelWram( MI_WRAM_C, proc )
719
720 /*---------------------------------------------------------------------------*
721 Name: MI_CancelWramSlot
722
723 Description: cancel reserved WRAM
724
725 Arguments: wram : wram position
726 MI_WRAM_A : WRAM A
727 MI_WRAM_B : WRAM B
728 MI_WRAM_C : WRAM C
729 slot :
730 size :
731 proc : processor
732 MI_WRAM_ARM9 : ARM9
733 MI_WRAM_ARM7 : ARM7
734 MI_WRAM_DSP : DSP
735
736 Returns: nunmber of canceled blocks
737 -1 means failure
738 *---------------------------------------------------------------------------*/
739 int MI_CancelWramSlot( MIWramPos wram, int slot, MIWramSize size, MIWramProc proc );
740 #define MI_CancelWramSlot_A(slot, size, proc) MI_CancelWramSlot( MI_WRAM_A, slot, size, proc )
741 #define MI_CancelWramSlot_B(slot, size, proc) MI_CancelWramSlot( MI_WRAM_B, slot, size, proc )
742 #define MI_CancelWramSlot_C(slot, size, proc) MI_CancelWramSlot( MI_WRAM_C, slot, size, proc )
743
744 /*---------------------------------------------------------------------------*
745 Name: MI_LockWramSlot
746
747 Description: lock WRAM slot
748
749 Arguments: wram : wram position
750 MI_WRAM_A : WRAM A
751 MI_WRAM_B : WRAM B
752 MI_WRAM_C : WRAM C
753 slots : slot to lock
754
755 Returns: 0 if success
756 -1 means filer
757 *---------------------------------------------------------------------------*/
758 int MI_LockWramSlots( MIWramPos wram, u32 slots );
759 #define MI_LockWramSlots_A(slots) MI_LockWramSlots( MI_WRAM_A, slots )
760 #define MI_LockWramSlots_B(slots) MI_LockWramSlots( MI_WRAM_B, slots )
761 #define MI_LockWramSlots_C(slots) MI_LockWramSlots( MI_WRAM_C, slots )
762
763 /*---------------------------------------------------------------------------*
764 Name: MI_UnlockWramSlot
765
766 Description: unlock WRAM slot
767
768 Arguments: wram : wram position
769 MI_WRAM_A : WRAM A
770 MI_WRAM_B : WRAM B
771 MI_WRAM_C : WRAM C
772 slots : slot to unlock
773
774 Returns: 0 if success
775 -1 means filer
776 *---------------------------------------------------------------------------*/
777 int MI_UnlockWramSlots( MIWramPos wram, u32 slots );
778 #define MI_UnlockWramSlots_A(slots) MI_UnlockWramSlots( MI_WRAM_A, slots )
779 #define MI_UnlockWramSlots_B(slots) MI_UnlockWramSlots( MI_WRAM_B, slots )
780 #define MI_UnlockWramSlots_C(slots) MI_UnlockWramSlots( MI_WRAM_C, slots )
781
782 //================================================================================
783 /*---------------------------------------------------------------------------*
784 Name: MI_GetWramReservation
785
786 Description: check WRAM reservation
787
788 Arguments: wram : wram position
789 MI_WRAM_A : WRAM A
790 MI_WRAM_B : WRAM B
791 MI_WRAM_C : WRAM C
792
793 num ; slot num
794 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
795
796 Returns: MI_WRAM_ARM9 : ARM9
797 MI_WRAM_ARM7 : ARM7
798 MI_WRAM_DSP : DSP (only for WRAM_B and WRAM_C)
799 *---------------------------------------------------------------------------*/
800 MIWramProc MI_GetWramReservation( MIWramPos wram, int slot );
801 #define MI_GetWramReservation_A(slot) MI_GetWramReservation( MI_WRAM_A, slot )
802 #define MI_GetWramReservation_B(slot) MI_GetWramReservation( MI_WRAM_B, slot )
803 #define MI_GetWramReservation_C(slot) MI_GetWramReservation( MI_WRAM_C, slot )
804
805
806 /*---------------------------------------------------------------------------*
807 Name: MI_GetAllocatableWramSlot
808
809 Description: get allocatable WRAM slots by specifying the processor
810
811 Arguments: wram : wram position
812 MI_WRAM_A : WRAM A
813 MI_WRAM_B : WRAM B
814 MI_WRAM_C : WRAM C
815
816 proc : processor
817 MI_WRAM_ARM9 : ARM9
818 MI_WRAM_ARM7 : ARM7
819 MI_WRAM_DSP : DSP
820
821 Returns: bit=1 slot is allocatable for the processor.
822 bit=0 slot is used by other processors, so cannot allocate.
823 WRAM_A : (1<<3)=slot3, (1<<2)=slot2, ... , (1<<0)=slot0
824 WRAM_B : (1<<7)=slot7, (1<<6)=slot6, ... , (1<<0)=slot0
825 WRAM_C : (1<<7)=slot7, (1<<6)=slot6, ... , (1<<0)=slot0
826
827 *---------------------------------------------------------------------------*/
828 u8 MI_GetAllocatableWramSlot( MIWramPos wram, MIWramProc proc );
829 #define MI_GetAllocatableWramSlot_A(proc) MI_GetAllocatableWramSlot( MI_WRAM_A, proc )
830 #define MI_GetAllocatableWramSlot_B(proc) MI_GetAllocatableWramSlot( MI_WRAM_B, proc )
831 #define MI_GetAllocatableWramSlot_C(proc) MI_GetAllocatableWramSlot( MI_WRAM_C, proc )
832
833 /*---------------------------------------------------------------------------*
834 Name: MI_GetFreeWramSlot
835
836 Description: get free WRAM slots.
837
838 Arguments: wram : wram position
839 MI_WRAM_A : WRAM A
840 MI_WRAM_B : WRAM B
841 MI_WRAM_C : WRAM C
842
843 Returns: bit=1 slot is free.
844 bit=0 slot is not free, that is it is used or reserved by some processor.
845 WRAM_A : (1<<3)=slot3, (1<<2)=slot2, ... , (1<<0)=slot0
846 WRAM_B : (1<<7)=slot7, (1<<6)=slot6, ... , (1<<0)=slot0
847 WRAM_C : (1<<7)=slot7, (1<<6)=slot6, ... , (1<<0)=slot0
848
849 *---------------------------------------------------------------------------*/
850 #define MI_GetFreeWramSlot(wram) MI_GetAllocatableWramSlot( wram, MI_WRAM_FREE )
851 #define MI_GetFreeWramSlot_A() MI_GetFreeWramSlot( MI_WRAM_A )
852 #define MI_GetFreeWramSlot_B() MI_GetFreeWramSlot( MI_WRAM_B )
853 #define MI_GetFreeWramSlot_C() MI_GetFreeWramSlot( MI_WRAM_C )
854
855 /*---------------------------------------------------------------------------*
856 Name: MI_GetUsedWramSlot
857
858 Description: get used WRAM slots.
859
860 Arguments: wram : wram position
861 MI_WRAM_A : WRAM A
862 MI_WRAM_B : WRAM B
863 MI_WRAM_C : WRAM C
864
865 Returns: bit=1 slot is used by some processor.
866 bit=0 slot is not used. (it may be reserved by some processor)
867 WRAM_A : (1<<3)=slot3, (1<<2)=slot2, ... , (1<<0)=slot0
868 WRAM_B : (1<<7)=slot7, (1<<6)=slot6, ... , (1<<0)=slot0
869 WRAM_C : (1<<7)=slot7, (1<<6)=slot6, ... , (1<<0)=slot0
870
871 *---------------------------------------------------------------------------*/
872 #ifdef SDK_ARM9
873 u8 MI_GetUsedWramSlot( MIWramPos wram );
874 #define MI_GetUsedWramSlot_A() MI_GetUsedWramSlot( MI_WRAM_A )
875 #define MI_GetUsedWramSlot_B() MI_GetUsedWramSlot( MI_WRAM_B )
876 #define MI_GetUsedWramSlot_C() MI_GetUsedWramSlot( MI_WRAM_C )
877 #endif
878
879 /*---------------------------------------------------------------------------*
880 Name: MI_IsWramSlotUsed
881
882 Description: check if WRAM slot is used
883
884 Arguments: wram : wram position
885 MI_WRAM_A : WRAM A
886 MI_WRAM_B : WRAM B
887 MI_WRAM_C : WRAM C
888
889 slot ; slot
890 WRAM_A:0-3 WRAM_B:0-7 WRAM_C:0-7
891
892 Returns: TRUE ... used
893 FALSE ... not used
894 *---------------------------------------------------------------------------*/
895 #ifdef SDK_ARM9
896 BOOL MI_IsWramSlotUsed( MIWramPos wram, int slot );
897 #define MI_IsWramSlotUsed_A(slot) MI_IsWramSlotUsed( MI_WRAM_A, slot )
898 #define MI_IsWramSlotUsed_B(slot) MI_IsWramSlotUsed( MI_WRAM_B, slot )
899 #define MI_IsWramSlotUsed_C(slot) MI_IsWramSlotUsed( MI_WRAM_C, slot )
900 #endif
901
902 /*---------------------------------------------------------------------------*
903 Name: MI_LockWramManager
904
905 Description: lock wram manager
906
907 Arguments: lockid : lockID
908
909 Returns: None
910 *---------------------------------------------------------------------------*/
911 void MI_LockWramManager( u16* lockid );
912 /*---------------------------------------------------------------------------*
913 Name: MI_UnlockWramManager
914
915 Description: ullock wram manager
916
917 Arguments: lockid : lockID
918
919 Returns: None
920 *---------------------------------------------------------------------------*/
921 void MI_UnlockWramManager( u16 lockid );
922 /*---------------------------------------------------------------------------*
923 Name: MI_TryLockWramManager
924
925 Description: try to lock wram manager
926
927 Arguments: lockid : lockID
928
929 Returns: >0 value previous locked id
930 OS_LOCK_SUCCESS success to lock
931 *---------------------------------------------------------------------------*/
932 s32 MI_TryLockWramManager( u16* lockid );
933
934 //================================================================================
935 // for DEBUG
936 //================================================================================
937 /*---------------------------------------------------------------------------*
938 Name: MI_DumpThreadList
939
940 Description: Dump wram Status for WRAM-A/B/C
941
942 Arguments: wram : wram position.
943 MI_WRAM_A / MI_WRAM_B / MI_WRAM_C
944
945 Returns: None
946 *---------------------------------------------------------------------------*/
947 void MI_DumpWramList(MIWramPos wram);
948 #define MI_DumpWramList_A() MI_DumpWramList( MI_WRAM_A )
949 #define MI_DumpWramList_B() MI_DumpWramList( MI_WRAM_B )
950 #define MI_DumpWramList_C() MI_DumpWramList( MI_WRAM_C )
951
952 /*---------------------------------------------------------------------------*
953 Name: MI_DumpWramListAll
954
955 Description: Dump all wram status
956
957 Arguments: None
958
959 Returns: None
960 *---------------------------------------------------------------------------*/
961 void MI_DumpWramListAll(void);
962
963 #ifdef __cplusplus
964 } /* extern "C" */
965 #endif
966
967 /* TWL_MI_SHAREDWRAM_H_ */
968 #endif
969