ELF(84H]4 (T88T88T||PTP}P}TTTT||NTTxTxx TT,, AT TTT(.shstrtab.debug_abbrev.debug_aranges.debug_frame.debug_info.debug_line.debug_loc.debug_macinfo.debug_pubnames.debug_overlay.strtab.symtabferret.relaferretferretWRAM.relaWRAMWRAMbinary.AUTOLOAD_INFObinary.STATIC_FOOTERferret_defsFcheck.WORKRAMbinary.LTDAUTOLOAD_TOPRSVWRAM.relaRSVWRAMRSVWRAMLTDMAIN.relaLTDMAINLTDMAINbinary.LTDAUTOLOAD_INFOferret_defsLcheck.LTDMAINcheck.RSVWRAM$m$a$dINITi_CopySysConfigINITi_ShelterLtdBinaryINITi_Fill32INITi_IsRunOnTwlmicrocode_GotoMain.rodata$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dmicrocode_ShakeHandINITi_DetectMainMemorySizeINITi_DoAutoloadINITi_Copy32IsValidConfigExOS_HaltstrMemMAIN@7463GX_VBlankIntrVBlankIntrPrintDebugInfostrHeapSizeIsstrMemWRAMOS_EnableIrqMI_CpuFill32MI_CpuClear32ReadUserInfoGetRomValidLanguage$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a@7437$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dMI_CpuCopy32@7438strFailedCreateHeapInitializeAllocateSystemOS_GetSubPrivArenaHiOS_GetWramSubPrivArenaLostrARM7OS_GetSubPrivArenaLoInitializeAllocateSystemCoreOS_GetWramSubPrivArenaHiMI_CpuClear8CheckCorrectNCDExInitializeFatfs.text$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$t$t$a$a$d$d$t$t$t$Ven$lb$$SVCi_CalcSHA1Core.WRAMsyscall_twl.o .text.text$a$a.text$a.text$abreakCtx$a$a$a$d$d$d.bss.data$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_IrqCallbackInfoIndexOS_DisableIrq$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d@6490OSi_IsTerminateOccurred$a$a$a$a$a$d$d$d$d@6489OSi_IsResetOccurred.bssOSi_AllocateCardBus_ZZ11OS_InitLockvE13isInitializedOSi_DoUnlockByWordOSi_FreeCardBus$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dOSi_DoTryLockByWord.bssOS_PutStringDefaultOS_FPutStringInit@7927.data@7918$a$a$a$a$a$a$a$a$aOS_FPutStringISTD$d$d$d$d$d$d$d$dcommon_bufferOS_FPutStringDummy@7917.bssOSi_FPutStringHookOS_FPutStringPrnSrvOSi_ThreadIdCountOSi_ExitThread_ArgSpecifiedOSi_RemoveSpecifiedLinkFromQueue$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aOSi_InsertLinkToQueueOSi_InsertThreadToListOSi_IdleThreadProcOSi_RemoveThreadFromListOSi_RescheduleThread$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_ExitThreadOSi_SystemStackBuffer.bssOSi_ExitThread_DestroyOSi_SleepAlarmCallback$a$a$aOSi_RunningConsoleTypeCache_ZZ18OSi_DetectPlatformvE12OSi_Platform_0.data_ZZ20OSi_DetectDeviceTypevE5table_ZZ18OSi_DetectEmulatorvE22OSi_IsDetectedEmulator.rodata$a_ZZ18OSi_DetectEmulatorvE12OSi_Emulator_0$a$a$a$a$a$a$d$d$d$d$d$d_ZZ18OSi_DetectPlatformvE22OSi_IsDetectedPlatformOSi_DetectPlatform$t.bss$a$a$a$a$a$a$a$a$a$a$a$a$a$aOS_IncreaseMutexCount$d$d$d$d@6967@6966OS_DecreaseMutexCount$a$a$dOSi_Initialized$a$a$a$a$a$a$a$d$d$d.bssOS_InitArenaHiAndLo@7715$a$a$a$a$d$d$d$d.bss@6537@6536@6539@6538OSi_UserExceptionHandlerArgOSi_ExceptionHandler$a$a$a$a$a@6541OSi_UserExceptionHandler@6540@6542$d$d$d$dOSi_DisplayExContextOSi_SetExContextOSi_GetAndDisplayContext.bssOSi_OriginalHandlerOSi_ExContextOSi_DebuggerHandler$aOSi_TimerReserved$d.bssOSi_UseTick$a$a$a$a$a$d$d$d$d$dOSi_CountUpTick.bssOSi_AlarmHandlerOSi_InsertAlarmOSi_ArrangeTimer$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d@6821@6822OSi_UseAlarmOSi_AlarmQueue.bssOSi_SetTimerOSi_DetachVAlarm@6954OSi_PreviousVCountOSi_InsertVAlarm@6929@6928OSi_VAlarmQueueOSi_GetVFrame$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$dOSi_VFrameCountOSi_VAlarmHandlerOSi_SetNextVAlarm.bssOSi_UseVAlarm$a$a$a$a$a$a$a$d$a$a$d$d_ZZ18OSi_IsCodecTwlModevE11initialized_0_ZZ18OSi_IsCodecTwlModevE6retval.bssOSi_ReloadTwlRomData.rodata$a$a$a$a$aOSi_DoBootOSi_IsInitReset$d$d$d$d.bss$a$d_ZZ12OS_TerminatevE4sent_0_ZZ12OS_TerminatevE10terminatedOS_EnableIrq$a$a$a$a$d$d$d$t.bss$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aMIi_GetControlData$d$d$d$d$d$d$d$d$d$d$d$d$dresultPtrMIi_DoUnlockWramSlotslock$a$a$a$a$d$d$d$dMIi_CallbackForPxifinishPtrMIi_DoLockWramSlots.bss_ZZ19MIi_InitWramManagervE12sInitialized$a$a$a$d$d$a$a$a$a$a$a$a$a$a$a$aPADi_XYButton_CallbackPADi_XYButtonAlarm$a$a$d$d.bss$a$dPXIi_SetToFifoFifoRecvCallbackTable$a$a$a$a$a$a$d$d$d$d$dFifoCtrlInit.bss$a$a$a$a$a$a$a$a$dSTD_Unicode2SjisArray.dataSTD_Sjis2UnicodeArray$a$d$a$a$d$d$a$a$a$a$d$d$d$d$a$a$a$a$a$a$d$d$d$d$d$d.data$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d.bss_ZZ14SND_CalcRandomvE1u.data.rodata$a$a$a$a$d$d$d$dSinTablesndMesgBuffersndAlarmSndAlarmCallback_ZZ8SND_InitmE11initialized$a$a$a$a$a$a$a$a@6546$d$d$d$d$d$dsndThreadsndMesgQueue.bsssndStackSndThread$a$asWeakLockChannelStartExChannel.rodataCalcReleasesLockChannel$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d_ZZ22SND_SetExChannelAttackP12SNDExChanneliE12attack_table_ZZ22CompareExChannelVolumePK12SNDExChannelS1_E5shift_ZZ18SND_AllocExChannelmiiPFvP12SNDExChannel26SNDExChannelCallbackStatusPvES2_E13channel_order.bssSetTrackMuteseqCacheReadArgInitTrackChannelCallbackReadByteInitCacheRead24GetVariablePtrFreeTrackChannelAllReleaseTrackChannelAll$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a@9073FinishPlayer$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dUpdateTrackChannelGetPlayerTrackStartTrackPlayerSeqMainClosePlayerTrackRead16AllocTrack.bsssMmlPrintEnable$a$a$a$a$a$a$d$d$d.bssAlarmHandler$a$a$a$a$a$d$d$d$d$dsCommandMesgQueue$a$a$a$d$d$dPxiFifoCallback.bsssCommandMesgBufferSpiPxiCallback$a$a$a$a$a$a$a$a$a$a$aSpiCommonThread$d$d$d$d$d$d$d$d$dspiWork.bssspiInitializedPMi_ReturnResult$a$a$a$a$d$d$d.bss$aSPI_SendWait$a$a$a$a$a$d$d$dstrBadLEDMessage.data.rodata$a$a$a$a$a$a@7733$d$dMCU_WriteRegisterMCU_ReadRegisterPMi_AmpGainLevelTable@7323@7324$a$astrDmaStopMessage$d$dPMi_PreDmaCnt.bssPMi_BlinkCounter$a$a$a$d$d$d.bssPMi_MCUShutdownCallbackPMi_MCUResetCallbackstrUnknownstrDoExitMCU_GetBatteryLevelPMiMCUBatteryEmptyCallbackCalledPMi_DummyHandlerstrBatteryLevelZerostrPWSWResetstrResetOccuredstrPWSWShutdownPMiInTerminatePMiMCUPwswCallbackCalled$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$dPMi_MCUBatteryEmptyCallbackPMi_MCUBatteryLowCallbackPMi_MCUPwswCallbackstrARM7SCFGi_ExecSCFGi_CommonCallback$a$a$a$a$d$d$dSCFGi_MessageQueueSCFGi_MessageBufferSCFGi_SendPxiData.bssSCFGi_StackSCFGi_Thread_ZZ18TP_AutoAdjustRangeP9SPITpDatatE9valid_cnt_0_ZZ18TP_AutoAdjustRangeP9SPITpDatatE11invalid_cntSPI_DummyWaittpw$a$a$a$a$a$a$d$d$d$d$d$dTpVAlarmHandler.bssTPi_DetectTouchTPi_DetectPosSPI_DummyWait@6909@6908$a$a$a$a$d$d$d$dlast_touch_flg.bssmicw$a$a$a$a$a$a$aMIC_TimerHandler$d$d$d$d$d$d$dMicTimerHandler.bssMicSetTimerValuecounter12sam12counter8offset12sam8$a$a$a$d$d$d.bssSPI_DummyWaitReceiveoffset8$a$a$a$a$d$d$d$d$a$dCARDi_EnableFlag$a$a$a$a$d$d$d$d.bss$a$a$d$d$a$a$a$a$a$d$d_ZZ19CARDi_EraseChipCorevE3argCARDi_WaitBusyforIRC_ZZ17CARDi_WriteEnablevE3arg.dataneed_commandCARDi_CommVerifyCore_ZZ23CARDi_CommandReadStatusvE3bufCARDi_SendSpiAddressingCommandCARDi_WriteEnable.rodataCARDi_WaitPrevCommandCARDi_CommWriteCorecardi_param$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aCARDi_CommReadCoreCARDi_CommandEndCARDi_CommArray_ZZ24CARDi_InitStatusRegistervE14status_checked$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bssCARDi_SetRomOp$a$a$a$a$aCARDiReadRomFunctionCARDi_IsNormalMode$d$d$d$d.bssCARDi_DoneTaskFromARM9.data_ZZ22CARDi_LockMutexForARM7vE7isFirst$a$a$a$a$d$d$dCARDi_DoTaskFromARM9CARDi_ARM7Mutex@6769@6768.bss_ZZ26CARD_InitPulledOutCallbackvE13isInitializedCARDi_CallbackForPulledOut.dataCARDi_TryTerminateARM7_ZZ25CARD_CheckPullOut_PollingvE9skipCheck_0@6726@6725$a$a$a$a$a$a$a_ZZ25CARD_CheckPullOut_PollingvE12isFirstCheck_1isCardPullOut$d$d$d$d$d$d$dCARDiSlotResetCount_ZZ22CARDi_TryTerminateARM7PvE5alarm.bssdetectPullOut_ZZ25CARD_CheckPullOut_PollingvE9nextCountmutexI2Ci_SendMiddleI2Ci_StopExI2Ci_SendStartI2Ci_GetResultI2CiDeviceAddrTableslowRateisInitializedI2Ci_WaitEx.rodata$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$dI2Ci_ReceiveStartI2Ci_GetDataCDC_PowerUpDAC_ZZ20CDC_WaitPowerDownDACvE25mute_wait_append_time_maxCDCi_InitializeIirFilterBuffersMicBiasBkisUnmuteSpBk_ZZ20CDC_WaitPowerDownADCvE25mute_wait_append_time_maxCDC_WaitPowerDownDACCDC_SetIirFilterCoreCDCi_IsIirFilterInitializedsCdcSysClockBk.rodataisDACOnBksIirFilterAddressHalfHpf10HzSamplingrate48k$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aDefaultIirParamHpf10HzSamplingrate32k$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsIirFilterAddressisUnmuteHpBkCDCi_EndForceOutSoundCDC_PowerUpDAC_WaitWithSpinsIirFilterBackupCDC_WaitPowerDownADCisAudioADCOnBkCDCi_StartForceOutSoundCDC_SetIirFilterHalfCore.bssisSARADCOnBk__FUNCTION__$6583@6775@6774.dataSPI_SendWaitcdcMutex$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a__FUNCTION__$6597cdcCurrentPage__FUNCTION__$6616$d$d$d$d$d$d$d$d$d__FUNCTION__$6639.bssSPI_DummyWaitReceivesndexLock__FUNCTION__$7136ReplyResultsndexIirTarget.datasndexSetAlarmPxiCallbackMCU_SetVolumeSetVolumeHandlerRequestThreadMCUVolumeSwtichCallbacksndexReqMsgQsndexIirParam@7717@7716sndexIsPlayShutter$a$a$a$a$a$a$a$a$a$asndexVolAlarmsndexReqInitialized$d$d$d$d$d$d$dsndexReqMsgQArrayMCU_ReadRegistersndexReqThreadsndexReqThreadStacksndexSpiLockId.bsssndexVolsndexTempDSPMixRate__FUNCTION__$6609.data@6647$a$a$d$d@6648$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$dMicexUpdateStatusOnBufferFullMicexConvSamplingSpanMicexIntrHandler$a$a$a$a$a$a$d$d$d$d$d@6864@6865__FUNCTION__$6503@6573@6572.data$a$a$a$a@6581__FUNCTION__$6494micexIntrPrio$d$d$d$d.bssmicexIntrInfoMCUiThreadMCUiEnableHeartBeatMCUiMessageMCUiIrqTableMCUiStackMCUi_HandlerMCUi_ThreadMCUi_GetIrqReasonMCUiMessageQ$a$a$a$a$a$a$a$a$a$a$aMCUiPwswStatus$d$d$d$d$d$d$d$d$dMCUiIsInitializedMCUi_HeartBeatHandlerMCUi_UpdatePwswStatusverInfo$a@7074@7075$dnvramwNvramCheckReadyToRead$a$a$a$a$a$aNvramIsAvailableMemAddr$d$d$dNvramCheckReadyToWrite.bssSPI_DummyWaitSPI_SendWait$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dRtcReturnResultRtcBCD2HEX@7311rtcWork$a$a$a$a$a$a$a$a$a$d$d$d$d$d$drtcInitializedRtcAlarmIntrRtcThreadrtcMutexRtcPxiCallback.bss$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aRtcGpioTransferRtcChangeAlarmFormat12to24RtcChangeAlarmFormat24to12$a$a$a$a$a$a$a$a$d$d$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d@8193$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$a$a$a$a$a$d$d$d$d$a$a$d$dFATFSi_rtfs_cfg_core.bss@7222$a$a$a$a$a@7215$d$a$a$a$a$a$a$d$a$a$a$a$a$a$a$a$a$a__FUNCTION__$7396FATFSi_pc_freefile.data$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d@8309@8308FATFSi_check_media_ioFATFSi_card_failed_handler$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$dFATFSi_check_media_entryFATFSi_check_media$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$dFATFSi_pc_allspace$a$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$a$a$a$a$a$a$d$d$d$d$d@7080@7081@7082@7083@7084@7085$a$a@7077$d@7078@7079FATFSi_rtfs_strtab_string$a$a$d$d$a$a$a$a$a$a$a$a$a$a$a$a$a$d@7559$a$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$dFATFSi_init_fat.bss$a$a$a$d$d$a$a$a$d.bssRtcBCD2HEX$a$a$a$a$a$a$a$d$d$d$d$a$d$a$a$a$d$dFATFSi_pc_add_blkFATFSi_pc_allocate_blkFATFSi_pc_commit_fat_blk$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$dFATFSi_pc_release_blk.rodata$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d@7145@7127@7146@7149@7148@7128FATFSi_i_no_print@7151@7153$a$a$a@7152$d$d@7329$a$a$a$d$d$d.bss@7442.data$a$a$d$d$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a@8224@8225$d$d$d$d$d$d$d$a.data@7616$a$a$a$a$a$a$a$a$a$a$a$a$a@7615$d$d$d$d$d$d$d$d$d$d$d$d$d_ZZ17FATFSi_sdmcSelecttE12first_select.bss@7342@7341SdmcCache$a$a$a$a$a$a$d$d$d$d$d$dSDCARDi_WriteAesFifo@9222i_sdmcIniti_sdmcEnableFATFSi_aesCounterDefaultSDCARD_Thread.dataSDCARDi_WriteFifoSDCARD_LayerInitsdmcRandEnableSDCARDi_ReadCoreSDCARDi_ReadOS_DisableIrq$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$asdmc_srand@9077$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d@8921@8920@8922sdmcCheckPortContextFATFSi_i_sdmcErrProcessFATFSi_sdmc_tsk_createdSDCARDi_WriteSDCARDi_ReadFifoSDCARDi_ReadAesFifo.bssFATFSi_ulSDCARD_SizeSDCARDi_WriteCore_ZZ17SDCARD_TimerStartmE10timeout_ms@8073SDCARDi_FPGA_irqSDCARDi_CpuRecvFastOS_EnableIrqOS_DisableIrq$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a@8122@8025@8046@8026@8126$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dSDCARDi_CpuSendFastSYSFPGA_irqSDCARD_ReadyToEnd.bss_ZZ18SDCARD_Intr_ThreadPvE1i$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bss@7968FATFSi_sdmc_drive_no$a$a$a$a$a$a$d$d$d$d$d_ZZ19FATFSi_sdmcRtfsCtrliiPvE15initialize_flagi_sdmcIdleCard.bssFATFSi_nand_drive_noFATFSi_nand_calculated_fat_params$a$dNandFatSpec.bsssdmc_nand_flag_baki_sdmcSetParitysdmc_nand_flagsdmc_nvram_adr$a$a$a$a$a$a$a$a$asdmc_spi_lockidi_sdmcCheckReadyNvramsdmc_log_initialized$d$d$d$d$d$d$d$di_sdmcGetNvramAdri_sdmcCheckParityi_sdmcGetNvram.bss@7286@7287@7284@7285@7288@7289FATFSi_nandaes_drive_no$a$a$d$d.bssFATFSiHandleManager$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d@9505FATFSi_SDInsertCallbackFATFSiNowOnHeavyCommandFATFSi_CheckHeavyCommandEnd_ZZ27FATFSi_CommandFormatSpecialPvE4work.data@11565@13001@11564@13002FATFSi_CompareNIString@13003@11506@12510@12471FATFSi_CopyLUnicodeString@12791@11640@12790FATFSi_NormalizePath@11980FATFSi_GetValidDirectoryHandle_ZZ20FATFSi_NormalizePathPKtPm17OSMountPermissionP18FATFSCommandHeaderE5index@12778FATFSi_IsValidDriveFATFSi_SDRemoveCallbackFATFSiLetterToHandle_ZZ27FATFSi_GetLauncherInfoTablevE5table$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$aFATFSi_GetValidFileHandle$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dFATFSi_RegisterDriveFileFATFSiSpecialDrivesFATFSi_IsMediaProtected@12787@11979FATFSi_IsMediaFatalFATFSi_CheckHeavyCommandBegin@12786@11978@11554@12785@11557@12784FATFSi_GetLauncherInfoTableFATFSi_UnregisterDriveFile.bss@11971@12881FATFSi_CompareUnicodeStringFATFSiOnceAccessedSDCard@12882@11973@11972@11975FATFSi_VerifyCommandResult_ZZ26FATFSi_VerifyCommandResultim25@enum$8161fatfs_command_cPmE5table@11974FATFSi_UnpackAsciiToUnicode@12789@11977FATFSiUnicodePathBuffer@12946@11976FATFSi_IsShareArchiveNameFATFSiCommandBufferDefault.dataFATFSiLastError$a$a$a$a$a$a$a$d$d$d$d$d$dFATFSiResultBufferList.bssFATFSiRequestFATFSi_AppendRequestFATFSiThread$a$a$a$a$aFATFSi_CommandThread$d$d$d$d$dFATFSi_CopyUnicodeString$a$a$a$aspCallback.rodataDMA_CONFIG$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsCallbackParamsSrcSize@7341spDstCtrRunCallbackSendMessageSetupDefaultFractionPxiCallbacksNextSlotsThreadStackExclusiveOrAesBlocksRandCountersFractionsMutex$a$a$a$a$a$a$a$a$a$a$a$a$a$aspSrcAesThreadIsValidAddresssDmaNoForSendsMacSize$d$d$d$d$d$d$d$d$d$dsThreadsThreadQsDstSizeStepSubKeysDmaNoForRecvAesRunsFractionSizesCountersThreadQBuffer$a$a$a$a$d$a$a$a$a$as_bInitialized_isddcc_readdata_isddcc_readstat$d$ds_fResource.bss$a$a$d_isdwritechar_nitroemuex$a$a$a$a$a$a_isddcc_readstat$d_isddcc_writedatas_funcRegisterOverlays_bEnabledOverlay$as_funcUnregisterOverlay$ds_bEnableMonitor.bss$as_arAddrMon_isdcallmon_checkSignature.rodata$a$a$a$a$a$a$d$d$d$d$ds_dwAddrMons_bInitialize.bss$a$d$a$a$d$a$dpc_upstat_exMI_InitNDmaConfigSTD_TSNPrintfOS_SetPeriodicAlarmMIi_CpuClear32SDCARD_SetAbortSDCARDi_CpuWriteFifoAessdmcCacheReadFifoAES_SetKeyCOS_TryLockCardFATFSi_NTLowerStringSDK_AUTOLOAD_LIST_ENDsdmcFillFifoFATFSi_fat_devio_writeSDK_LTDAUTOLOAD.LTDMAIN.DATA_ENDSND_StartExChannelNoise_isdint_restoreallFATFSi_sdmc_almOSi_SendToPxiFATFSi_pc_flush_all_filSVC_CalcSHA1OS_TPrintfSDK_AUTOLOAD_SIZEFATFSi_pc_get_cwd_start_AutoloadDoneCallbackFATFSi_pc_fd2fileFATFSi_rtfs_pc_cluster_sizeSDCARDi_DmaReadFifoAesFATFSi__synch_file_ptrsFATFSi_pSDCARD_BufferAddrFATFSi_rtfs_port_alloc_mutexSND_StartAlarmSDK_AUTOLOAD_WRAM_STARTFATFSi_CommandFormatDriveFATFSi_pc_path_to_drivenoMCU_DisableHeartBeatFATFSi_fatxx_pfaxxSDK_LTDAUTOLOAD_TOP_STARTSDK_WRAM_ARENA_LOSDCARDi_RemoveProcSDPort1ContextMIC_ExecSampling8FATFSi_fileRtfsAttachSDPort0ContextOSi_FuncTerminatePADi_XYButtonAvailableMICEX_DisableMultipleInterruptFATFSi_sdmcRtfsIoCARDi_ReceiveTaskSND_GetChannelControlAES_ResetTP_AnalyzeCommandOSi_ThreadInfoSDK_LTDAUTOLOAD_LIST_ENDSND_SetChannelPanSDK_LTDAUTOLOAD.RSVWRAM.BSS_SIZESD_SelectCard$Ven$$SVC_GetVolumeTableWRAMFATFSi_rtfs_pc_format_mediaFATFSi_CommandCheckDiskOS_GetProcModeFATFSi_AbortHeavyCommandFATFSi_pc_firstblockNVRAM_ReadStatusRegisterFATFSi_rtfs_cs_strcpyNVRAM_Init_ull_modRTCi_GpioEndSND_CommandInitFATFSi_nandAesRtfsAttachOS_RestoreInterruptsFATFSi_GetCurrentDirectoryHandlesFATFSi_unicode_cmp_to_ascii_charSD_SetPullUpOS_InitThreadSTD_GetStringLengthFATFSi_CommandReadFile_u32_div_fFATFSi_file_secptrackFATFSi_CommandDeleteFileRTC_ReadFreeMICEX_IrqHandlerSND_SetChannelVolumeSDK_LTDAUTOLOAD.LTDMAIN.SIZEFATFSi_process_crossed_file_isdint_disableall_iswritestrcons_twl_isdbusmgr_isresourceavailable_twlFATFSi_fatxx_get_chainRTC_ReadDateTimeFATFSi_check_drive_number_presentSD_ClrErrFATFSi_rtfs_pc_get_media_parmsRTC_WriteFoutOSi_TerminateCoreFATFSi_pc_fndnodeFATFSi_CommandCloseFileSVC_GetCRC16CDC_ChangePageFATFSi_crossed_file_coreCARD_InitFATFSi_copybuffFATFSi_NotifyRequestCompletionFATFSi_pc_free_all_i__isdversionsigunature_twlOSi_IrqTimer2OSi_IrqTimer3OSi_IrqTimer0OSi_DetectDebuggerOSi_IrqTimer1OSi_EnterNDmaCallback_isdcallmon_unlockProtect_twlFATFSi_pc_patcmp_vfatSDCARD_UseAesFlagOS_PutStringSDK_SYS_STACKSIZE_SIGNOS_SetVAlarmTagCDC_WriteSpiRegisterAES_LockOS_GetBootTypecardi_rom_baseFATFSi_rtfs_my_alloc_mutexNVRAM_AnalyzeCommandSND_AllocExChannelSVC_WaitIntrFATFSi_current_pdrOS_SetIrqFunctionExRTC_ReadAdjustFATFSi_allocate_chkdsk_coreSND_EnableSVC_UnpackBitsFATFSi_get_bitOS_IrqDummyOSi_IdleThreadSNDi_SharedWorkSND_ExChannelInitFATFSi_fatxx_pfswapSCFG_InitFATFSi_twfs_pc_set_propertiesMCU_InitIrqSD_StopTransmissionFATFSi_unicode_assign_ascii_charFS_InitAES_CoreOS_EnableSchedulerTPEX_EnableNewBufferModeFATFSi_CommandCloseDirectory$Ven$$OS_TerminateWRAM__sinit__FATFSi_EnumPublicArchivesOS_SetThreadPrioritySD_SendIfCondNAND_FAT_PARTITION_COUNTFATFSi_text2lfiSDK_STATIC_ETABLE_ENDFATFSi_rtfs_port_release_mutexCDC_StartShutterSoundSDK_STATIC_BSS_STARTSDK_AUTOLOAD_WRAM_IDNVRAM_SectorEraseTP_ExecuteProcessSD_SendStatusCDC_WriteSpiRegistersExOSi_IsThreadInitializedSND_CalcRandomMIi_CpuPipe32WMSP_GetAllowedChannelSND_EndSleepFATFSi_CommandFormatSpecialFATFS_OpenFileWCDC_InitCurrentPageMI_CpuCopy8_isdcallmon_getMonAddr_twlFATFSi_pc_get_lfn_filenameI2CiSlowRateTableCARDi_ReadRomIDFATFSi_rtfs_po_flushCARDi_WriteBackupCoreFATFSi_pc_sec2indexSDK_AUTOLOAD_LISTFATFSi_AllocateCommandBufferFATFSi_pc_getsysdatePMi_SendPxiCommandMIi_Aes_NDmaSendINIT_InitializeScfgcardi_commonFATFSi_pc_init_inodeFATFSi_sd_stackRTC_InitFATFSi_FreeDirectorySDK_STATIC_SIZEFATFSi_pc_ascii_strn2upperSPIi_ReturnResultFATFSi_CommandRenameFileFATFSi___fat_hash_table_0FATFSi___fat_hash_table_1FATFSi___fat_hash_table_2FATFSi___fat_hash_table_3FATFSi___mem_block_hash_tableFATFSi___fat_hash_table_4FATFSi___fat_hash_table_5FATFSi___fat_hash_table_6ISTDPrintExFATFSi___fat_hash_table_7FATFSi___fat_hash_table_8TPEX_SetTouchPanelDataDepthFATFSi___fat_hash_table_9SND_IsExChannelActiveFATFSi_to_WORDFATFSi_sdmcGetErrCodeSDK_IRQ_STACKSIZE__exception_table_end__FATFSi_rtfs_memsetFATFSi_InitHandleManagerFATFSi_rtfs_port_get_taskidSDCARDi_TransferNVRAM_WriteDisableFATFSi_CommandCreateDirectoryPMi_SetLEDSD_SendRelativeAddrSVC_SoftResetMI_SetNDmaBlockWordSND_CommandProcFATFSi_pc_fat_sizeFATFSi_lfn_chr_to_unicodeOS_InitIrqTableSND_InvalidateBankFATFSi_rtfs_port_putsMIi_Aes_NDmaRecvSDK_STATIC_DATA_STARTFATFSi_fatxx_clnextOSi_InitCommonFATFSi___mem_finode_poolOSi_DoResetSystemSTDi_AttachUnicodeConversionTableFATFSi_prtfs_cfgFATFSi_devio_writeFATFSi_pc_free_all_blkFATFSi_pc_calculate_chsCDC_ReadSpiRegisterFATFSi_add_cluster_to_crossedSDK_LTDAUTOLOAD.RSVWRAM.DATA_ENDOS_ReceiveMessageSDCARD_SectorSizeOSiHeapInfoFATFSi_pc_mkfs32SD_INFO_ERROR_VALUEsMasterPanPXIi_HandlerRecvFifoNotEmptyFATFSi_sdmcGoIdleSDK_LTDAUTOLOAD.LTDMAIN.TEXT_START$Ven$$SVC_SleepWRAMSND_InvalidateWaveFATFSi_rtfs_cs_strcmpNVRAM_ExecuteProcessFATFSi_chain_sizeMI_InitNDmaRTC_ResetCARDi_EraseBackupSubSectorCoreFATFSi_pc_mkfs16FATFS_MountDriveNAND_RAW_SECTORSOSi_UnlockMutexCoreNVRAM_ReadDataBytesAtHigherSpeedCDC_ReadSpiRegistersFATFSi_pc_rmnodePM_SelfBlinkProcFATFSi_print_chkdsk_crossed_filesSDCARDi_CpuReadBufSingleOS_UnlockCardOSi_TickCounterSDK_LTDAUTOLOAD.LTDMAIN.BSS_SIZERTCi_UnlockTPEX_ExecuteProcessSND_SeqMainFATFSi_pc_finode_statFATFSi_scan_for_bad_lfnsOS_ReadMessageSDCARDi_CpuWriteBufTPEX_SetNewBufferModeOSi_LtdMainParamsFATFSi_pc_free_all_filFATFSi_rtfs_pc_unlinkNVRAM_WriteEnableCDC_UnmuteAudioADCFATFSi_fatxx_freechainOS_LoadContextFATFSi_FreeFileFATFSi_fatxx_fwordSND_SinIdxSD_SetIpBlockLengthFATFSi_get_format_parameters_ll_modFATFSi_pc_nibbleparseSDK_STATIC_SINIT_STARTSDK_LTDAUTOLOAD.LTDMAIN.IDSDK_LTDAUTOLOAD.LTDMAIN.DATA_STARTFATFSi_pc_commit_fat_tableSD_INFO2_VALUEFATFSi_pc_isdotFATFSi_pc_free_all_usersSPI_InitSDK_STATIC_TEXT_STARTFATFSi_pc_reduceseglistPXI_InitFATFSi_pc_dskfreeSDK_LTDAUTOLOAD_STARTSVC_UncompressRL8MI_CpuFill8FATFSi_devio_write_formatFATFSi_fileDescListSDK_LTDAUTOLOAD_LTDMAIN_BSS_END_start_ModuleParamsCDCi_IsDACOnSND_SetTrackMuteSPIi_GetExceptionsdmc_slpqTPEX_SetIntervalFATFSi_rtfs_first_stat_flagFATFSi_validate_filenameAES_InitSD_SDSTATUSSDK_LTDAUTOLOAD_LTDMAIN_STARTFATFSi_WaitForRequestCARD_IsPulledOutFATFSi_pc_isadir_isdcntlenSDK_LTDAUTOLOAD_LTDMAIN_SIZERTCi_GpioSendDataCARD_InitPulledOutCallbackFATFSi_pc_release_bufFATFSi_rtfs_strcpySD_SDStatusSDK_AUTOLOAD.WRAM.DATA_STARTFATFSi_scan_all_filesRTCi_LockOS_LockByWordSND_InitLfoParamSDK_AUTOLOAD.WRAM.TEXT_STARTFATFSi_pc_read_partition_tableFATFSi___mem_drobj_poolFATFSi_critical_error_handlerSND_SetPlayerLocalVariableSVCi_CalcSHA1CoreOSi_SystemCallbackInSwitchThreadSND_BeginSleepOSi_CommonCallbackMCU_GetPwswStatusSND_FreeExChannelFATFSi_unicode_make_printableOSi_IrqCallbackInfoNVRAM_DeepPowerDownSDCARDi_CpuReadFifoFATFSi_pc_seglist2textFATFSi_CommandRenameDirectoryFATFSi_pc_load_file_bufferSTD_CopyLStringPMi_SetControlfat16_check_freespace_isdcallmon_twlOSi_UnlockAllMutexSDK_AUTOLOAD.WRAM.TEXT_SIZE_isdrel_initialize_twlSDK_LTDAUTOLOAD.LTDMAIN.SINIT_ENDMI_WaitDmaOS_InitVAlarmOSi_IrqCallbackAES_AddToCounterFATFSi_sdmcWriteAesFifoSD_DisableClockMI_InitWramManagerSD_TransEndFPGAOS_SleepsdmcFillAesFifoFATFSi_pc_gblk0_32CARDi_ProgramBackupCoreOS_DisableInterrupts_IrqAndFiqSND_StopUnlockedChannelFATFSi_sdmc_dma2_noFATFSi_pc_mpathFATFSi_rtfs_print_one_stringFATFSi_pc_log_base_2FATFSi_pc_find_fat_blkPMi_InitShutdownControlSND_SetExChannelSustainFATFSi_pc_ascii_mfileFATFSi_fatxx_pfgdwordSDCARDi_CpuWriteFifo_isdcallmon_initialize_twlOS_SpinWaitSysCyclesMCU_CheckIrqI2Ci_WriteRegisterCARDi_InitStatusRegistersdmcIsProtectedSTD_CompareNStringOS_IrqHandler$Ven$$OSi_IsRunOnTwlWRAMSDK_AUTOLOAD_WRAM_BSS_ENDblock_devio_fillFATFSi_pc_strchrSND_SetExChannelAttackFATFSi_sdmcSetLatencyEmulationFATFSi_sdmcSetInsertCallbackSDK_LTDAUTOLOAD.LTDMAIN.TEXT_ENDOS_EnableIrqMaskExFATFSi_process_used_mapFATFSi_pc_i_dskopenSDK_AUTOLOAD_NUMBERFATFSi_write_lost_chainsSND_StartSeqTPEX_SetPrechargeTimeFATFSi_fileRtfsIoOS_WakeupThreadDirectSND_SetupChannelNoiseCDC_WriteSpiRegistersFATFSi_rtfs_resource_initFATFSi_pc_next_blockMIi_CpuSend16sdmcInvalidateCacheAESi_PxiSendFirstFATFSi___fat_buffer_8FATFSi_fatxx_find_free_clusterFATFSi___fat_buffer_9FATFSi_pc_update_inodeSDK_LTDAUTOLOAD.LTDMAIN.DATA_SIZESDK_AUTOLOAD.WRAM.ENDFATFSi_pc_test_all_filFATFSi___fat_buffer_0FATFSi_pc_validate_drivenoFATFSi___fat_buffer_1FATFSi_rtfs_pc_format_volumeFATFSi___fat_buffer_2FATFSi___fat_buffer_3FATFSi___fat_buffer_4FATFSi___fat_buffer_5FATFSi___fat_buffer_6FATFSi___fat_buffer_7FATFSi_rtfs_po_writeFATFSi_pc_allociTPEX_ReadBufferFATFSi_sdmcSetRemoveCallbackSDK_AUTOLOAD.WRAM.IDSDCARDi_CpuFillFifoFATFSi_CommandFlushAllCoreFATFSi_fatxx_cl_truncate_dirMI_NDmaPipeAsync_SetUpFATFSi_defaultRtfsIofat32_check_freespaceSNDi_SetSurroundDecaySND_PauseSeq_ull_divSDCARDi_DmaWriteFifoAesSDK_LTDAUTOLOAD.RSVWRAM.SINIT_STARTNVRAM_SoftwareResetTPEX_InitializeRTC_WritePulseOS_CancelAlarmSDK_STATIC_ETABLE_STARTSND_StartIntervalTimerFATFSi_rtfs_pc_rmdirFATFSi_CommandGetDriveResourceSD_MultiReadBlockCARDi_CommandReadStatusSDK_LTDAUTOLOAD.RSVWRAM.TEXT_ENDFATFSi_sdmcWriteFifoFATFSi_pc_memory_finodeFATFSi_file_cylindersOS_InitSDK_LTDAUTOLOAD.RSVWRAM.ENDSPI_Lock__exception_table_start__FATFSi_rtfs_pc_get_attributesSVC_HaltOS_GetRunningConsoleTypeFATFSi_sdmc_result_dtqMIC_EnableMultipleInterruptSVC_DivRemMI_NDmaSendAsync_DevSDK_LTDAUTOLOAD_LTDMAIN_ENDSDK_LTDAUTOLOAD.RSVWRAM.BSS_STARTSDK_AUTOLOAD_STARTSDK_AUTOLOAD.WRAM.DATA_SIZEFATFSi_pc_search_cslFATFSi_CommandMountDriveTPEX_SetSenseTimeFATFSi_CommandCreateFileMIC_InitMIC_DisableMultipleInterruptFATFSi_pc_truncate_dirSDCARDi_CpuReadBufRTC_WriteAlarm2RTC_WriteAlarm1SND_IsCaptureActivePMi_InitializedCDC_InitMutexSND_ReadInstDataFATFSi_fatxx_flushfatFATFSi_pc_drno2drSND_SetupCapturepc_findin_extwfs_ismounteddriveOS_IsVAlarmAvailableSVC_SqrtFATFSi_ConvertHandleToFileFATFSi_drno_to_stringSND_StopAlarmFATFSi_sdmcIsAbortErrsdmcPostSleepi_sdmcRemovedIntrCoreFATFSi_pc_getdfltdrvnoFATFSi_CommandReadDirectorysSurroundDecaySVC_CpuSetOS_ResetRequestIrqMaskExFATFSi_rtfs_print_string_1SPIi_CheckEntryFATFSi_rtfs_print_string_2FATFSi__illegal_alias_charSDK_LTDAUTOLOAD_LTDMAIN_IDFATFSi_map_unicode_to_asciiTP_AutoAdjustRangeFATFSi_pc_l_next_blockFATFSi_pc_find_blkFATFSi_pc_sort_committed_blocksFATFSi__po_lseekMI_NDmaRestartsdmcInitContext$Ven$$SVC_SetSoundBiasWRAMFATFSi_release_drive_mountFATFSi_sdmcIsFatalErrCARDi_ProcessTasksdmcFlushNandLogFATFSi_i_sdmcCalcSizeCDC_WriteSpiRegisterExFATFSi_pc_flush_fat_blocksSD_CheckStatusFATFSi_rtfs_pc_set_default_drive_u32_div_not_0_fSDCARDi_InsertProcMIC_ExecSampling12AES_LoadKeyFATFSi_sdmcResetSDK_AUTOLOAD.WRAM.SINIT_END_ll_divSDK_LTDAUTOLOAD.LTDMAIN.TEXT_SIZENVRAM_PageErase_start_LtdModuleParamsFATFSi_rtfs_po_extend_fileSD_ClockDivSetWVR_ShutdownOS_InitTickOS_GetThreadPriority_s32_div_fNVRAM_ReadDataBytesOS_GetLockIDFATFSi_rtfs_pc_mv_exFATFSi_fat_flushinfoRTC_ReadFoutFATFSi_rtfs_pc_fstatMI_CpuComp8PMi_WorkFATFSi_pc_freeobjFATFSi_sdmc_dtqRTC_WriteFreeOSi_LauncherThreadCARD_GetRomHeaderFATFSi_rtfs_pc_cache_clustersOS_ExitThreadSDK_LTDAUTOLOAD_TOP_SIZEFATFSi_unicode_ascii_indexOS_InitMessageQueue$Ven$$SVC_WaitByLoopLTDMAINFATFSi_pc_read_blkPXI_IsCallbackReadyFATFSi_pc_ino2dosSD_SetErrOS_IsTickAvailableSD_ClrFPGAFATFSi_pc_cksumTP_ExecSamplingSND_StopSeqFATFSi_CommandSetSeekCacheFATFSi_rtfs_port_claim_mutexSDK_AUTOLOAD.WRAM.BSS_ENDFATFSi_sdmc_tskFATFSi_pc_ascii_fileparseFATFSi_pc_free_scratch_blkSDCARDi_NothingsdmcInitNandLogOSi_SyncWithOtherProcSD_EnableAutoClockFATFSi_fileRtfsCtrlFATFSi_pc_seglist2diskOS_LockMutexSDCARD_ResetAbortRTC_WriteAlarmEx2RTC_WriteAlarmEx1SND_AlarmInitSND_GetLfoValueFATFSi_fatxx_pfpdwordFATFSi_pc_cs_mfileOSi_TPanicMICi_GetSysWorkSNDi_SetPlayerParamSD_AndFPGAFATFSi_check_drive_name_mountRTC_WriteTimeSD_InitIPFATFSi_pc_mkchildFATFSi_defaultRtfsCtrlMCU_GetVerInfoSD_SelectBitWidthFATFSi_fatxx_clrelease_dirFATFSi_pc_nuserfilesSTD_CompareStringFATFSi_rtfs_detachMIi_CpuCopy32CDC_EnableInternalDischargePathOS_SleepThreadFATFSi_sdmc_dtq_arrayMI_SetNDmaInterval_isdovl_initialize_twl_isddcc_writestream2_twlAES_IsVerificationSuccessFATFSi_CommandGetFileLengthCARDi_InitTaskQueueSDK_LTDOVERLAY_NUMBERSND_IsChannelActiveSDCARD_TimerStopFATFSi_pc_ascii_maliasSND_ReleaseExChannelSDK_STATIC_TEXT_SIZERTC_ReadPulseOS_GetArenaLoFATFSi_pc_get_root_ll_sdivCARDi_SetWriteProtectCoreNAND_FAT0_SECTORSOSi_IdleThreadStackFATFSi_pc_parsepathPM_SetMcuForTerminateFATFSi_pc_maliasFATFSi_InitThreadFATFSi_CommandFlushFileOSi_IrqThreadQueuePMi_ResetControlCDC_SetSpiParamsExSDPortCurrentContextSDK_AUTOLOAD_WRAM_SIZESND_UnlockChannelRTC_WriteAdjustFATFSi_pc_mknodeEXI2i_GetBitGpio2CntHMI_IsNDmaBusyFATFSi_rtfs_initOSi_StackForDestructorFATFSi___fat_primary_cache_9FATFSi___fat_primary_cache_8FATFSi_AllocDirectoryFATFSi_sdmcStartAesRTC_WriteStatus2FATFSi___fat_primary_cache_1FATFSi___fat_primary_cache_0FATFSi___fat_primary_cache_3RTC_WriteStatus1FATFSi_rtfs_pc_statFATFSiCommandBufferFATFSi_block_devio_writeFATFSi___fat_primary_cache_2_ll_udivFATFSi___fat_primary_cache_5FATFSi___fat_primary_cache_4FATFSi___fat_primary_cache_7FATFSi___fat_primary_cache_6RTC_WriteDateTimeSND_SetMasterVolumeOS_GetLowEntropyDataOS_CreateVAlarmAES_WaitKeyFATFSi_pc_alloc_dirSVC_UncompressRL16FromDevice$Ven$$SVC_CalcSHA1LTDMAINOS_SetArenaLoPMi_PreSleepForDmaFATFSi_to_DWORDCDC_EndSleepFATFSi_CommandGetFileInfoSND_SetOutputSelectorSD_CheckFPGARegpc_fill_blkFATFSi_CommandUnmountAllSNDi_WorkAESi_PxiSendResultOS_GetArenaHiOSi_IrqDma2sdmc_slpq_arrayOSi_IrqDma3FATFSi_check_drive_number_mountOSi_IrqDma0OSi_IrqDma1FATFSi___fat_primary_index_1FATFSi___fat_primary_index_0FATFSi_sdmcSelectFATFSi___fat_primary_index_3FATFSi___fat_primary_index_2FATFSi___fat_primary_index_5FATFSi_rtfs_get_system_userFATFSi___fat_primary_index_4FATFSi___fat_primary_index_7FATFSi___fat_primary_index_6FATFSi___fat_primary_index_9SDK_STATIC_BSS_SIZEFATFSi___fat_primary_index_8TPEX_SetDebounceTimeAES_DmaSendSND_CalcChannelVolumeRTCi_GpioReceiveDataMICEX_EnableMultipleInterruptSND_SendWakeupMessageFATFSi_twfs_po_openFATFSi_pc_gblk0CDC_EndShutterSoundOSi_IsRunOnTwlMIC_ExecuteProcessFATFSi_pc_validate_partition_typeFATFSi_pc_addtoseglistFATFSi_SendToPXISND_StopIntervalTimerSDCARD_TimerStartFATFSi_file_headsSVC_UncompressLZ8FATFSi_pc_discard_bufOSi_EnqueueTailFATFSi_pc_markiFATFSi_sdmc_dma_nosd_last_info1OS_InitMutexSDK_LTDAUTOLOAD.RSVWRAM.STARTOS_SetSwitchThreadCallbackSDK_LTDAUTOLOAD.LTDMAIN.SINIT_STARTFATFSi_count_lost_clustersOS_SetAlarmsdmcSetNandLogFatalOS_DisableInterruptsI2Ci_ReadRegisterSDCurrentAccessFATFSi_rtfs_pc_check_diskOS_InitExceptionEXI2i_RecvBitGpio2CntLFATFSi_pc_init_drv_fat_info16RtfsMyMutexBufAES_DmaRecvFATFSi_fr_WORDFATFSi_pc_memory_drobjMI_StopAllNDmaNAND_FAT1_SECTORSFATFSi_med_stFATFSi_CommandSetLatencyEmulationSND_LockChannelCDC_ReadSpiRegisterExSND_GetWaveDataAddress$Ven$$SVC_GetCRC16WRAMSND_GetLockedChannelSND_UpdateExChannelEnvelopepc_mknode_exFATFSi_print_chkdsk_statisticssdmc_abort_requestCDC_SwitchOutputDeviceCDC_StopFATFSi_SyncInitializationRTCi_GpioSendCommandFATFSi_ResolveIPLPathFATFS_InitFATFSi_AllocFileOSi_IsTerminatePxiOccurredFATFSi_pc_chain_lengthFATFSi_build_chk_filePM_FlipHeartBeatPM_Initrtfs_get_next_cluster_cacheSVC_WaitVBlankIntrOS_SetIrqMaskExSDK_AUTOLOAD.WRAM.DATA_ENDFATFS_CloseFileFATFSi_pc_map_fat_blockCDC_SetIirFilterPM_AnalyzeCommandFATFSi_pc_write_blkFATFSi_pc_dos2inodeOS_SetIrqFunctionPAD_InitXYButtonFATFSi_PostRequestSPI_UnlockNVRAM_ReadSiliconIdFATFSi_unicode_compare_ncFATFSi_add_cluster_to_lost_listFATFSi__illegal_lfn_charOS_SelectThreadFATFSi_CommandDeleteDirectoryFATFSi_rtfs_set_errnoAES_RecvSDK_AUTOLOAD.WRAM.BSS_SIZESDCARD_V2FlagFATFSi_scan_crossed_filesMCU_CallIrqFunctionFATFSi_pc_memory_initOS_GetConsoleTypeRTC_ReadCounterOS_DisableIrqMaskExFATFSi_sdmc_intrq_arrayFATFSi_rtfs_po_openFATFSi_PXICallbackFATFSi_func_SDCARD_OutFATFSi_pc_zero_lfn_infoAESi_PxiHandlerOS_SetPeriodicVAlarmFATFSi_pc_init_blkFATFSi_fatxx_pfaxxtermFATFSi_pc_cppadOS_CancelVAlarmsSND_Init_start_LtdMainParamsOS_ResetRequestIrqMaskNitroSpStartUpFATFSi_auto_format_diskFATFSi_pc_finode_clusterSD_TransReadyFPGAI2C_InitFATFSi_pc_scratch_blkOS_RestoreInterrupts_IrqAndFiqFATFSi_pc_deleteseglistTP_InitSNDi_UnlockMutexMI_SwapWordSDK_LTDAUTOLOAD.RSVWRAM.BSS_ENDNAND_FAT2_SECTORSOSi_SetTerminatePxiOccurredSD_MultiWriteBlockFATFSi_pc_zeroseglistSNDi_DecibelSquareTableSND_StopChannelSDK_LTDAUTOLOAD.LTDMAIN.STARTFATFSi_CommandUnmountDriveFATFSi_rtfs_first_attachFATFSi_pc_freeiFATFSi_check_lost_clustersSDK_SYS_STACKSIZESDK_LTDAUTOLOAD_NUMBERSD_DeSelectCardSDK_AUTOLOAD_WRAM_ENDOS_BreakIrqHandlerCDC_PowerDownAudioADCPM_GetLEDPatternSND_UpdateExChannelSDCARD_AbortFATFSi_pc_delete_lfn_infoSD_EnableSeccntSD_AppOpCondOSi_DetectEmulatorCARDi_EraseChipCoreMI_NDmaRecvAsync_DevCARD_IsCardIreqLoFATFSi_pc_patcmp_vfat_8_3SDK_STATIC_DATA_SIZEOS_CheckHeapFATFSi_pc_isrootFATFSi_CommandMountSpecialFATFSi_InitRequestFATFSi_sd_intr_stackSD_SendOpCondFATFSi_GetCurrentFileHandlesFATFSi_pc_get_parent_clusterFATFSi_pc_parsedriveCDC_SetMicBiasFATFSi_sdmc_current_specSPIi_SetEntryFATFSi_pc_get_inodeAES_SetMacTPEX_SetConversionModeOS_SetCurrentHeapAESi_ReceiveDataSVC_SetSoundBiasMI_NDmaPipeAsync_DevFATFSi_file_adjusted_capacityRTCi_GpioStartFATFSi_pc_enum_fileOS_InitResetCDC_SetSpiParamsSDK_SUBPRIV_ARENA_LOSDK_STATIC_DATA_ENDOS_IsResetOccurredFATFSi_ulSDCARD_RestSectorCountOS_CreateAlarmFATFSi_rtfs_pc_gfirst_exOS_InitAllocMI_StopNDma_startsdmc_total_sectorsCARD_GetOwnRomHeaderTWLOS_IRQTableAES_SetCounterFATFSi_CommandSetNdmaParametersOS_SetIrqMaskFATFSi_pc_get_momFATFSi_sdmc_intr_tskFATFSi_pc_allocfileSVC_GetVolumeTableSNDi_SetTrackParamOSi_EnterTimerCallbackI2C_UnlockTPEX_SetStabilizationTimeSDK_STATIC_BSS_ENDNAND_FAT3_SECTORSPM_ExecuteProcessAES_SendSND_UpdateSharedWorkMIC_AnalyzeCommandCARDi_ReadRomIDCoreFATFSi_sdmcRtfsAttachCARDi_LockMutexForARM7FATFSi_lfi2textPMi_GetRegistersOrgVolumeAES_RandSDK_STATIC_SINIT_ENDCDC_GetMicBiasFATFSi_name_is_reservedPMi_DoExitSPIi_CheckExceptionOS_GetTickSD_port_numberFATFSi_rtfs_po_lseekFATFSi_ulSDCARD_SectorCountpc_get_inode_exMIi_NDmaConfigFATFSiComanndFunctionTableOS_SaveContextSNDEX_GetSamplingRateOSi_IsCodecTwlModeEXIi_SelectRcntFATFSi_fatxx_alloc_chainSND_PrepareSeqSDK_LTDAUTOLOAD_RSVWRAM_IDSDK_LTDAUTOLOAD.LTDMAIN.ENDSVC_ChangeSoundBiasSDK_AUTOLOAD_WRAM_BSS_SIZENVRAM_ReleaseFromDeepPowerDownAES_WaitCARDi_InitResourceLockNDMA_irq_HandlerSVC_CpuSetFastSNDEX_InitFATFSi_i_sdmcRemovedIntrFATFSi_pc_insert_inodeFATFSi_pc_init_drv_fat_info_start_BuildParams_isdcallmon_restoreProtect_twlOS_GetInitArenaLoCDC_GetSystemClockMIi_CpuRecv16FATFSi_pc_free_all_fat_blocksCARDi_InitRomOS_InitLockMIi_CpuSendFastFATFSi_init_fat12FATFSi_rtfs_pc_gdoneFATFSi_init_fat16AES_SetKeySeedASPIi_ReleaseExceptionFATFSi_CommandSetFileLengthCDC_SetSystemClockFATFSi_fr_DWORDFATFSi_pc_ascii_str2upperFATFSi_sdmc_result_dtq_arraySND_SkipSeqsdmcGetNandLogFatalFATFSi_pc_findinSD_SendCSDCDC_MuteAudioADCOS_IsAlarmAvailableFATFSi_CommandSearchWildcardOS_SPrintfSVC_DivSDK_LTDAUTOLOAD.RSVWRAM.TEXT_STARTSDK_LTDAUTOLOAD_SIZEFATFSi_sdmcRtfsCtrlMIC_SetIrqFunctionOSi_RemoveMutexLinkFromQueueSDK_LTDAUTOLOAD.RSVWRAM.TEXT_SIZEFATFSi_po_ulseekFATFSi_init_fat32FATFSi_CommandSetDefaultDriveFATFSi_thread_flagRTC_SetHourFormatSDCARD_TerminateForceFATFSi_pc_isavolOS_GetInitArenaHisdmcCacheReadAesFifoCDC_RestartRTC_ReadStatus2SD_TransCommandRTC_ReadStatus1FATFSi_pc_sec2clusterSVC_WaitByLoopPMi_BlinkPatternNoFATFSi_rtfs_pc_ertfs_configSDK_LTDAUTOLOAD.RSVWRAM.SIZEFATFSi_print_bufferOS_InitArenaFATFSi_rtfs_attachFATFSi_file_capacitySD_EnableClockSNDi_LockMutexTPEX_SetResolutionSDK_LTDAUTOLOAD.RSVWRAM.DATA_STARTOS_GetTickLoAES_UnlockTPEX_DisableNewBufferModeSD_OrFPGASDK_AUTOLOAD.WRAM.TEXT_ENDPXI_InitFifoSVC_GetPitchTableFATFSi_map_ascii_to_unicodeFATFSi_CommandSetFileInfoSND_SetPlayerGlobalVariableFATFSi_pc_report_errorFATFSi_fatxx_clgrowOS_UnlockMutexOS_InitAlarmOS_ReleaseLockIDCARDi_OnFifoRecvFATFSi_rtfs_strtab_user_stringFATFSi_pc_allocobjEXIi_SetBitRcnt0LFATFSi_sdmcSetAesCounterSD_port_en_numbersSDCARD_EndByDmaFlagSVC_IsMmemExpandedFATFSi_pc_clzeroFATFSi_rtfs_po_readSDCARD_EndFlagSD_EnableInfoSDNandContextSTD_CopyStringFATFSi_pc_cs_maliasSND_UpdateLfoFATFSi_glFATFSi_func_usr_sdmc_outSND_SetupChannelPsgFATFSi_pc_pfinode_clusterFATFSi_unicode_chr_to_lfnSDK_LTDAUTOLOAD.LTDMAIN.BSS_STARTNVRAM_PageProgramFATFSi_pc_flush_chain_blkCARDi_EraseBackupSectorCoreFATFSi_CommandOpenFilertfsi_pc_cache_clusterssOrgPanSD_INFO1_MASK_VALUEFATFSi_faxx_check_free_spaceMI_InitPMi_DoSleepSD_INFO2_MASK_VALUETwlSpMainSND_ExChannelMainFATFSi_CommandWriteFileAES_IsIFifoFullOS_DisableSchedulerOS_IrqHandler_ThreadSwitchOS_CancelVAlarmSND_StartExChannelPcmSVC_UncompressHuffmanFromDeviceFATFSi_pc_flush_file_bufferPMi_DoShutdownOS_CreateThreadFATFSi_pc_find_contig_clustersEXI2i_SetBitGpio2CntLSND_SetTrackAllocatableChannelEXI2i_SetBitGpio2CntHSDNEXi_InitializeSMIXSND_InvalidateSeqOSi_RescheduleCountMICEX_ExecuteProcessOS_SendMessageSND_SetupAlarmFATFSi_CommandSeekFileAES_RunPXI_SendWordByFifoFATFSi_pc_drno_to_drive_structFATFSi_devio_readSDK_STATIC_ENDFATFSi_rtfs_print_long_1FATFSi_pc_scaniFATFSi_rtfs_po_truncateFATFSi_pc_free_all_drobjFATFSi___mem_drives_structuresPMi_SetSoundPowerSND_SetChannelTimerCARDi_ReadBackupCoreSDCARDi_CpuReadFifoAesMI_StopAllDmaSTD_TVSNPrintfOSi_IrqNDma1OSi_IrqNDma0OSi_IrqNDma3OSi_IrqNDma2SDCARDi_CacheAccessCARD_SetThreadPriorityCARDi_TaskWorkerProcedureSDK_OVERLAY_NUMBERSND_SetExChannelDecayFATFSi_pc_cl2sectorRTC_IsAvailablePxiCommandFATFSi_rtfs_get_errnoFATFSi_pc_sync_file_bufferCARD_CheckPullOut_Polling$Ven$$SVC_GetPitchTableWRAMSTD_SearchStringOSi_NeedResetTimerSDK_STATIC_TEXT_ENDRTC_ReadAlarmEx2RTC_ReadAlarmEx1SND_CalcTimerOSi_IrqVBlankSND_SetMasterPanCalcSurroundDecayOS_InitContextOS_TerminateFATFSi_sdmcInitOS_DisableIrqMaskFATFSi_rtfs_cs_strlenOS_EnableIrqMaskSND_StartPreparedSeqSD_AppCommandFATFSi___mem_file_poolSD_SendSCRFATFSi_pcdel2lfiFATFSi_pc_grow_dirOSi_DequeueItemCDC_ReadSpiRegistersExOS_IRQTable2FATFSi_enabled_driversCDC_GetPGABCDC_SetPGABSD_SetBlockLengthRTC_ReadTimeCARD_CompareCardIDPMi_DoResetHardwareSD_SwapByteMIC_GetDelayIFSND_SetExChannelReleaseOS_CreateHeapSDCARD_Timer_irqSND_NoteOnFATFSi__po_ulseekCDC_BeginSleepSD_SetFPGASD_GetFPGAOS_LockCardFATFSi___mem_block_poolFATFSi_rtfs_po_closeFATFSi_nandRtfsCtrlOS_FPutString_ISDbgLib_Initialize_ISTDbgLib_InitializeOS_WakeupThreadOSi_SetTimerReservedOSi_CurrentThreadPtrPM_SetLEDPatternSDCARD_irq_HandlerCDC_InitLibSDK_LTDAUTOLOAD_LISTCARDi_InitCommandSDK_AUTOLOAD.WRAM.SINIT_START$Ven$$SVC_HaltWRAMFATFSi_twfs_pc_get_fatbitsSDK_LTDAUTOLOAD.RSVWRAM.IDMCU_SetIrqFunctionSDCARD_Intr_ThreadPMi_SwitchUtilityProcFATFSi_pc_unicode_byte2upperMICEXi_IsCodecAutoSamplingFATFSi_release_drive_mount_writeSDK_LTDAUTOLOAD_LTDMAIN_BSS_SIZEPXI_SetFifoRecvCallbackOS_EnableInterruptsFATFSi_pc_isdotdotFATFSi_fatxx_faxxSDK_LTDAUTOLOAD.RSVWRAM.DATA_SIZESDK_AUTOLOAD.WRAM.BSS_STARTAESi_InterruptHandlerFATFSi_rtfs_pc_diskflushFATFSi_CommandFlushAllNVRAM_ChipEraseMIi_NDmaAsync_withConfig_DevSVC_UncompressLZ16FromDeviceMI_StopDmaMICEX_AnalyzeCommandFATFSi___rtfs_user_tableFATFSi_sdmc_intrqSND_SeqInitSD_SendCIDFATFSi_pc_initialize_block_poolSDK_MOUNT_INFO_TABLESVC_GetSinTable$Ven$$SVC_ResetSoundBiasWRAMFATFSi_unicode_comparePMi_LEDStatusCARDi_InitTaskOS_ResetSystemtwfs_ismountednameRTC_ReadAlarm1RTC_ReadAlarm2SND_SetupChannelPcmRTC_ReadDateFATFSi_CommandOpenDirectoryAES_SetNonceFATFSi_pc_initialize_fat_block_poolOS_TryLockMutexFATFSi_rtfs_pc_mkdir_exdevio_fillFATFSi_fatxx_dSDK_LTDAUTOLOAD.LTDMAIN.BSS_ENDSVC_SleepFATFSi_pc_valid_ascii_sfnSND_StartExChannelPsgSDK_AUTOLOAD.WRAM.SIZEFATFSi_func_SDCARD_InFATFSi_nandAesRtfsIoSND_ShutdownSD_Command$Ven$$SVC_WaitByLoopWRAMFATFSi_pc_ltoaPMi_SetRegisterI2C_LockSDK_STATIC_STARTSDCARDi_AccesssdmcInitCacheMI_WaitNDmaPMi_BlinkPatternDataSDK_LTDAUTOLOAD.RSVWRAM.SINIT_ENDSDK_AUTOLOAD.WRAM.STARTFATFSi_sdmcInitAesCounterMI_SetNDmaWordCountCARDi_VerifyBackupCoreFATFSi_ConvertHandleToDirectoryFATFSi_rtfs_pc_gnext_exMMCP_WriteBusWidthFATFSi_string_tableFATFSi_pc_parse_raw_driveSVC_ResetSoundBiasOSi_TWarningSD_INFO1_VALUEFATFSi__po_flushMICEX_GetDelayIFNVRAM_PageWriteFATFSi_fatxx_clallocCDC_PowerUpAudioADCsdmcIsHitCacheFATFSi_FreeCommandBuffer|8H8 8$$8p58\B8 SP8fL8n8q8t8w8z8}888$8h8888888088(8h88L|<| PI}|8%|$04?MXX|e|r|P|X|(|D||||||P|@|0|| ||,| |5}||||I}||@|||||L|<|,||| | (|$5}||||"| /I}5hI | b |w0|`|,|@||D|d5}| |Ta|!`|$Z|'dZ|*T%|-4|0|3 6|9\a|<`|?Z|BlZ|E\%|H<|K|Nh|Q|T|W|Zp]|`pc|f|ilp|o||| |H|| | |  | | || ~$ t|L| ||l|<|t ~ I}(|||||||x|h|X|H| 8| (|||4|$|||!|$|'|*|-t|0d|3T|6D|94|<|?I}X|fd|i0|l|o|r|uH|x|{|~||4| |\|8||`|,|||||D||||t|0||T|J}>~ 0|||||$||||J} <~ <~ H|&@~ H|x[L|k|nP|qL|tH|w(|z|}|x|||@|`|||<||||x|t@~ |(@||K} J}K}|||4||h|||@| | |xx|"|%$|(|+\|.|1|4<|7H~ E|4XK}^D~ cD~ v|\~ t!|\ |X%|`%|D%|%|$|\$|T$|#||#|P#|"|"|"|!|t!|P!| T | |P|||x| ||!|x7|`ND%|a|HzP|%|%|@%|%|$|L$|#|"||"| "|!|p!|@!| ||L||!|@X~ H~ "|p$| l&|8&| %|#$K}?D~ i$K}o.}L~ .}|H~ <(|0(|4'| '| &| &| | 8(| (| 0'| &| &| P~ N 4'|a |d D~ i )|l (|o l(|r D(|u ,|x |,|{ `,|~ p+| T+| *| *| *| ,*| *| T+| L,| P+| *| |*| 4K} (K}  `,| ,| ,| ,| T~ .| (.| -| -| -| H-| -| x.| .| D-| T~  H-|<' LK}- 0|0 p/|3 .|6 .|9 L2|< 0|? l/|B .|E X~ J K}P hK}V K} \ K} b ~ ~ 2|t 3| x3| d3| 2| 2| K} |~ K}  K} 4| 3| \3| 2| 3|$ x3| d3| |~  ~ 1 ~T ? ~ S 5|V ~ h <5|k ~ p ~ | 6| (6| 5| 5| @5| 6| 6| 6| 5| 5| 5|d ~ :| 7|  :| :| :| :| |9| 8| 7| 7| 7| x7| 6| x;| :| 9| t9| 8| 7| 7| h7| K}  K}# ~ 0 ~ ? ~ D 6|Q t<|8b 0L}h ~ { ;| L} L}  ~ l@|@ l@| >| H>| >| =| h=| <| <| t<| ;| ;| ;| @| \@| >| =| =| X=| <| p<| ;| ;| ~  >| h=|\, ~ 1 ~ ? $A|B A|E A|H @|K @|N @|Q @|T 8A|W LA|Z <|@I,~ N,~ ^|a@|d|g|j|mȍ|p|s|v|yH~ ~||Џ||||| |ȏ|||)~  @|Ԑ|||,|Đ|@|L)~ )~  |d|| l| |`|H|,|h| ||"|%|h5|8|;\|>|A\|DD|G`|J|M|P*~ X *~ ] *~ l$|D}$|||X||||.~ h||$|| ||||||L}P0}̥|||4||||L} l|||D|<P0}5L};L}A$|D|G Yب|\ |_.~ m.~ r.~ 4|||@|0| |.~ h=} D=}$ D|8PP} ;}"(6LC8SdcLP} rHP} ?}H?}>}=}=}t=}h=}D=}<}D|;};}?}0?}>}=}=}p=}`=}0=}<}=}(t=},<} |'|X<|?D|B|E||H,|K@|NԪ|Q.~  d.~ xD|H.~ /~ /~ 3~ 3~ ,|$3~ Ա| |#|&P|),|,8|/4|2|5|8|;L|>|AԱ|dQ3~ V8|f@|t|$HM}8M}$|@||8|||<||4~ 4~ 4~< ؼ|||||\| ||40|м|||||L|ؼ|h 4~ | 4~ *4~ 04~ 94~ B4~ G|JP|M@|P|S||V8|Y4~ ^P|0s4~ {|~|||||||||4~ ||||||||4~ (||D|$||h||p|P||d|X0}l|XY0}9dM}?dM}LL|daZ0}||4X0} |@|H:~ |l||4|||<|| x|||L|||l| `|# |&|) |,|@? |P`| `:~ T||d||(|||0||p|||H|||X|\|||:~ `|||(||`|:~ |D|||| :~ %x|,<hM}BhM}h|kx|n|q|t|wp|z|}|:~ |M}lM}:~ D:~ |@M}|<:~ IM}OM}U|X|[P|^|a|d|g|jM}@:~ |||H||||4:~ H:~, 4:~ 8:~ M}5 \P} ; A},K B}hW $|A$|D$|G$0|J$|M$|P$|S$M}e$:~ t$N}$|$|$T|$p|$|$h|$|$|$|$M}$:~ $x|0$;~ $`N} $|X$;~ %`N} %;~ %|$%|L2%||C%|Q%|li%(;~  v%;~  %|N}%lN}% ;~ %|%|%|%|%|%|%|%4|%|%|%H;~, %;~ %|%|%t|%x|%|%0|%|%;~ &|<&t;~ *&<~ >&;~ M&;~ R&;~ [&;~ o&N}&N}&N} &|&|&|&|&N}&|&|&|&t|&X|&<|& |&|&|&|&|&|&P}&|&|&|&p|&T|&8|&|&|&|&|&|&l}'}'}|,'}/'l}2'}5'}8'};'T}>'}A'}D'L}G'}J'p}M'N} S'N}Y'O}k'@O}-q'4O} w'N}}' }'D }' }'}'pO}8'N}'0}'D }'t }' }'l }'>~ '>~ 'P} 'XC}'|P} 'P}  (pQ} (E}4(E} )(E}8;(P}  H( G}K(G}N(E}Q(E}T(E}W(\E}Z(E}](D}`(D}c(hD}f(\C}i(tP} x(0G}{(G}~(F}(E}(E}(XE}(D}(D}(DD}(xP} (G}(\E}0(pS} (4G}(O}(O}6(G}((>~  (`}$)} )})`})T}) })l })}X2)}5)L}8) };)}0R)(>~ W)}$e)L}$r)t}u)}x)}{)l}~),})})$})(}),})(})})})})p})L}) })})l})})})d})$})})}) })$})$})})})})l})D})}@)#}p)O})d>~ )#})H#}*}*}*} *0} *}*P}*}*#}*8#}*}*$}"*}%*(}(*H>~ 7*H#}D*}dN*L>~ W*}f*H>~ k*d,}n*+}q**}t* I}w*H}z*H}}*H}*0H}*G}*G}**}*h*}*0*}**}*)}*)}*h)}*<)}*(}*t(}*(}*'}*4'}*&}*&}*h&}*<&}*&}*%}*$}*L$}*d,}\*+}**}+4.}+-}+4-}+-}+,}+ +t#+&+)+p,+Љ/+2+|5+H8+؈;+>+TA+؇D+(G+ J+M+PP+ԈS+V+ԇY+$\+_+ e+ġh+Hk+n+tq+t+w+z+t}++t+4++8+h+d+++<++\++ ++h++d+0+ȑ+4+d+P+p++8++ܡ+4+l+4+ +H+8+++l+, ,\ ,,,ȱ,,,T!,$,t',\*,8-, 0,3,p6,9,<,?,ȶB,|E,̵H,K,pN,@Q,̳T,f,Ly,,,,,D,4,,,,,,,,,T,,4,,,Ժ,8,@, ,,,,(,(,,0,, ,к,$, ,@,p8---p-"-p%-(-+-l.-1-\4-7-:- =-@-XC-F-I-lDb-u-x-{-~--\----X----X- ------P-,--p-p-l---(-(----l---8--D-4--`... .t ..d....8.!.4$.l'.D*.-.0.43.6.@9.<.\?.B.E.@H.@K.N.Q.XT.W.Z.<].`.c.Tf.i.8o.8u.H{...`&..... .4.$...L. .` .( . .p ...|..P...`.X.h.. /0 / /H / ////// / "/ %/| (/ +/ ./p 1/4 4/$7/$ :/ =/ @/ C/| F/8 I/tL/|$O/#R/t#U/@#X/ #[/"^/ "a/!d/t!g/ j/Pm/p/s/v/y/|///H/X//x/p"/H// "/t/0&/%/P%/p&/,&/'/4'/t&/('//(p/(/4(/0(/ (/(/(/'/,(/(/(/(/h)/+/010,0+0,1 0, 06$07860X@\O0 AR0@U0X@X0$@[0P?^0?a0;d0:g09j08m07p0 7s06v06y0x6|05040x40 40 0T3020202090t605040t40D 040P306L00H0@G0=x E=L=dS=ho= =5= ==(H=5==P=<=|=$ >O>p V>Lr>y>&>x >>>ld>8>H> 8>>T>>|>0???4 ? ?H??t??$8/? 84?@8,B?<lW?H d?g?j?m?p?<s???????L???T??Hi?8?8?,???|?l?\?8?????x?$@@@ @| @D@(@@@x@h@X"@4%@(@+@.@1@t4@ 7@:@=@@@LiO@`iX@L^@hid@k@@P<@|( @H@xk8@(@i@li@i@*@*@\*@)@(@|(@!@ AAA A AAPALA!l#A 82AXi@APiIA*LA*OA*RA)UA(XA@([A ^AaA dAgAioAi xAdiADA\iAATiA|iAxjA4,A+A(+A*AP,AT,AAAAxA(iABxB BB,i(B(i-B 0B 3B 6B pOB RB UB XB [B ^B aB rB uB B4iB_PR_Hi__$_M|X_|(_|$__*|D_3`\-`O`XE|\Z`;|Dh`|x`T,<`jt``C|d`|`\$|`tjt`a<|a@|7an|Oacasa@aP0a$@4a;}ak|ab` 8bd-b0Hb$A|]bD}@jb@}}bx|XbbN|Lb |b| bF~ bR4 c,ck| 3clTRci occ|8c|cccTcu|0 dt| d`J1dP#|,Gd\|]d|sdAPd,dHF|dhm$d*@dp}( dp ek}( !e8eZeP}pe4eg}( eE<ec}( ee} fp_}( fH[}( -f W}( Cf`x}( Yf8t}( ofܡ<f4f|f0i ffdfLlg#g 8}d:gH@Og#eg^|`{gHv|xg| |g4gtgt}@g|g4'}ph:|h.}'hTb|H>hh)PSh<rh|h|\hxhjthHhi,| ix$i|d-i.}Gi%ei|ni&|di i| i|i8}hi,ixj8+jzGj̵\j,uj|j,j |Pj| jPpjP`j(}hk(}lkdd|$k.~ 4k|Bk|HSkXikP{kd|PkTdtkchk;|k$|k(Pk'4kЏ|@ lhT liL.l<Dl0&D[l4wl~ l|ld|4lll| lȱ,l , m&m4 <Bm|Umlm 7m Amtmx:}<m0qHmZ| mHn(hn|-n(>n}Tn|$kn:@nnP%\n |ntn|$n nu o3}&o|.oPo$}`oX8wo,otot<o@5|toT$|o |o}oP|o[p %pG}H2ptGpH|,Sp.~, \p$npľ ~p*}8p~ p| pVpP!|$p p| 8qD(|(%q  Aq XTqPK|$hqdzq40q5|q <qDq$|qu|\q`q( rB~ r0rJrx4`erX$urr`|r|rKHrr,*|Tr0r I}8 sH}8s|,*sp|P:s( 8Ps4cs4|ns| ~sLy|Ds4s s&}8shhssuP| Ruhu`^||u0uul| uu&}hu-|uu|v| v2vt~ Fv(Zv?}tpvXlv8vHvt ~ v|0v|,v vP wo|4 w0*}80w8AwY|Ww9} ewt&vwL~ wS} wS} w|wpLw)}8xS} x,T} |a|hL80|4,8;4'S|lx~ @}4 4XA|PLԅ8|܅b| I|(+|G||Zp(/}0]|((ц8t ' >8dNP} dL|(w|4|d|ԒXه4'|, l|\8}h2|,DT^s0|\t Ԉ<`0pt1|,@04Y|gl{$T| .|4(+|щT9}h,}@'A|84|8EmZ8n|l ~ 7|4RɊ.|֊:}<8|| PJ} (/ 4O|4]4xo,,d|y||HՋ@}4X|8 |h1\:|O\|b(|lvt|<l |tÌ~ Ό\*X׌8|(|L>},|2(6|=Lad ~ }UP}@ 8&|4ƍ|8܍LA|DY|xp|s|'B,^|r l}@,|(̎Tݎ ||,p'XC8 Vu(.|X|4dF|P?Ə|ԏ@|xF|Tt#4 @#4)(9`|<OkH|~  8DŐv|ѐ`8l`d|7|&LC||,N|Vy(|(x|0ґx #4`5(H$}HZ,pl-||ntX|)},ĒԒ<)},H4| .~ 88xUi -|<vMb|<|ϓx6|* |$p4.3}IJ|VL|h$0H| D,єH*|x7|@|0|#BDUX| gpD$,|؇|˕ԺDߕPМ0 L|, -xp|l;,$E^[|r,Ȗ(}ږ84| 'XT?~ G\ ~ ["lxI|$|T ~ |f|xԗ| `%|4t|$>|H#4j|<9<|Yu̥|<T |01\,Y| ɘw|pY|4|dx|&P~ :}8Ol(|^|dmdtK|4T4Й8ߙ(`  D`9}+ X||Pj]|~|lF|,xN|h ǚ|Ԛ|(||o|D&|P@ Sk|i,}0}xCTț|`| XM|`~ "86H},GH},X_|f|Pt|^|dP_|l%|lB|rLÜ|<՜ ,H|8u| hhU} 6xA,$Rxe,|$ud|,J}< ||ȝТڝh&},P|=} | )k|Ap/|O`|Hk4}|L,0|t}0* ƞT۞ J}p("||85|$MH~ b|s| (|(3}ןT%| H[T hD},3TtF|\8 Dy}0\L A֠K|L@|\LP'IP} eH{pP}@6}Xء8|E|hT}4T}| . @q|dL`W9wB~ H|dZ|  $ТL}ޢp|$A|Lc4'}dt(}`-[|A<&},NHj$w?@*||^tãΣt(ݣm|H!pj|L7PN dyY|T4| \|XɤT@}0Ҥ8Lm9}4 L}!xC|[ou:}|LXS$إ|H@0 |,|x9P ~ H8YD }<j,}zXD|hm|,$ > .;:I? @C%I!/ I.;:I? @I;:I? 4;:I?  8I     8II (II I  |8h8initScfg.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\void|8h8"]INIT_InitializeScfg 8L8crt0.LTD.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\ARM7.TWL\src\5[L8_start_LtdMainParams5rP8microcode_GotoMainw5X8_start_LtdModuleParamsg58_start_BuildParamsX5*p8_start_ModuleParams5A8microcode_ShakeHandlunsigned longvu32REGType32__file_handlesize_tfpos_tREGType32vu32  $$;( Xint^BOOL^mbstate_t8|85]_starth8$8k5]INITi_DoAutoload$885]INITi_ShelterLtdBinary88J5]_start_AutoloadDoneCallbackjK5Rargv88V5]NitroSpStartUp88h5^]INITi_IsRunOnTwl885]INITi_CopySysConfig885]INITi_DetectMainMemorySize!885]INITi_Copy325(dst5,src50size8L8'5]INITi_Fill32(5(dst(5,value(50size.|| main.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\V PstrMemMAINW 8XstrMemWRAMU I`strARM7X ZhstrFailedCreateHeapY kstrHeapSizeIs,char,,,,long|vs32|fx32|s32^OSHeapHandleunsigned shortMATHCRC16Contextvu16MATHChecksum8Contextwctype_tMATHChecksum16ContextGXRgbREGType16PMBatteryLevelwint_tREGType16vGXRgbaWint_tOSBootTypewchar_tu16unsigned charREGType8REGType8vu8MATHCRC8Contextvu8MINDmaDeviceMATHCRC32ContextFATFSDirectoryHandleOSIrqMaskFSCommandTypeFATFSSeekModeCARDEventFATFSCommandIDOSIntrModeFATFSMediaTypeFSEventFATFSResultPMWakeUpTriggerFATFSFileHandlePMLogicFSOverlayIDVecFx10 NVRAMConfigEx V ncd psaveCount rcrc16 tncd_ex crc16_ex NVRAMConfigExpNVRAMConfigData version pad  owner R alarm Xtp doptionV NVRAMConfigDataPNVRAMConfigOwnerInfo favoriteColor rsv  birthday pad  nickname  comment NVRAMConfigOwnerInfoNVRAMConfigDate month day NVRAMConfigDateNVRAMConfigNickname p str length rsv NVRAMConfigNickname 6NVRAMConfigComment str 4length 5rsv NVRAMConfigComment4NVRAMConfigAlarm hour minute second pad enableWeek  alarmOn rsv NVRAMConfigAlarm NVRAMConfigTpCalibData raw_x1 raw_y1 dx1 dy1 raw_x2 raw_y2 dx2 dy2NVRAMConfigTpCalibData NVRAMConfigOption language  agbLcd  detectPullOutCardFlag  detectPullOutCtrdgFlag  autoBootFlag  rsv input_favoriteColor input_tp input_language input_rtc input_nickname timezone rtcClockAdjust rrtcOffsetNVRAMConfigOptionlong longrfx64rvs64rfx64crs64NVRAMConfigDataEx version language valid_language_bitmap CpaddingNVRAMConfigDataEx || ]TwlSpMain||n|]GX_VBlankIntrn^Penablen|Prval||^]OS_EnableIrq"Pprep| |B]OS_HaltD ]PrintDebugInfom5}(5}D ]InitializeFatfs |,| ^]InitializeAllocateSystem PmemType ^Phh,|| ^]InitializeAllocateSystemCore TmemType TheapSize j Phi p Plo YheapSize v Phi | Plo ^Whh| | ]OS_GetSubPrivArenaLo || ]OS_GetSubPrivArenaHi!|0|[v]MI_CpuClear8o[v Pdest[vPsize0|@| ]OS_GetWramSubPrivArenaLo@|P| ]OS_GetWramSubPrivArenaHiP|| ]ReadUserInfo> PallowedChannel= enableChannel0  wMac |Vi  Pp |Pcheck   temp |offset||Yv]MI_CpuCopy32 YvTPsrcYvZPdestYvPsize||lv]MI_CpuClear32Xlv`PdestlvPsize||Fv]MI_CpuFill32FvfSdestFvPdataFvPsize||W ^]IsValidConfigExY ipl2_type|D|s ]GetRomValidLanguageTv PlangBitu PretD|| |]CheckCorrectNCDEx lZncdsp Prom_valid_language |Wcrc_flag Pcalc_crc Vi|| ]VBlankIntrS ||0os_irqHandler.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7.TWL\src\t ~OSi_IrqThreadQueue"| ~breakCtx_OSThreadQueue Hhead HtailOSThreadQueueN_OSThread context Hstate LHnext Pid Tpriority Xprofiler \"queue `(link htmutex l-mutexQueue tstackTop xstackBottom |stackWarningOffset joinQueue yspecific alarmForSleep destructor userParameter ^systemErrnoNOSThreadHOSContext cpsr r 8sp <lr @pc_plus4 Dsp_svcOSContext4 @enumOS_THREAD_STATE_WAITINGOS_THREAD_STATE_READYOS_THREAD_STATE_TERMINATED_OSThreadLink Hprev Hnext(OSThreadLinkzOSMutex queue Hthread |count linkzOSMutex_OSMutexLink tnext tprevOSMutexLink_OSMutexQueue thead ttail-OSMutexQueue ,OSiAlarm Bhandler arg tag Ufire prev next Uperiod $UstartOSAlarmHunsigned long longUvu64UOSTitleIdUREGType64UREGType64vUOSTickUu64$ |L|-]OS_IrqHandler L|t|]OS_BreakIrqHandler; t||]OS_IrqHandler_ThreadSwitchp |8|Nos_irqTable.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\!I}OSi_IrqCallbackInfoIndex!J}OS_IRQTable2]!PJ}OS_IRQTable! ~OSi_IrqCallbackInfo <!!!!/"   G"func enable Z"arg!OSIrqCallbackInfoM"Z"f"@no_name@}""||]OS_IrqDummy"|(|]OSi_IrqCallback#^Pindex`"PcallbackTimask(|8|&]OSi_IrqDma0E#8|H|,]OSi_IrqDma1k#H|X|2]OSi_IrqDma2#X|h|8]OSi_IrqDma3#h|x|G]OSi_IrqTimer0#x||M]OSi_IrqTimer1$||S]OSi_IrqTimer2/$||Y]OSi_IrqTimer3W$||m]OSi_IrqVBlank$o"Pcallback||]OSi_IrqNDma0$||]OSi_IrqNDma1$|(|]OSi_IrqNDma2 %(|8|]OSi_IrqNDma33%b8||amos_interrupt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\%/"%%@no_name@&&@no_name@/&8|\|']OS_InitIrqTablee&\| |<]OS_SetIrqFunction&<PintrBit<%Pfunction?%Yinfo>^Xi |4|r]OS_SetIrqFunctionExN'rPintrBitr%Pfunctiont^Si4||]OSi_EnterNDmaCallback'PdmaNo%Pcallback &Parg||]OSi_EnterTimerCallback-(PtimerNo&Pcallback5&Parg||3]OS_SetIrqMask(3Tintr6Pprep5^Pime||^]OS_DisableIrq(Pprep|H|>]OS_SetIrqMaskEx-)>TintrAPprep@^PimeH||Q]OS_EnableIrqMask)QTintrTPprepS^Pime||[]OS_EnableIrqMaskEx)[Tintr^Pprep]^Pime||n]OS_DisableIrqMask\*nTintrqPprepp^Pime|0|x]OS_DisableIrqMaskEx*xTintr{Pprepz^Pime0|d|]OS_ResetRequestIrqMask-+TintrPprep^Pimed||]OS_ResetRequestIrqMaskEx+TintrPprep^Pime+|`|os_pxi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\<~OSi_IsResetOccurred>~OSi_IsTerminateOccurred||$^]OS_IsResetOccurred,||5^]OSi_IsTerminatePxiOccurred,||C]OSi_SetTerminatePxiOccurred-|0|U]OSi_CommonCallbackp-UPdataXPcommand0|`|]OSi_SendToPxi-PdataVpxi_send_data`||ժos_spinLock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\^@~isInitialized.OSLockWord lockFlag ownerID extension.OSLockWord/.&/.8/`|4|R]OSi_SyncWithOtherProc 0R^PtypeR.VsyncBufj^Usum[^UnW.PpconfV.PpfinishU.Pptr2T.Pptr1@||]OS_InitLockD08Ptype||q|]OS_LockByWord0qXlockIDq.Wlockpq/VctrlFuncp|x||]OSi_DoUnlockByWord61PlockID/Xlockp /WctrlFuncp^VdisableFIQx|||]OSi_DoTryLockByWord1YlockID,/Xlockp2/WctrlFuncp^VdisableFIQ|TlastLockFlag|||]OS_LockCard2PlockID|(||]OS_UnlockCardT2PlockID(|H||]OS_TryLockCard2PlockIDH|L|]OSi_AllocateCardBus2L|P| ]OSi_FreeCardBus2P||A|]OS_GetLockID3||]OS_ReleaseLockIDS3PlockID$||uos_printf.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\y4D~OSi_FPutStringHookw4J}OSi_FuncTerminatev4J}OS_FPutStringu4J}OS_PutString/4H~common_buffer4^^4,44^444,,,,,,,,,,, s x5c@5OSPrintWChar,5 in out 5buffer5OSPrintServerBuffere5,,|@|]OS_PutStringDefaultC65Pstr@||]OS_FPutStringInit6^Vconsole 5UstrPconsoleTypeTintr||]OS_FPutStringDummy7^Pconsole5Pstr|h|]OS_FPutStringISTDp7^Uconsole5Tstrh||]OS_TPrintf75fmt|4|]OSi_TWarning 8"5Sfile^Pline(5fmt4||]OSi_TPanici8.5Ufile^Tline45fmt|||]OS_FPutStringPrnSrv09^Pconsole:5PstrUisOddTout^in_tmp\ine5word5Sp|||^]OS_SPrintf{95Pdst5 fmtG|%| os_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\T;H~OSi_CurrentThreadPtrk;L~OSi_StackForDestructoraP~OSi_RescheduleCountX^T~OSi_IsThreadInitialized(X~OSi_SystemStackBufferh^\~OSi_ThreadIdCount^;`~OSi_SystemCallbackInSwitchThreadQ;d~OSi_ThreadInfo[<t~OSi_IdleThreadStackNN~OSi_IdleThreadMN~OSi_LauncherThread;NNz;OSThreadInfo isNeedRescheduling irqDepth ;current ;list ;switchCallback;OSThreadInfo!NNNNNNNNN-zzNNNNNNNN;N@=@no_name@W=N;NNNNNNNNNNN=N=;;==OSThreadResource ^num>OSThreadResource| |]OSi_InsertLinkToQueue><Pqueue<Pthread<Rprev<Sprev<\next |x|<]OSi_RemoveSpecifiedLinkFromQueuet?<Pqueue<Pthread<\prev<Snext<Rtx||,;]OSi_RemoveMutexLinkFromQueue?,<Pqueue2<Pnext.<Rt||t]OSi_InsertThreadToListL@t<Pthreadw=\prev =St|P|]OSi_RemoveThreadFromList@=Pthread=Rpre=QtP||]OSi_RescheduleThread/A"=WnextThread(=VcurrentThread.=Uinfo|T |]OS_InitThreadWAT |P!|j]OS_CreateThreadBj4=Ythreadk:=Vfunck]=Xargkc=Wstackk stackSizek$priooPenableP!|t!|]OS_ExitThread:Bt!|!|]OSi_ExitThread_ArgSpecifiedBi=Uthreado=Targ!|"|]OSi_ExitThread Cu=Parg{=Pdestructor=PcurrentThread"|"|]OSi_ExitThread_DestroyWC=TcurrentThread"|"|]OS_SleepThreadC=Vqueue=UcurrentThreadTenable"|P#|]OS_WakeupThreadD=VqueueUenableP#||#|]OS_WakeupThreadDirectuD=UthreadPenable|#|#|;]OS_SelectThreadD =Pt#|T$|g^]OS_SetThreadPriority?Eg=WthreadgVpriokUenablej=Tprei=XtT$|\$|]OS_GetThreadPriorityE=Pthread\$|$|]OS_SleepEUmsecUbak_cpsr=p_threadalarm$|%|]OSi_SleepAlarmCallbackrF=Parg=Pp_thread=Ppp_thread%|D%|=]OS_SetSwitchThreadCallbackF=UcallbackPenabled>TprevD%|T%|]OSi_IdleThreadProcG`%|%|!]OS_DisableSchedulernG$Tcount#Penabled%|%|9]OS_EnableSchedulerG<Tcount;Penabled%|&|" os_context.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\%|8&|$]OS_InitContextH%bHPcontext&Qnewpc(Rnewsp8&|l&|^^]OS_SaveContextI^hHPcontextl&|&|]OS_LoadContext\InHPcontext&|D(|'+os_emulator.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\D~OSi_PlatformH~OSi_EmulatorL~OSi_IsDetectedEmulatorP~OSi_IsDetectedPlatformU$K}OSi_RunningConsoleTypeCacheJ.}table&|&|4]OS_GetConsoleType K&|'|V]OS_GetRunningConsoleTypeWKaPemulator'|4'|]OSi_DetectEmulatorK4'|0(|]OSi_DetectPlatformK0(|<(|']OSi_DetectDebuggerK<(|D(|^]OSi_IsRunOnTwlLsD(|*|JIos_message.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\L OSMessageQueue queueSend queueReceive fMmsgArray |msgCount |firstIndex |usedCountLOSMessageQueue`MrMLLMLMD(|l(|!]OS_InitMessageQueueN!LPmq!lMPmsgArray!|PmsgCountl(|(|7^]OS_SendMessageN7xMVmq7~MUmsg7|Wflags9Tenabled(|)|d^]OS_ReceiveMessageOdMVmqdMUmsgd|WflagsfTenabled)|*|^]OS_ReadMessage~OMWmqMTmsg|VflagsUenabled*|,|wgos_mutex.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\zzzNzNzzzNzzNzzz*|,*|%]OS_InitMutexP%PPmutex,*|*|8]OS_LockMutexQ8$PWmutex;*PVcurrentThread:Ue*|*|V]OS_UnlockMutexZQV0PPmutex*|*|d]OSi_UnlockAllMutexQd6PUthreadfZ]OS_InitAlloc]]>UWid>[UarenaStart>[TarenaEnd>^VmaxHeapsX[PhdCPenabledB^WiAQarraySize@[PheapInfop/|0|^]OS_CreateHeap!^UTid[Vstart[UendPenabled[Pcell[Phd^Theap[^heapInfo0|2||]OS_CheckHeap^UWid^XheapWenabled|VretValue|Ufree|Ttotal[Pcell[Rhd[SheapInfo2|5|os_exception.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\5_`|~OSi_UserExceptionHandler6~`~OSi_UserExceptionHandlerArg<~OSi_OriginalHandler9`~OSi_DebuggerHandler2`~OSi_ExContexte`x`T context Hcp15 Lspsr Pexinfo`OSiExContext2|2|r]OS_InitExceptiona2|d3|.]OSi_ExceptionHandlerKad3|x3|l]OSi_GetAndDisplayContext~ax3|3|]OSi_SetExContexta3|5|]OSi_DisplayExContexta^Xi5|@5|os_timer.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\~OSi_TimerReserved5|@5|D]OSi_SetTimerReservedbD^PtimerNum@5|6|;os_tick.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\~OSi_UseTick$^~OSi_NeedResetTimer!U~OSi_TickCounter@5|5|7]OS_InitTickd5|5|[^]OS_IsTickAvailable?d5|(6|j]OSi_CountUpTickid(6|6|U]OS_GetTickdUprevUcountHcountL6|6|]OS_GetTickLod6|;|<os_alarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\~OSi_UseAlarm e~OSi_AlarmQueueOSiAlarmQueue fhead ftailffffOSAlarmResource ^numfOSAlarmResource6|x7|7]OSi_SetTimerEg7!fUalarm;TtimerCount:UPPtick9rPPdeltax7|7|f]OS_InitAlarmlg7|7|^]OS_IsAlarmAvailableg7|7|]OS_CreateAlarmg'fPalarm7|8|]OSi_InsertAlarmmh-fYalarmUWXfireUPPtick3fSnext9fPprev8||9|]OS_SetAlarmh?fXalarmUVWtickEfUhandlerKfargPenabled|9|:|B]OS_SetPeriodicAlarmiBQfYalarmBUWXstartBUUVperiodBWf$handlerC]f(argEPenabled:|:|m]OS_CancelAlarmjmcfUalarmpTenabledoifPnext:|:|]OSi_AlarmHandler[jofarg:|;|]OSi_ArrangeTimerjufVhandler{fPnextUPPtick;|@|c\os_valarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\$~OSi_UseVAlarm(|~OSi_PreviousVCount'|~OSi_VFrameCount k ~OSi_VAlarmQueueOSiVAlarmQueue &lhead imtail,l(OSiVAlarm mhandler 0marg tag frame 6mfire 6mdelay cmprev cmnext ^period ^finish $^canceled,lOSVAlarm#m0mshort6mvs166mfx166ms16,l,l,l,l,l,l,l,l,l0m,lm,l,l,l,l,lmOSVAlarmResource ^nummOSVAlarmResource;|;|V]OS_InitVAlarmDn;|;|^]OS_IsVAlarmAvailablesn;|t<|]OSi_InsertVAlarmnomPalarmum\next{mPprevt<|<|]OSi_DetachVAlarm?omPalarmmRnextmQprev<|<|!]OS_CreateVAlarm~o!mPalarm<|h=|s]OS_SetPeriodicVAlarmEpsmXalarms6mWcounts6mVdelaysmUhandlersm argw|PcurrentVFrameuTenabledh=|=|]OSi_SetNextVAlarmpmUalarm=|>|]OS_SetVAlarmTagpmUalarmTtag>|H>|]OS_CancelVAlarm,qmUalarmPenabledH>|>| ]OS_CancelVAlarmsq Wtag$mPnext#mPalarm"Uenabled>|l@|I]OSi_VAlarmHandlerrO|XcurrentVFrameLmXhandlerl@|@||]OSi_GetVFrameZr|UvcountPenabled@|rsv1 vOSBootInfo  basic supportPsrcpQdestpRsizeF|F|X]MIi_CpuClear32XPdataXQdestpXRsizeF|F|o]MIi_CpuCopy32o$Psrcpo*QdestpoRsizeF|F|]MIi_CpuPipe32i0srcp6QdestpRsizeF|G|]MIi_CpuSendFastΟ<PsrcpBQdestpRsizeG|G|]MI_CpuFill8.HPdstpQdataRsizeG|H|x]MI_CpuCopy8xNPsrcpxTQdstpxRsizeH| I|^]MI_CpuComp84ZPmem1`Pmem2Psize^Pdf\p1endlPp2rPp1 I|I|mi_swap.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ I|I|+]MI_SwapWord$+PsetData+͡QdestpImi_uncompress.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ srcNum srcBitNum destBitNum destOffset destOffset0_onâMIUnpackBitsParammi_stream.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ initStream terminateStream readByteStream readShortStream readWordStream MIReadStreamCallbacks|ؤޤޤ|ؤؤؤ#ؤI|,I|mi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\I|,I|!]MI_Initkmi_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\MICache pagewidth Evalid Einvalid Eloading ^valid_total ^invalid_total ^loading_totalMICacheK MICachePage Enext offset bufferKMICachePage MIDevice userdata Read 5WriteMIDevice^  ;^  W,I|J|pad_xyButton.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pad\ARM7\src\^8~PADi_XYButtonAvailable<~PADi_XYButtonAlarm,I|I|)^]PAD_InitXYButtonpI|J|X]PADi_XYButton_Callback]UfoldJ|J|Npxi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\J|J|)]PXI_InitsJ|L|pxi_fifo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\h~FifoCtrlInitUl~FifoRecvCallbackTablefl^@enumPXI_FIFO_TAG_EXPXI_FIFO_TAG_USER_0PXI_FIFO_TAG_USER_1PXI_FIFO_TAG_SYSTEMPXI_FIFO_TAG_NVRAMPXI_FIFO_TAG_RTCPXI_FIFO_TAG_TOUCHPANELPXI_FIFO_TAG_SOUNDPXI_FIFO_TAG_PMPXI_FIFO_TAG_MIC PXI_FIFO_TAG_WM PXI_FIFO_TAG_FS PXI_FIFO_TAG_OS PXI_FIFO_TAG_CTRDG PXI_FIFO_TAG_CARDPXI_FIFO_TAG_WVRPXI_FIFO_TAG_CTRDG_ExPXI_FIFO_TAG_CTRDG_PHIPXI_FIFO_TAG_MIPXI_FIFO_TAG_AESPXI_FIFO_TAG_FATFSPXI_FIFO_TAG_CAMERAPXI_FIFO_TAG_WMWPXI_FIFO_TAG_SCFGPXI_FIFO_TAG_SNDEXPXI_FIFO_TAG_SEAPXI_MAX_FIFO_TAG l@enumPXI_PROC_ARM9PXI_PROC_ARM7 e raw^PXIFifoMessage tag err data@enumPXI_FIFO_SUCCESSPXI_FIFO_FAIL_SEND_ERRPXI_FIFO_FAIL_SEND_FULLPXI_FIFO_FAIL_RECV_ERRPXI_FIFO_FAIL_RECV_EMPTYPXI_FIFO_NO_CALLBACK_ENTRYJ|K|(]PXI_InitFifo+Tenabled*^RiK|PK|]PXI_SetFifoRecvCallbackg^Tfifotag#UcallbackPenabledPK|tK|^]PXI_IsCallbackReady^Pfifotag)PproctK|K|^]PXI_SendWordByFifo?^PfifotagPdata^PerrfifomsgK|L|]PXIi_SetToFifoUdataPenabledL|L|*]PXIi_HandlerRecvFifoNotEmpty .Ptag-Pret_code,fifomsgL|PN|m%std_string.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\,,,,,,,,,,,,,,L|M|-]STD_CopyStringa-Pdestp-Psrcp/SretvalM|XM|i^]STD_CopyLStringiPdestpiŲPsrcpi^Psiz˲Ts^^iXM|M|]STD_SearchStringVѲPsrcpײPstr^\n^PiM|M|;^]STD_GetStringLength;ݲPstrg^RnM|N|^]STD_CompareStringPstr1Pstr2N|PN|6^]STD_CompareNString6Pstr16Pstr26^Plen^^d^\c~^SiPN|X|Cstd_sprintf.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\,,,,,,,,,,PN|xN|t^]STD_TSNPrintft.PdsttPlent4fmtv^PretxN|X|^]STD_TVSNPrintfJ:dstlen@ZfmtFvlist^Pn_pad^Pd^PdUPPr^PdPrVv^Pd|UPPvalQ,Rpad>LQp_buf=^Pn_buf3,Ppad*^RcRQp_start,Phex_char^Pradix^[precision^Uwidth^TflagXPs^ n_prefix^prefix^Pn_bufobufstd_stdlib.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\unsigned intcX|X|cstd_unicode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\)4L}STD_Sjis2UnicodeArray(8L}STD_Unicode2SjisArrayX|X|X]STDi_AttachUnicodeConversionTablebXPu2sXPs2uX|,Y|-gpio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7\src\@enumEXI_GPIOIF_SERIALEXI_GPIOIF_UNDEF@EXI_GPIOIF_GPIOEXI_GPIOIF_JOYX|Y| ]EXIi_SetBitRcnt0L Pmask PdataY|,Y|S]EXIi_SelectRcntSPtype,Y|Y|gpio2.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7.TWL\src\,Y|LY|%]EXI2i_SetBitGpio2CntL%Pmask%PdataLY|Y|V]EXI2i_RecvBitGpio2CntL%VTmaskY|Y|i]EXI2i_SetBitGpio2CntHiiPdataY|Y|x]EXI2i_GetBitGpio2CntHY|[|snd_global.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\SNDOutputSND_OUTPUT_MIXERSND_OUTPUT_CHANNEL1SND_OUTPUT_CHANNEL3SND_OUTPUT_CHANNEL1_3SNDChannelOutSND_CHANNEL_OUT_MIXERSND_CHANNEL_OUT_BYPASSY|Y|;]SND_EnableY|Z|W]SND_ShutdownXY^UchZ|dZ|n]SND_BeginSleeppZ|Z|]SND_EndSleepZ|Z|]SND_SetMasterVolume^PvolumeZ|[|]SND_SetOutputSelectorr4Pleft4PrightPchannel1Pchannel3V [|_|snd_channel.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\^~sSurroundDecay^^UchNo^PvolumeTshift^Ppan]|]|]SND_SetChannelTimer^PchNo^Ptimer]|`^| ]SND_SetChannelPan ^PchNo ^Ppan ^Pvolume`^||^|,^]SND_IsChannelActiveO,^PchNo.Preg|^|^|A]SND_SetMasterPanA^PpanC^RchNo^|^|c]SND_GetChannelControlc^PchNo^|P_|w]SNDi_SetSurroundDecayxw^Pdecay|^Xoffset{^Ppanz^Pvolumey^WchNoP_|_|^]CalcSurroundDecay^Pvolume^Ppan_|a|snd_util.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\@L}u /}SinTable(/}SNDi_DecibelSquareTable! signed chars8vs86m_|`|8]SND_CalcTimer8^Vbase_timer8^Ppitch_<^Ppitch;^Ushift:USUtimer`|Ta|]SND_CalcChannelVolume ^TdBPvolumeQshift`a|a|]SND_SinIdxE^Pindexa|a|]SND_CalcRandomna|d|6snd_main.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\z^~initialized>~sndMesgBuffer=L4~sndMesgQueue<T~sndAlarm:N~sndThread;$~sndStack Ua|Tb|v]SND_InitvUthreadPrioTb|b|]SND_StartIntervalTimerNb|b|]SND_StopIntervalTimer~b|b|^]SND_SendWakeupMessageb|b|]SNDi_LockMutexb|b|]SNDi_UnlockMutexb|c|(]SndAlarmCallback-c|d|9]SndThreadoS^XdoPeriodicProcd||d|8snd_capture.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\@enumSND_CAPTURE_0SND_CAPTURE_1@enumSND_CAPTURE_FORMAT_PCM16SND_CAPTURE_FORMAT_PCM8@enumSND_CAPTURE_IN_MIXERSND_CAPTURE_IN_CHANNELSND_CAPTURE_IN_MIXER_LSND_CAPTURE_IN_MIXER_RSND_CAPTURE_IN_CHANNEL0SND_CAPTURE_IN_CHANNEL2@enumSND_CAPTURE_OUT_NORMALSND_CAPTURE_OUT_CHANNEL_MIXSND_CAPTURE_OUT_CHANNEL0_MIXSND_CAPTURE_OUT_CHANNEL2_MIXd|dd|%]SND_SetupCapture% Pcapture&@Pformat'Pbuffer_addr(^Plength(^repeat(in(Kout*^Uoffsetdd||d|A^]SND_IsCaptureActiveA Pcapture|d|q|3Vsnd_exchannel.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\?$~sWeakLockChannelj/(0}shift>(~sLockChannelj@,0}channel_orderjQ<0}attack_tablehTSNDExChannel myNo type env_status active_flag start_flag auto_sweep sync_flag pan_range original_key 6muser_decay2 key velocity init_pan user_pan 6muser_decay 6muser_pitch |env_decay |sweep_counter |sweep_length attack sustain decay release "prio #pan $volume &timer (lfo 26msweep_pitch 4|length 8wave DK__anon Dvdata D8duty H|callback Lvcallback_data PnextLinkhSNDExChannel SNDLfo $param delay_counter counterSNDLfoSNDLfoParam target speed depth range delay$SNDLfoParam SNDWaveParam format loopflag rate timer loopstart looplenSNDWaveParam vdata 8dutyvhSNDExChannelCallbackStatusSND_EX_CHANNEL_CALLBACK_DROPSND_EX_CHANNEL_CALLBACK_FINISHhhhhhhhhhhhhhhhhhh$h|d|d|\]SND_ExChannelInit_^\ch^bPch_pd|f|w]SND_UpdateExChannelWz^Ychy Xch_pf|4j|]SND_ExChannelMain(^ZdoPeriodicProcGVvolumeFPtimer|Xpan|Wpitch|Vdecay^UchTch_p4j|pj|^]SND_StartExChannelPcmTch_pPwave#^data|Plengthpj|j|^]SND_StartExChannelPsg)Pch_p8Pduty|Plengthj|k|^]SND_StartExChannelNoisen/Pch_p|Plengthk|k||]SND_UpdateExChannelEnvelope 5Pch_p^PdoPeriodicProc|Psustain_decay|Penv_decay_s32k|k|]SND_SetExChannelAttackg;Pch_p^Pattackk|k|6]SND_SetExChannelDecay6ATch_p6^Pdecayk|k|G]SND_SetExChannelSustainGGPch_pG^Psustaink|l|X]SND_SetExChannelReleasewXMTch_pX^Preleasel|l|h]SND_ReleaseExChannelhSPch_pl|$l|v^]SND_IsExChannelActivevYPch_p$l|m|]SND_AllocExChannelPchBitMask^Vprio^PstrongRequest_Ucallbacke(callbackData^PchNokZch2_p^YiqTch_pm|n|]SND_FreeExChannel0wPch_pn|n|]SND_StopUnlockedChannelZchBitMask^YchNoPmask}Xch_pn|o|]SND_LockChannelDZchBitMaskYflags^XchNoWmaskVch_po|o|L]SND_UnlockChannelLPchBitMaskLPflagso|o|a]SND_GetLockedChannelaPflagso|Tp|w]SND_InvalidateWaveYwXstartwWendzVchyPch_pTp|xp|]SND_InitLfoParamPlfoxp|p|]SND_UpdateLfoPlfoSoffsetp|4q||]SND_GetLfoValue$Tlfo4q|q|]CalcReleasea^Preleaseq|q|]StartExChannelPch_p|Plengthq||fysnd_seq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\`^,~sMmlPrintEnable]0~seqCacheSNDSeqCache base endp bufferSNDSeqCache$SNDPlayer active_flag prepared_flag pause_flag pad_ myNo pad2_ pad3_ prio volume 6mextFader tracks tempo tempo_ratio tempo_counter pad__ bankSNDPlayer<SNDBankData HfileHeader blockHeader rwaveArcLink 8instCount <instOffsetSNDBankDataSNDBinaryFileHeader signature byteOrder version fileSize headerSize dataBlocksHSNDBinaryFileHeader,SNDBinaryBlockHeader kind sizeSNDBinaryBlockHeader SNDWaveArcLink waveArc nextSNDWaveArcLink<SNDWaveArc HfileHeader blockHeader topLink reserved 8waveCount <waveOffsetSNDWaveArc@SNDTrack active_flag note_wait mute_flag tie_flag note_finish_wait porta_flag cmp_flag channel_mask_flag pan_range prgNo volume volume2 pitch_bend bend_range pan ext_pan 6mextFader 6mext_pitch attack decay sustain release prio transpose porta_key porta_time 6msweep_pitch $mod channel_mask |wait $Wbase (Wcur ,]call_stack 8nloop_count ;call_stack_depth <channel_listSNDTrack Wh@enumSND_SEQ_MUTE_OFFSND_SEQ_MUTE_NO_STOPSND_SEQ_MUTE_RELEASESND_SEQ_MUTE_STOP@enumSEQ_ARG_U8SEQ_ARG_S16SEQ_ARG_VMIDISEQ_ARG_RANDOMSEQ_ARG_VARIABLE6mhhhhh6mq|$r|]SND_SeqInit^RtrackNo^^playerNoPplayer_p$r||s|]SND_SeqMain^ZdoPeriodicProcWplayerStatus^VplayerNoUplayer_p|s|]PM_Init&@|Si||^]PM_AnalyzeCommand'^Pdatae|Si`Ucommand|$|]PM_ExecuteProcess'o&TentryPresultXparameterWprocNumberPe$|h|]PMi_ReturnResult!(PcommandPresult^VerrUdata h||XXpm_send.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\h||2]PMi_SendPxiCommand/)2Pcommand2Pdata4Vpxi_send_data||vpm_pmic.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\||>]PMi_SetRegister*>Preg>Vdata| |]SPI_SendWaitU*Pdata ||Z]PMi_GetRegister*ZPreg||y]PMi_SetControl*yUsw{Pdata||]PMi_ResetControl0+UswPdata||pm_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\9,L}PMi_LEDStatus!,P0}PMi_AmpGainLevelTableq,strBadLEDMessage@enumPM_LED_NONEPM_LED_ONPM_LED_BLINK_LOWPM_LED_BLINK_HIGH,||8]PMi_SwitchUtilityProc{-8PprocNumber8Yparameter:^Rn^PdsGain^PdsGainPtwlGainSn||H]MCU_ReadRegister-HTregJPitrm|4|0^]MCU_WriteRegister1.0Vreg0Tdata2Pitrm4|||t]PMi_SetLEDl.t9,Tstatus||̥|]PMi_SetSoundPower.^Pbool̥||]PMi_DoShutdown.||Upm_sleep.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\)/.~PMi_PreDmaCnt"/strDmaStopMessage ,|$|4]PMi_PreSleepForDmaN0`/PndmaCntp</PdmaCntp6Ti$||]PMi_DoSleep}1ZtriggerYkeyPatternXbacklightPb1^Vrcnt_reg_restoreUrcnt_reg_backuppmic_reg_backupprepIntrMask2prepIntrMaskTprepIntrMode)|D|$pm_selfBlink.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\@.~PMi_BlinkCounterC2.~PMi_BlinkPatternNoc4L}PMi_BlinkPatternData@enumPM_LED_PATTERN_NONEPM_LED_PATTERN_ONPM_LED_PATTERN_BLINK_LOWPM_LED_PATTERN_BLINK_HIGHPM_LED_PATTERN_BLINK1PM_LED_PATTERN_BLINK2PM_LED_PATTERN_BLINK3PM_LED_PATTERN_BLINK4PM_LED_PATTERN_BLINK5PM_LED_PATTERN_BLINK6 PM_LED_PATTERN_BLINK8 PM_LED_PATTERN_BLINK10 PM_LED_PATTERN_PATTERN1 PM_LED_PATTERN_PATTERN2 PM_LED_PATTERN_PATTERN3PM_LED_PATTERN_WIRELESS4   Upattern patternSize patternResolutiont4PMiBlinkPatternData4||N]PM_SelfBlinkProc=5Q9,PnextStatusP4Vp|4|]PM_SetLEDPattern52Ppattern4|D|2]PM_GetLEDPattern5;}@}pm_shutdown.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\5^HP}PMiMCUPwswCallbackCalled7^LP}PMiInTerminate6^PP}PMiMCUBatteryEmptyCallbackCalled$7strDoExit)7strUnknown#7strARM7&7(strBatteryLevelZero%78strResetOccured'7LstrPWSWReset(8dstrPWSWShutdown, , , ,,,,;};}<]PMi_DummyHandlerJ8;}<}M]PMi_InitShutdownControl8OUenabledD||| ]MCU_GetBatteryLevel8<}D=}z]PMi_MCUPwswCallback8D=}h=}]PMi_MCUResetCallback9h=}t=}]PMi_MCUShutdownCallbackP9t=}=}]PMi_MCUBatteryLowCallback9=}=}]PMi_MCUBatteryEmptyCallback9=}>}]PMi_DoResetHardware9>}H?}]PMi_DoExit :H?}?}C]PM_FlipHeartBeatK:GPval?}@}Y]PM_SetMcuForTerminate{:dgt_md5.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\XMATHMD5Context <__anon u<__anon a b c d <state Ulength <__anon <buffer32  =buffer8;MATHMD5Context u<__anon a b c d <state a b c d@ <buffer32 =buffer8@@?MATHiHMACFuncs dlength blength =context =hash_buf =HashReset >HashSetSource b>HashGetDigest=MATHiHMACFuncs=@no_name@>>@no_name@V>@no_name@\>@no_name@h>@no_name@>@no_name@>Ldgt_sha1.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\`MATHSHA1Context ?h ?block Tpool Xblocks_low \blocks_high7?MATHSHA1Context@?~crc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\MATHCRC8Table @table@MATHCRC8TableMATHCRC16Table Atable@MATHCRC16TableMATHCRC32Table \AtableAMATHCRC32Table?net_sha256.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\lMATHSHA256Context Bh Nl $Nh (Bdata h^num BMATHSHA256Context @?||8|1scfg_proc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\C.~SCFGi_MessageBufferL.~SCFGi_MessageQueue"N/~SCFGi_Thread#C/~SCFGi_StackCU|||6]SCFG_Init)D|D|R]SCFGi_CommonCallbackoDRPpxiDataD||s]SCFGi_SendPxiDataDsPcommandsPordinalsPdatauVpxiData|8|]SCFGi_ExecYEPregValueCmessage^ZindexP8|8|?7tp_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\3~valid_cnt3~invalid_cntBF3~tpwTPWork Fcommand Fstatus $|range (|rangeMin ,eGvAlarm vGvCountBFTPWork TPStatusTP_STATUS_READYTP_STATUS_AUTO_STARTTP_STATUS_AUTO_SAMPLINGTP_STATUS_AUTO_WAIT_END,lGSPITpData Ge raw sHbytes HhalfsGSPITpData x  y  touch validity dummyh 8|,|2]TP_InitH4|Si,|P|]SPI_DummyWaitHP||l]TP_AnalyzeCommandbIlPdataUcommandq|Ti||]TP_AutoAdjustRangeIGPtpdataPdensity|Ա|"]TP_ExecuteProcess\J"HZentrykPvCountf|YiIdensityGGtemp8PeԱ|8|]TpVAlarmHandlerJHUargGtemp8| |Wtp_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\74~last_touch_flgSPITpValiditySPI_TP_VALIDITY_VALIDSPI_TP_VALIDITY_INVALID_XSPI_TP_VALIDITY_INVALID_YSPI_TP_VALIDITY_INVALID_XY@enumTP_DETECT_AXIS_XTP_DETECT_AXIS_Y|G8||G]TPi_DetectTouchL|@|]SPI_DummyWaitL@|$|mK]TPi_DetectPosMKWdata|VrangeLPaxis@LUdensity|SmaxRangemKTvalidityYcommandFLtemp|Pk|Rj|Si$| |]TP_ExecSamplingNWLZdata|Yrange]LXdensity%|Uidensity_ydensity_xWtemp_touchtemp_posk |@|]wmic_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\#CO4~micw<MICWork DPcommand UPstatus $type &admode (Pbuf ,index 0size 4timerValue 6timerPrescaler 8temp16 :temporaryCOMICWork MICStatusMIC_STATUS_READYMIC_STATUS_AUTO_STARTMIC_STATUS_AUTO_SAMPLINGMIC_STATUS_AUTO_ENDMIC_STATUS_END_WAITh CO |\|7]MIC_Init2Q9|Si\||R]MIC_AnalyzeCommandQRPdataPehPwu32gXcommandW|Si||^]MicSetTimerValueQPvalue||B]MIC_ExecuteProcessRBPVentryPePeaPtempRPe||P]MICi_GetSysWorkR|ؼ|]MIC_TimerHandlerRؼ|@|]MicTimerHandlerSB@||Ԙmic_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\&4~offset8,6m4~offset12*4~sam12+4~counter12%4~counter8$4~sam8@|P|9]MIC_ExecSampling8TY|PadjustedKPaverage;PtempP||]SPI_DummyWaitReceiveT||l]MIC_ExecSampling12FU|Padjusted~6mPaveragenPtempg||mic_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\MICIntrInfo handler sp delayIF dummyUMICIntrInfoMICIntrPrio ieBit tableIndexTVMICIntrPrioV||p]MIC_SetIrqFunctionWpPintrBitpVPfunctionr|Si||]MIC_EnableMultipleInterruptQW||]MIC_DisableMultipleInterruptW||]MIC_GetDelayIFWfs_file.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\FSArgumentForSuspendFSArgumentForUnmountFSArgumentForActivateFSArgumentForIdleFSArgumentForMountFSArgumentForCloseFileFSArgumentForFlushFileFSArgumentForCloseDirectoryFSArgumentForResumeC fs_overlay.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\FSOverlaySource yZarc vovt9 vovt7 vdigest_key_ptr digest_key_lenYFSOverlaySourceZ\FSArchive \name \next \list queue flag command ^result ]userdata $wgvtbl (s__anon (treserved2 ( u__anon (base ,fat 0fat_size 4fnt 8fnt_size <fat_bak @fnt_bak D]load_mem H vread_func LEvwrite_func Pjvreserved3 T{vproc Xproc_flagZFSArchive \ptr pack,Z\HFSFile \next ]userdata \arc stat ]argument ^error 3`queue D`__anon t`reserved1 `prop 0b__anon 0Ibreserved2 0Zbarg\FSFileFSResultFS_RESULT_SUCCESSFS_RESULT_FAILUREFS_RESULT_BUSYFS_RESULT_CANCELEDFS_RESULT_CANCELLEDFS_RESULT_UNSUPPORTEDFS_RESULT_ERRORFS_RESULT_INVALID_PARAMETERFS_RESULT_NO_MORE_RESOURCEFS_RESULT_ALREADY_DONEFS_RESULT_PERMISSION_DENIED FS_RESULT_MEDIA_FATAL FS_RESULT_NO_ENTRY FS_RESULT_MEDIA_NOTHING FS_RESULT_MEDIA_UNKNOWN FS_RESULT_BAD_FORMATFS_RESULT_MAXFS_RESULT_PROC_ASYNCFS_RESULT_PROC_DEFAULTFS_RESULT_PROC_UNKNOWN t`reserved1 `propFSROMFATProperty `file Xadir`FSROMFATPropertyFSROMFATFileProperty own_id top bottom pos`FSROMFATFilePropertyFSROMFATDirProperty apos parentXaFSROMFATDirProperty FSDirPos \arc own_id index posaFSDirPos Ibreserved2 ZbargFSROMFATCommandInfo creadfile cwritefile dseekdir fdreaddir efindpath fgetpath fopenfilefast )gopenfiledirect agclosefileZbFSROMFATCommandInfo  ]dst len_org len^cFSReadFileInfo  ]src len_org lencFSWriteFileInfo  aposdFSSeekDirInfo zdp_entry ^skip_string1dFSReadDirInfoe e__anon Gefile_id adir_id is_directory name_len enamedFSDirEntry  Gefile_id adir_idFSFileID \arc file_idGeFSFileID, apos fpath ^find_directory fresulteFSFindPathInfo, sOpenDirectory isCloseDirectory sSetSeekCache sreserved}gFSArchiveInterface+k^\\]JkVk^\\]Jk{k^\\k^\\kkpFSDirectoryEntryInfo lshortname shortname_length llongname longname_length attributes latime 8lmtime Plctime hfilesize lidkFSDirectoryEntryInfo,,FSDateTime year month day hour minute secondlFSDateTimem^\ fJk^m^\\^ fJkm^\\ n^\\Jk6n^\\On\bn\un\n\n^\\ fn^\\nn^FSSeekFileModeFS_SEEK_SETFS_SEEK_CURFS_SEEK_END=o^\\Jk\o^\\Jk{o\o\o^\Jko^\ fo^\ fo^\ f f)p^\ fHpNpTFSPathInfo attributes lctime lmtime 4latime Lfilesize PidNpFSFileInfoNpFSPathInfop^\ fHp$q^\ fIq^\ fhq^\ f fq^\qq0FSArchiveResource UtotalSize UavailableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClustersqFSArchiveResource s^\\%s^\\Ds^\\ fos^\\s^\\]ts4 treserved2 u__anon base fat fat_size fnt fnt_size fat_bak fnt_bak ]load_mem vread_func $Evwrite_func (jvreserved3 ,{vproc 0proc_flag434 base fat fat_size fnt fnt_size fat_bak fnt_bak ]load_mem vread_func $Evwrite_func (jvreserved3 ,{vproc 0proc_flag&v^\]Kv^\]v^\CARDRomRegion offset lengthvCARDRomRegion,FSOverlayInfo Rwheader mxtarget $vfile_posvFSOverlayInfo FSOverlayInfoHeader id fram_address ram_size bss_size [xsinit_init [xsinit_init_end file_id compressed flagRwFSOverlayInfoHeaderaxgx@enumMI_PROCESSOR_ARM9MI_PROCESSOR_ARM7FSArchiveFAT top bottomxFSArchiveFAT MWiDestructorChain ^ynext dydtor yobjxMWiDestructorChainxjyp_this~y||afs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\||6]FS_InitDz||Ecard_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\^4~CARDi_EnableFlag@CARDEventListener {event {valarm 4|Condition 8#|userdata <lockID >)|padding{CARDEventListener CARDAccessLevel|CARDiOwner(,l|^@no_name@|@|CARDiCommon a}cmd flag priority |lock_owner ^lock_ref lock_queue ɂlock_target 1thread task Qtask_q ^command padding@|CARDiCommong}`CARDiCommandArg ~result ~type id src dst len specg}CARDiCommandArgCARDResultCARD_RESULT_SUCCESSCARD_RESULT_FAILURECARD_RESULT_INVALID_PARAMCARD_RESULT_UNSUPPORTEDCARD_RESULT_TIMEOUTCARD_RESULT_ERRORCARD_RESULT_NO_RESPONSECARD_RESULT_CANCELEDCARDBackupTypeCARD_BACKUP_TYPE_EEPROM_4KBITS CARD_BACKUP_TYPE_EEPROM_64KBITS CARD_BACKUP_TYPE_EEPROM_512KBITSCARD_BACKUP_TYPE_EEPROM_1MBITSCARD_BACKUP_TYPE_FLASH_2MBITSCARD_BACKUP_TYPE_FLASH_4MBITSCARD_BACKUP_TYPE_FLASH_8MBITSCARD_BACKUP_TYPE_FLASH_16MBITSCARD_BACKUP_TYPE_FLASH_64MBITSCARD_BACKUP_TYPE_FRAM_256KBITSCARD_BACKUP_TYPE_NOT_USEH total_size sect_size subsect_size page_size addr_width program_page write_page write_page_total erase_chip $erase_chip_total (erase_sector ,erase_sector_total 0erase_subsector 4erase_subsector_total 8erase_page <initial_status =padding1 @caps Dpadding2@enumCARD_TARGET_NONECARD_TARGET_ROMCARD_TARGET_BACKUPCARD_TARGET_RW `context qstackNCARDTask next priority "userdata (function KcallbackCARDTask.@no_name@E.bCARDTaskQueue list workers quit dummybCARDTaskQueue`CARDRomHeader 3game_name game_code maker_code product_id device_type device_size Dreserved_A game_version property {main_rom_offset ${main_entry_address ({main_ram_address ,main_size 0{sub_rom_offset 4{sub_entry_address 8{sub_ram_address <sub_size @vfnt Hvfat Pvmain_ovt Xvsub_ovt `Urom_param_A hbanner_offset lsecure_crc nfrom_param_B p{main_autoload_done t{sub_autoload_done xwrom_param_C rom_size header_size main_module_param_offset sub_module_param_offset normal_area_rom_offset twl_ltd_area_rom_offset reserved_B logo_data \logo_crc ^header_crcCARDRomHeaderNTRCARDRomHeader ,  ,+xCARDRomHeaderTWL ntr `،debugger_reserved config1 access_control *reserved_0x1B8 main_ltd_rom_offset ;reserved_0x1C4 {main_ltd_ram_address main_ltd_size sub_ltd_rom_offset Lreserved_0x1D4 {sub_ltd_ram_address sub_ltd_size vdigest_area_ntr vdigest_area_ltd vdigest_tabel1 vdigest_tabel2 digest_table1_size digest_table2_sectors ]config2 nmain_static_digest sub_static_digest (digest_tabel2_digest <banner_digest Pmain_ltd_static_digest dÎsub_ltd_static_digestCARDRomHeaderTWL 43 game_card_on game_card_nitro_mode photo_access_read photo_access_write sdmc_access_read sdmc_access_write backup_access_read backup_access_write||<]CARD_Init >:|Pp||]CARD_SetThreadPrioritywVpriorUretPbak_psr||  ]CARD_GetRomHeader||']CARD_GetOwnRomHeaderTWLՏE|P|card_common.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\@|5~cardi_common@|@||(|]CARDi_InitResourceLockPp(|P|]CARDi_InitCommandPp/card_hook.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\ CARDHookContext &next ,userdata 2callbackCARDHookContext8,,P| |`1card_task.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\b@no_name@ b;bbP|p|%]CARDi_InitTaskQueue%Pqueuep||J]CARDi_InitTaskBJPtaskJPpriorityJPuserdataKPfunctionK#callback|h|a]CARDi_ProcessTaska)Vqueuea/Ttaska^Pblockinga^WchangePriorityxUpriog5PppfUbak_cpsrh||A]CARDi_ReceiveTaskGTqueue^WblockingVbak_cpsrMUretval| |]CARDi_TaskWorkerProcedureSUargYPtask_PqueueOcard_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\CARDDmaInterface Recv /StopCARDDmaInterfacechannelsrc#dst)len5channel  |`|Ocard_spi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\X0}argY0}argZ0}buf1^dM}need_command^:~status_checked@:~cardi_param rest_comm src dst ^cmpCARDiParam@no_name@3g}g}g}g}g}g} ||]CARDi_CommandEnd Uforce_waitTtimeout^Wrest| |]CARDi_CommandReadStatusRdst |`|^]CARDi_WaitPrevCommand`|l|3]CARDi_CommArray 3 Psrc3Pdst3Zlen3YfuncEdummy_read59Wpl||]CARDi_WaitBusyforIRCcPtick||i]CARDi_CommReadCorei?Pp|L|z]CARDi_CommWriteCorezEPp|tmpL||]CARDi_CommVerifyCore3KPp||]CARDi_WriteEnable_|x|]CARDi_SendSpiAddressingCommandPaddrPmodeaddr_cmdRwidthx||]CARDi_InitStatusRegister2Tstat|<|]CARDi_ReadBackupCoreVsrcQUdstTlen<||]CARDi_ProgramBackupCore9ZdstWYsrcXlen(Wsize$Vpage"]Ucmd||H]CARDi_WriteBackupCore؞HZdstHcYsrcHXlenRWsizeNVpageLiUcmd|4|r]CARDi_VerifyBackupCore@rXdstroWsrcrVlen4||]CARDi_EraseBackupSectorCoreŸWdstVlenUsectoruTcmd|l|]CARDi_EraseBackupSubSectorCoreGWdstVlenUsector{Tcmdl||]CARDi_EraseChipCoreTcmd|`|]CARDi_SetWriteProtectCoreTstatarg^Zretry_countYcmd`||{qcard_rom.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\K:~cardi_rom_baseN:~CARDiReadRomFunction^userdata6buffer<offsetlength`||l]CARDi_SetRomOpâlPcommandlPoffsetoQcmd2nRcmd1|(|^]CARDi_IsNormalModeBPoh(||]CARDi_ReadRomIDCoreBUop||]CARDi_ReadRomIDPret||5]CARDi_InitRom ||3card_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\^hM}isFirst z:~CARDi_ARM7Mutex@|@|||.]CARDi_LockMutexForARM7|x|R]CARDi_DoTaskFromARM9]VidTUpx||]CARDi_DoneTaskFromARM9@||]CARDi_OnFifoRecv˥PtagPdata^Perr^VrequestedUp||card_sp_pullOut.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\%4:~CARDiSlotResetCount&^8:~detectPullOut^<:~skipCheckM}nextCount ^@:~isCardPullOut^M}isFirstCheck^D:~isInitializedaH:~alarm,||6]CARD_InitPulledOutCallback||T]CARDi_TryTerminateARM7`|PlockID]Vcpsr||]CARDi_CallbackForPulledOutJPdata|P|^]CARD_IsPulledOutuP||^]CARD_CompareCardIDPcardIDiplCardIDUlastInterrupts|TlockID^Pretval||^]CARD_IsCardIreqLoZ^Pretval||]CARD_CheckPullOut_Polling( @}XC}i2c_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\I^TP}slowRateG^XP}isInitialized/Ϫ\0}I2CiDeviceAddrTableFz\P}mutex:@}I2CiSlowRateTable|@enumI2C_SLAVE_CAMERA_MICRON_INI2C_SLAVE_CAMERA_MICRON_OUTI2C_SLAVE_CAMERA_SHARP_INI2C_SLAVE_CAMERA_SHARP_OUTI2C_SLAVE_MICRO_CONTROLLERI2C_SLAVE_DEBUG_LEDI2C_SLAVE_DEBUGGERI2C_SLAVE_NUM@enumI2C_WRITEI2C_READ @}T@}]I2C_Init9T@}@} ]I2C_Lock\@}@}.]I2C_Unlock@}u:~sMicBiasBk;v:~isDACOnBk=w:~isUnmuteSpBk9x:~isAudioADCOnBk<y:~isUnmuteHpBk{ |d0}mute_wait_append_time_max?i|:~sCdcSysClockBk` |h0}mute_wait_append_time_max^l0}Hpf10HzSamplingrate32k_r0}Hpf10HzSamplingrate48kV~x0}sIirFilterAddressHalf`~0}DefaultIirParamBd0}sIirFilterAddress@u:~sIirFilterBackup_CDCSysClockParameterCDC_SYS_CLOCK_PARAMETER_FOR_SAMPLING_RATE_32730CDC_SYS_CLOCK_PARAMETER_FOR_SAMPLING_RATE_47610CDC_SYS_CLOCK_PARAMETER_OFF_CDCIirFilterParamHalf n0 n1 d1CDCIirFilterParamHalf_IirFilterAddress page regIirFilterAddress _CDCIirFilterParam n0 n1 n2 d1 d2CDCIirFilterParamd _CDCIirFilterTargetCDC_IIR_FILTER_ADC_1CDC_IIR_FILTER_ADC_2CDC_IIR_FILTER_ADC_3CDC_IIR_FILTER_ADC_4CDC_IIR_FILTER_ADC_5CDC_IIR_FILTER_DAC_LEFT_1CDC_IIR_FILTER_DAC_LEFT_2CDC_IIR_FILTER_DAC_LEFT_3CDC_IIR_FILTER_DAC_LEFT_4CDC_IIR_FILTER_DAC_LEFT_5 CDC_IIR_FILTER_DAC_RIGHT_1 CDC_IIR_FILTER_DAC_RIGHT_2 CDC_IIR_FILTER_DAC_RIGHT_3 CDC_IIR_FILTER_DAC_RIGHT_4 CDC_IIR_FILTER_DAC_RIGHT_5CDC_IIR_FILTER_DAC_BOTH_1CDC_IIR_FILTER_DAC_BOTH_2CDC_IIR_FILTER_DAC_BOTH_3CDC_IIR_FILTER_DAC_BOTH_4CDC_IIR_FILTER_DAC_BOTH_5_CDCIirFilterTargetHalfCDC_IIR_FILTER_ADC_HALFCDC_IIR_FILTER_DAC_HALF_LEFTCDC_IIR_FILTER_DAC_HALF_RIGHTCDC_IIR_FILTER_DAC_HALF_BOTH| |]CDC_InitLib |H|]CDCi_IsDACOnH||I]CDC_SetSystemClockUJiPparam||i]CDC_GetSystemClockPNDAC||]CDC_PowerUpDAC||]CDC_PowerUpDAC_WaitWithSpin||e]CDC_SetMicBias3e^Pis_on|D|z^]CDC_GetMicBiasq|^PvalueD||]CDC_PowerUpAudioADC||]CDC_PowerDownAudioADCϸ||]CDC_UnmuteAudioADC||]CDC_MuteAudioADC'| |]CDC_SetPGABhPtarget_gain |(|]CDC_GetPGAB Ptemp(|X|q]CDC_Stopq^VflagDACq^UflagAudioADCq^TflagSarADCX||]CDC_Restart^VflagDAC^UflagAudioADC^PflagSarADC|\|]CDC_BeginSleep\||B]CDC_EndSleepѺ||]CDC_StartShutterSound||]CDCi_StartForceOutSoundU^UFlagIirInitialized||!]CDC_EndShutterSound||>]CDCi_EndForceOutSoundջ@^UFlagIirInitialized||]CDC_EnableInternalDischargePath#Ptemp||]CDC_SwitchOutputDevicejYdevice|`|p]CDC_SetIirFilterpXtargetp WpParams^VflagAudioADCr^UflagDAC`|h|]CDC_SetIirFilterCore`TtargetPpParamparamh|0| ]CDC_SetIirFilterHalfCoreӽ Ttarget PpParam param0||] ]CDC_WaitPowerDownDAC&d reg_ |Wi||x ]CDC_WaitPowerDownADCy regz |Wi|H| ]CDCi_InitializeIirFilterBufferþ |TiH|| ^]CDCi_IsIirFilterInitialized  |^i||: cdc_twlmode_access.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\6:~cdcCurrentPageiM}__FUNCTION__zM}__FUNCTION__M}__FUNCTION__N}__FUNCTION__5z:~cdcMutex,,,,||O]CDC_InitMutex||]CDC_SetSpiParamsjVregUsetBitsTmaskBitsPtmp|0|]CDC_SetSpiParamsExPpageVregUsetBitsTmaskBits0||]CDC_WriteSpiRegister?VregUdata||]SPI_SendWaitzPdata||]CDC_WriteSpiRegisterExPpageUregTdata|x|]CDC_ReadSpiRegister8UregPdatax||]SPI_DummyWaitReceiveg||]CDC_ReadSpiRegisterExPpageTregPvalue||]CDC_WriteSpiRegistersJWregUbufpVsize^Ri||4]CDC_WriteSpiRegistersEx5Ppage5Vreg5Ubufp5Tsize|d|D]CDC_ReadSpiRegisters@EXregEVbufpEUsizeG^Wid||e]CDC_ReadSpiRegistersExfPpagefVregfUbufpfTsize||x]CDC_InitCurrentPage||]CDC_ChangePage+Tpage_no||q3 sndex_request.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\:;~sndexTempDSPMixRateE;~sndexVol>;~sndexIirTargetD^;~sndexSetAlarm2^;~sndexReqInitialized;^ ;~sndexIsPlayShutter7^;~sndexLock6;~sndexReqMsgQArray@;~sndexSpiLockId?;~sndexIirParam%`N}__FUNCTION__5L(;~sndexReqMsgQCH;~sndexVolAlarm3Nt;~sndexReqThread4<~sndexReqThreadStack , SNDEXSamplingRateSNDEX_SAMPLING_RATE_32730SNDEX_SAMPLING_RATE_47610||X]SNDEX_InitYTpriority[We|4|]SNDEX_GetSamplingRate4||]SDNEXi_InitializeSMIXUtemp||]PxiCallbackeVdata^Perr||A]ReplyResultBPcommandBPresultBPparamDWdata||j]RequestThread PheadphonePsmixIWdevice Wparam_volRsmixWi2sZfreqWePmuteWvolumeqPparampVcommandoRreq||H]MCU_ReadRegister]HTregJPitrm|||^]MCU_SetVolume|Tvolume||]MCUVolumeSwtichCallback||]SetVolumeHandler||W tpex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\<N}__FUNCTION__,h BF||]TPEX_Initialize"VlockId||F]TPEX_ExecuteProcessGTentryGWwork]densityMPeIGtemp0|T}w tpex_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\@enumTP_CONVERSION_CONTROL_HOSTTP_CONVERSION_CONTROL_SELF@enumTP_CONVERSION_MODE_NONETP_CONVERSION_MODE_XYTP_CONVERSION_MODE_XYZTP_CONVERSION_MODE_X TP_CONVERSION_MODE_YTP_CONVERSION_MODE_ZTP_CONVERSION_MODE_AUX3TP_CONVERSION_MODE_AUX2TP_CONVERSION_MODE_AUX1 TP_CONVERSION_MODE_AUTO_AUX$TP_CONVERSION_MODE_AUX123,TP_CONVERSION_MODE_XP_XM4TP_CONVERSION_MODE_YP_YM8TP_CONVERSION_MODE_YP_XM<@enumTP_CONVERSION_PIN_INTERRUPTTP_CONVERSION_PIN_DATA_AVAILABLETP_CONVERSION_PIN_INTERRUPT_DATA_AVAILABLETP_CONVERSION_PIN_NEW_BUFFER_MODE@enumTP_INTERVAL_NONETP_AUX_INTERVAL_1_12MTP_AUX_INTERVAL_3_36M TP_AUX_INTERVAL_5_59M TP_AUX_INTERVAL_7_83M TP_AUX_INTERVAL_10_01M TP_AUX_INTERVAL_12_30M TP_AUX_INTERVAL_14_54MTP_AUX_INTERVAL_16_78MTP_INTERVAL_8MSTP_INTERVAL_1MSTP_INTERVAL_2MSTP_INTERVAL_3MSTP_INTERVAL_4MSTP_INTERVAL_5MSTP_INTERVAL_6MSTP_INTERVAL_7MS@enumTP_NEW_BUFFER_CONVERSION_MODE_CONTINUOUSTP_NEW_BUFFER_CONVERSION_MODE_SINGLESHOT@@enumTP_RESOLUTION_12TP_RESOLUTION_8TP_RESOLUTION_10_TpStabilizationTimeTP_STABILIZATION_TIME_0_25USTP_STABILIZATION_TIME_1USTP_STABILIZATION_TIME_3USTP_STABILIZATION_TIME_10USTP_STABILIZATION_TIME_30USTP_STABILIZATION_TIME_100USTP_STABILIZATION_TIME_300USTP_STABILIZATION_TIME_1MS_TpPrechargeTimeTP_PRECHARGE_TIME_0_25USTP_PRECHARGE_TIME_1USTP_PRECHARGE_TIME_3USTP_PRECHARGE_TIME_10USTP_PRECHARGE_TIME_30USTP_PRECHARGE_TIME_100USTP_PRECHARGE_TIME_300USTP_PRECHARGE_TIME_1MS_TpSenseTimeTP_SENSE_TIME_1USTP_SENSE_TIME_2USTP_SENSE_TIME_3USTP_SENSE_TIME_10USTP_SENSE_TIME_30USTP_SENSE_TIME_100USTP_SENSE_TIME_300USTP_SENSE_TIME_1MS@enumTP_DEBOUNCE_0USTP_DEBOUNCE_8USTP_DEBOUNCE_16USTP_DEBOUNCE_32USTP_DEBOUNCE_64USTP_DEBOUNCE_128USTP_DEBOUNCE_256USTP_DEBOUNCE_512USG   ||%]TPEX_SetConversionMode&IPcontrol&Qmode&FPpin||@]TPEX_SetIntervalAPinterval||Z]TPEX_SetTouchPanelDataDepth{[Pdepth]Ptmp||r]TPEX_EnableNewBufferMode| |]TPEX_DisableNewBufferMode |<|]TPEX_SetNewBufferMode&Pmode<|X|]TPEX_SetResolutionfPresX|t|]TPEX_SetStabilizationTimeiPtimet||]TPEX_SetPrechargeTimePtime||]TPEX_SetSenseTime2Ptime||]TPEX_SetDebounceTimeuiPtime|T}^]TPEX_ReadBuffer/Xdata|Wrange5Vdensity}^Usame_count|^TySum{^PxSumz^Pjz^Qil|PyRangek|PxRangef|RmaxRange);yBuf(L xBuf']buf&^Pj&^RiT}} micex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\COh COCOT}})]MICEX_AnalyzeCommand-yYw,Xcommand}}^]MICEXi_IsCodecAutoSampling"}}]MICEX_ExecuteProcessyTentryRtemp}l}]MicexIntrHandler0Pdata8"Pdata16Xw|WiVtempl}}G^]MicexUpdateStatusOnBufferFullJJPw}}^]MicexConvSamplingSpanUspanTdestPrateL}l }9 micex_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\~>~micexIntrInfoMN}__FUNCTION__^O}__FUNCTION__Fo0}micexIntrPrioMICEXIntrInfo handler sp delayIF delayIF2MICEXIntrInfo,,-MICEXIntrPrio ieBit ie2Bit ieTableIndex ie2TableIndexMICEXIntrPrio} }]MICEX_EnableMultipleInterruptdUhandlerTe }D }]MICEX_DisableMultipleInterruptTeD } }]MICEX_GetDelayIF }l }]MICEX_IrqHandler\C}4G} mcu_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\-tP}MCUiPwswStatus/^XC}MCUiEnableHeartBeat$^xP}MCUiIsInitialized')|P}MCUiMessage+@P}MCUiIrqTable&LP}MCUiMessageQ(NP}MCUiThread)]pQ}MCUiStackMCUPwswStatusMCU_PWSW_UNKNOWNMCU_PWSW_IN_PROGRESSMCU_PWSW_RESETMCU_PWSW_POWER_OFFMCU_PWSW_MAX: QWU?W\C}hD}D]MCU_InitIrqDVpriorityIPbitsHPenabledhD}D}o]MCU_SetIrqFunctionLoPintrBitonPfunctionq^SiD}D}]MCU_CallIrqFunctionVintrBit^UiD}E}]MCU_CheckIrq^VcallHandlerUintrBitTenabledE}\E}]MCU_GetPwswStatusP|Pblock\E}E}]MCUi_UpdatePwswStatusPbitsE}E}]MCUi_HandlerE}E}]MCUi_GetIrqReasonE}G} ]MCUi_ThreadK,ZintrBit&t msg"YcountG} G}b]MCUi_HeartBeatHandler{ G}4G}r]MCU_DisableHeartBeat4G}G}; mcu_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\pS}verInfo4G}G}/]MCU_GetVerInfo=sdio_bus.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\SD_FUNCTION_FLAGSSLOT_VOLTAGE_MASKSDHCD_RESPONSE_CHECK_MODEFUNC_ENABLE_DISABLE_FLAGSUCHARSDCONFIG_WP_VALUEHCD_EVENTUINT8SDIO_IRQ_MODE_FLAGSCT_VERSION_CODEA_UCHARSD_DEVICE_FLAGSA_UINT8_BDCONTEXT RequestList SignalList eRequestListCritSection (HcdList 0HcdListSem PDeviceList XDeviceListSem xFunctionList FunctionListSem ^RequestListSize ^SignalSemListSize ^CurrentRequestAllocations ^CurrentSignalAllocations ^MaxRequestAllocations ^MaxSignalAllocations ^RequestRetries ^CardReadyPollingRetry ^PowerSettleDelay ^CMD13PollingMultiplier DefaultOperClock DefaultBusMode DefaultOperBlockLen DefaultOperBlockCount CDPollingInterval InitMask ^CDTimerQueued CardDetectHelper pCardDetectMsgQueue HcdInUseField ConfigFlags ^MaxHcdRecursion\BDCONTEXT_SDLIST YpPrev _pNextSDLIST_OS_CRITICALSECTION zMutexIDeOS_CRITICALSECTIONSD_BUSCLOCK_RATEA_UINT32ATOMIC_FLAGSULONGUINT32FUNC_ENABLE_TIMEOUTSDREQUEST_FLAGSDMA_ADDRESSA_VOIDUA_UINT64^A_INT^SYSTEM_STATUS^SDPOWER_STATE^THREAD_RETURN^A_BOOL^SDIO_STATUS^INT|INT32|A_INT32 _OS_SEMAPHORE LmsgQueueIDOS_SEMAPHORESD_BUSMODE_FLAGSSDCONFIG_COMMANDA_UINT16UINT16USHORTCARD_INFO_FLAGSSD_SLOT_CURRENT_OSKERNEL_HELPER NTaskID tskStack stackSize taskPri ^ShutDown WakeSignal pContext pHelperFuncOSKERNEL_HELPER _OS_SIGNAL LmsgQueueIDOS_SIGNAL^@no_name@,_SDMESSAGE_QUEUE MessageList eMessageCritSection FreeMessageList (^MaxMessageLengthSDMESSAGE_QUEUEUINTA_UINT_SDHCD Version SDList FpName Attributes MaxBytesPerBlock MaxBlocksPerTrans MaxSlotCurrent SlotNumber MaxClockRate SlotVoltageCaps !SlotVoltagePreferred $opContext (upRequest ,pConfigure 0ConfigureOpsSem PeHcdCritSection h'RequestQueue txpCurrentRequest xmCardProperties SDIOIrqHelper FpPseudoDev PendingHelperIrqs PendingIrqAcks IrqsEnabled LIrqProcState pDevice SlotCurrentAllocated HcdFlags 'CompletedRequestQueue pDmaDescription hpModule ^Recursion tReserved1 zReserved2SDHCD,,TEXT,INT8,A_CHAR{^pHcd^pHcdpConfig _SDCONFIG Cmd !pData ^DataLengthSDCONFIG _SDREQUESTQUEUE Queue ^Busy'SDREQUESTQUEUE~X_SDREQUEST SDList Argument Flags InternalFlags Command tResponse &BlockCount (BlockLen *DescriptorCount ,pDataBuffer 0DataRemaining 4pHcdContext 8pCompletion <pCompleteContext @^Status DpFunction H^RetryCount L[pBdRsv1 PapBdRsv2 TgpBdRsv3~SDREQUEST@no_name@~d_SDFUNCTION Version SDList 9pName MaxDevices NumDevices ?pIds HpProbe pRemove $pSuspend (pResume ,pWake 0OpContext 4UDriver 8DeviceList @CleanupReqSig `FlagsSDFUNCTION,E _SD_PNP_INFO SDIO_ManufacturerCode SDIO_ManufacturerID SDIO_FunctionNo SDIO_FunctionClass SDMMC_ManfacturerID SDMMC_OEMApplicationID CardFlagsESD_PNP_INFON^pFunctionspDeviceyX_SDDEVICE SDList FuncListLink HpRequest vpConfigure AllocRequest FreeRequest pIrqFunction $pIrqAsyncFunction (>IrqContext ,DIrqAsyncContext 0JpFunction 4PpHcd 8VDeviceInfo DspId PDevice TSlotCurrentAlloc VFlags WVersionSDDEVICEN^pDevjreqp~|^pDevconfigpDev~pDevpReq~pContext"pContext8 _SDDEVICE_INFO AsSDIOInfo ;AsSDMMCInfoVSDDEVICE_INFO _SDIO_DEVICE_INFO FunctionCISPtr FunctionCSAPtr FunctionMaxBlockSizeSDIO_DEVICE_INFO_SDMMC_INFO Unused;SDMMC_INFO EpFunctionpDevice^pFunctionstate^^pFunction ^pFunctionIstate^enable^0_CARD_PROPERTIES IOFnCount SDIORevision SD_MMC_Revision SDIO_ManufacturerCode SDIO_ManufacturerID CommonCISPtr RCA SDIOCaps 5CardCSD Flags $OperBusClock (BusMode *OperBlockLenLimit ,OperBlockCountLimit .CardState /CardVoltagemCARD_PROPERTIES_SDHCD_IRQ_PROC_STATESDHCD_IDLESDHCD_IRQ_PENDINGSDHCD_IRQ_HELPER_SDDMA_DESCRIPTION Flags MaxDescriptors MaxBytesPerDescriptor Mask AlignmentSDDMA_DESCRIPTIONn(_SIGNAL_ITEM SDList SignalSIGNAL_ITEMsdio_bus_events.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_SDIO_INT_CTRL_DATA ^SlotIRQEnable IRQDetectModeSDCONFIG_SDIO_INT_CTRL_DATA_HCD_EVENT_MESSAGE Event epHcdHCD_EVENT_MESSAGEysdio_bus_misc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_POWER_CTRL_DATA ^SlotPowerEnable SlotPowerVoltageMask-SDCONFIG_POWER_CTRL_DATA _SDCONFIG_BUS_MODE_DATA ClockRate BusModeFlags ActualClockRateSDCONFIG_BUS_MODE_DATA_SDCONFIG_INIT_CLOCKS_DATA NumberOfClocks6 SDCONFIG_INIT_CLOCKS_DATA_SDCONFIG_FUNC_ENABLE_DISABLE_DATA EnableFlags TimeOut M pOpComplete { pOpCompleteContext SDCONFIG_FUNC_ENABLE_DISABLE_DATAS Contextu status^_SDCONFIG_FUNC_SLOT_CURRENT_DATA SlotCurrent SDCONFIG_FUNC_SLOT_CURRENT_DATANsdio_bus_os.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\twl\ Uid ^heap cardDetectTskPri irqTskPri dpcTskPri SDIO_INIT_SETTINGSsdio_hcd.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\hcd\TWL_hcd\_SDHCD_DRIVER_CONTEXT Hcd  Device ^CardInserted ^KeepClockOn ^SD4Bit Dpc DpcFlags SDHCD_DRIVER_CONTEXT_SDHCD_DEVICE Blob SDHCD_DEVICEBsdio_lib_c.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\sdio_lib\_SDMESSAGE_BLOCK SDList ^MessageLength 9MessageStartSDMESSAGE_BLOCKl } } nvram_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\(>~nvramw NVRAMWork 8commandNVRAMWork h l } }1]NVRAM_Init3|Si }T}G]NVRAM_AnalyzeCommand9GPdataaWsize`Vaddr_Pbuf^Pwu32]UcommandL|TiT}`}]NVRAM_ExecuteProcessIUentryPe`}}^]NvramCheckReadyToReadtempStatus}}^]NvramCheckReadyToWrite$tempStatus} }^]NvramIsAvailableMemAddrjPaddr }}o7 nvram_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\ }L} ]NVRAM_WriteEnableL}p}]SPI_SendWaitPdatap}}0]NVRAM_WriteDisable}}@]NVRAM_ReadStatusRegisterT@Pbuf}}o]NVRAM_ReadDataBytesoPaddressoPsizeoVbufr|^iqadr}(}]SPI_DummyWait (},}]NVRAM_ReadDataBytesAtHigherSpeedPaddressPsize/Vbuf|^i5adr,}(}]NVRAM_PageWrite,PaddressPsizeFPbuf|UiLadr(}$}]NVRAM_PageProgramPaddressPsize]Pbuf|Uicadr$}}`]NVRAM_PageErase`Paddress},}~]NVRAM_SectorErase;~Paddress,}l}]NVRAM_DeepPowerDownil}}]NVRAM_ReleaseFromDeepPowerDown}}]NVRAM_ChipErase}t}]NVRAM_ReadSiliconId tPbuft}} ]NVRAM_SoftwareReset;J}L$}X control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\/H>~rtcInitialized2zL>~rtcMutex0/d>~rtcWorkRTCWork LmsgQ 6msgArray 0Nthread Gstack ^busy command padding Npolling pollingQ XpollingStack pollingAlarm/RTCWork)UURTCPxiResultRTC_PXI_RESULT_SUCCESSRTC_PXI_RESULT_INVALID_COMMANDRTC_PXI_RESULT_ILLEGAL_STATUSRTC_PXI_RESULT_BUSYRTC_PXI_RESULT_FATAL_ERRORRTC_PXI_RESULT_MAXRTCRawStatus2 intr_mode  dummy0  intr2_mode  test dummy1=RTCRawStatus2RTCRawStatus1 reset format dummy0  intr1  intr2  bld  poc dummy1RTCRawStatus1}P}W]RTC_Init.WXpriorityYPenabledP}}^]RTCi_LockR}0}]RTCi_Unlockx0}}^]RTC_IsAvailablePxiCommandPcommand}}]RtcPxiCallback(Pdata^PerrUcommand}}L]RtcReturnResult~LPcommandLiPresult}H#}`]RtcThreadd7msgH#}#}`]RtcAlarmIntrdTintr_numc=stat2bstat1#}L$}1]RtcBCD2HEX1Pbcd5|^w4|Ri3\hexL$},}x instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\RTCRawAlarm week dummy0 we hour afternoon he minute  me dummy2% RTCRawAlarm-!RTCRawData !t }#a f%words w%halfs %bytes-!RTCRawData !date "timeRTCRawDate year month dummy0 day  dummy1 week dummy2!RTCRawDateRTCRawTime hour afternoon dummy0 minute dummy1 second  dummy2 "RTCRawTime status1 =status2 $__anon a$pulse % alarm $adjust %free a$pulse % alarm $adjust %freeRTCRawPulse pulse dummya$RTCRawPulseRTCRawAdjust adjust dummy$RTCRawAdjustRTCRawFree free dummy%RTCRawFree-!!""a$a$% % % % ==$$%% &RTCRawCounter &__anon count dummy &bytes &RTCRawCounter count dummy&RTCRawFout '__anon fout dummy0 '__anon fout2 fout1 dummy1&RTCRawFout fout dummy0 fout2 fout1 dummy1&( year month dummy0 ye me day dummy1 de dummy2(RTCRawAlarmEx(((% % L$}$}+]RTC_ResetR)-stat$}%}A]RTC_SetHourFormat)AZformatD% alarmCstat1%}&}]RTC_ReadDateTime)'!Tdata&}<&}]RTC_WriteDateTime=*%Tdata<&}h&}]RTC_ReadDatex*%Tdateh&}&}]RTC_ReadTime*%Ttime&}&}]RTC_WriteTime*%Ttime&}4'}^]RTC_ReadPulseA+%Vpulse=stat24'}'}^]RTC_WritePulse+%Upulse=stat2'}(}^]RTC_ReadAlarm1+%Valarm=stat2(}t(}5^]RTC_WriteAlarm1;,5%Ualarm7=stat2t(}(}Q^]RTC_ReadAlarm2,Q%ValarmS=stat2(}<)}l^]RTC_WriteAlarm2,l%Ualarmn=stat2<)}h)}]RTC_ReadStatus1 -%Tstath)})}]RTC_WriteStatus1_-%Tstat)})}]RTC_ReadStatus2-%Tstat)}*}]RTC_WriteStatus2-%Tstat*}0*}]RTC_ReadAdjust.%Tadjust0*}h*}]RTC_WriteAdjust[.%Tadjusth*}*}]RTC_ReadFree.%Tfree*}*}]RTC_WriteFree.%TfreeG}G}]RTC_ReadCounter/&TcounterG}0H})]RTC_ReadFoutN/)&Vfout0H}H}=]RTC_WriteFout/='VfoutH}H}Q]RTC_ReadAlarmEx1/Q'TalarmexH}H}c]RTC_WriteAlarmEx10c(TalarmexH} I}u]RTC_ReadAlarmEx2Q0u(Talarmex I}XI}]RTC_WriteAlarmEx20)Talarmex*}+}]RtcChangeAlarmFormat24to120)Palarm+}d,}]RtcChangeAlarmFormat12to24(1 )Palarmd,},}]RtcGpioTransfer1WinstVparam)UbufTsize,}.}Ś gpio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\,}-}&]RTCi_GpioStarti2-}4-}Q]RTCi_GpioEnd24-}-}w]RTCi_GpioSendCommand2xcommandxparameter-}4.}]RTCi_GpioSendDataF342pDatasize4.}.}]RTCi_GpioReceiveData3:2pDatasizeP apistat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^PCFDT40ertfs_stat ^st_dev ^st_ino st_mode ^st_nlink ^st_rdev st_size 5st_atime 5st_mtime 5st_ctime $|st_blksize (|st_blocks ,fattributeT4ERTFS_STATdwordBLOCKTCLUSTERTYPEdatestr date time5DATESTRwordbyte6,pc_file 6pobj flag fptr fptr_cluster fptr_block ^needs_flush ^is_free ^at_eof Gfcluster_cache6PC_FILE6 drobj 7pdrive Cfinode yGblkinfo ^isroot ^is_free Gpblkbuff6DROBJ7tddrive ^mount_valid ^mount_abort ^drive_opencounter volume_serialno q=volume_label ^bytespcluster $byte_into_cl_mask (^fasize ,rootblock 0firstclblock 4^driveno 8maxfindex <fatblock @^secproot D^fat_is_dirty Hbootaddr L=oemname Vbytspsector Xsecpalloc \^log2_secpalloc `secreserved bnumfats dnumroot hnumsecs lmediadesc psecpfat tsecptrk vnumhead xnumhide |free_contig_base free_contig_pointer |known_free_clusters infosec partition_base partition_size ^partition_type =pathname_buffer =filename_buffer ^begin_user_area register_file_address ^interrupt_number drive_flags ^partition_number ^pcmcia_slot_number ^pcmcia_controller_number pcmcia_cfg_opt_value ^controller_number ^logical_unit_number =dev_table_drive_io  >dev_table_perform_device_ioctl access_semaphore A>device_name (R>fatcontext hJApbuffcntxt lCpfscntxt pCfad7DDRIVE    =^driveno^sectorbuffer>countreadin^>^driveno^opcode^arg;>PO@fatbuffcntxt stat_primary_cache_hits stat_secondary_cache_hits stat_secondary_cache_loads stat_secondary_cache_swaps N@puncommitted_blocks Apcommitted_blocks  Apfree_blocks &Apfat_buffers ^num_blocks $^num_free (^low_water ,^hash_size 0hash_mask 4,Amapped_blocks 82Amapped_data <>Afat_blk_hash_tblR>FATBUFFCNTXTT@fatbuff @pnext @pprev Apnext2 ^fat_block_state fat_blockno  Afat_dataT@FATBUFFT@T@T@T@T@T@8ADAT@PA0blkbuffcntxt stat_cache_hits stat_cache_misses Bppopulated_blocks Cpfree_blocks ^num_blocks ^num_free ^scratch_alloc_count ^low_water ^num_alloc_failures $^hash_size (hash_mask ,Cblk_hash_tblPABLKBUFFCNTXTBblkbuff Cpnext Cpprev Cpnext2 ^block_state ^use_count Cpdrive blockno CdataBBLKBUFFBBB7BCBCdfinode Efname Efext fattribute F__anon NTpdr؈$DN]FATFSi_pc_drno2drR$^Pdriveno'JNUpretval&PNPpdr؈HM^]FATFSi_pc_dskfree]RM^UdrivenoOVNTpdrH||]FATFSi_pc_sec2clusterR|\NPpdrive|Pblockno|]FATFSi_pc_sec2index(SbNRpdrivePblocknoPanswerЉ]FATFSi_pc_cl2sectorShNPpdrivePclusterPtPblocknoЉ]FATFSi_pc_chain_length8TnNPpdrivePbyte_lengthPchain_lengthPltempfܡ apickdsk.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\$U,FATFSi_gl;YdQFATFSi_crossed_file_core$chk_global ^be_verbose ^fix_problems ^write_chains Xdrive_structure n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters $n_file_clusters (n_hidden_clusters ,n_dir_clusters 0Xcrossed_file_freelist 4Xcrossed_points n_crossed_points Xlost_chain_list n_lost_chains n_lost_clusters Ybm_used "Ygl_file_name "*Ygl_file_path $^recursion_depth $n_bad_lfns $cl_start $cl_end $^on_first_pass$UCHK_GLOBAL7CLTYPE%Xcrossed_file vXfile_name Xpnext%XCROSSED_FILE  %XX1crossing_point cluster XplistXCROSSING_POINT%X1    g%X1XY0chkdisk_stats n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters n_file_clusters n_hidden_clusters n_dir_clusters n_crossed_points $n_lost_chains (n_lost_clusters ,n_bad_lfnsXYCHKDISK_STATS$U$U%X|  6  666777  666%Xd^]FATFSi_rtfs_pc_check_disk\LYZdrive_idRYYpstat^Xverbose^Wfix_problems^0write_chains^Vret_valZstr_slash^Pi^Pdrive_numberdhu]FATFSi_print_chkdsk_statistics ]uZWpglwXltemph8]FATFSi_print_chkdsk_crossed_files]ZZpgl^Yn_printedZXpcross^Wi8^]FATFSi_allocate_chkdsk_core]|Ti4^]FATFSi_write_lost_chainsA^|Vi|current_chk_file4t'^]FATFSi_build_chk_fileH_'|Vbad_chain_no'|Ucurrent_file_no'ZTret_file_no/Zcs_filename.[filename,![Ppfile+^Zfd*|Ptemp)|Zremaindert^]FATFSi_scan_all_files_'[Zdir_name-[ldir_name>[WentryD[Pdirectoryt^]FATFSi_process_used_map`J[ZpobjP[Yfilename$^found_an_intersection#^Xis_hidden"^Wis_dir!Pt1 Ptrue_sizeVn_clustersUclustert^]FATFSi_check_lost_clustersMaV[ZpdrnxtYcluster^]FATFSi_add_cluster_to_lost_lista\[YpdrPcluster^Xfound^SiWfirst_cluster_in_chain"]FATFSi_count_lost_clustersgb"b[Wpdr%Pcluster$^VitG^]FATFSi_scan_crossed_filesbGh[Zdir_nameKn[ldir_nameJ[XentryI[Wdirectoryt^]FATFSi_process_crossed_filec[Xpobj[Wfilename[Ypcross^PiUclusterH^]FATFSi_add_cluster_to_crossedcPcluster^SiHġ]FATFSi_chain_sizeOdPclusterTn_clustersġܡ5]FATFSi_get_bitd5[Pbitmap5PindexNܡ8P# apiwrite.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\76766767ܡ*^]FATFSi_rtfs_po_writeg*^Tfd*GeZin_buff*^Ycount5crdate=^Xp_errno<^Wret_val;^ extending_file:^end_of_chain9Pblock_to_write8alloced_size7^Pn_left6^Pn_written5^Vn_bytes4ltemp3Pn_clusters2 next_cluster1Vn_w_to_write1[n_to_write0Pn_blocks_left/Pbyte_offset_in_block.Pblock_in_cluster-MeUpdrive,SeTpfile8^]FATFSi_rtfs_po_truncatemi^Tfd,offset[range_checkPnew_chain_lenZold_chain_lenclusters_to_release^Yp_errnoPclnoXlast_cluster_in_chainWfirst_cluster_to_release^Vret_valYeUpdrive_eTpfile8d^]FATFSi__po_flushideeVpfilej^Uret_valhkePpdrg^Vdrivenop^]FATFSi_rtfs_po_flushlj^Vfd^Vdriveno^Uret_valqePpfilep8^]FATFSi_rtfs_pc_diskflushjweTpath"^Vret_val!}eUpdrive ^TdrivenoJ8G apicnfig.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\w,tFATFSi_prtfs_cfgytS}FATFSi___fat_primary_cache_5y|S}FATFSi___fat_primary_index_4yS}FATFSi___fat_primary_cache_1zS}FATFSi___fat_primary_cache_6zS}FATFSi___fat_primary_cache_92zS}FATFSi___fat_primary_cache_7IzS}FATFSi___fat_primary_index_1ZzS}FATFSi___fat_primary_cache_4qzS}FATFSi___fat_primary_index_9zS}FATFSi___fat_primary_cache_8zS}FATFSi___fat_hash_table_6zS}FATFSi___fat_primary_index_8zS}FATFSi___fat_primary_index_0zS}FATFSi___fat_primary_cache_3zS}FATFSi___fat_hash_table_5{S}FATFSi___fat_primary_index_5{S}FATFSi___fat_primary_index_6"{S}FATFSi___fat_hash_table_09{T}FATFSi___fat_hash_table_1P{ T}FATFSi___fat_primary_index_3a{T}FATFSi___fat_hash_table_3x{T}FATFSi___fat_hash_table_4{$T}FATFSi___fat_primary_index_7{,T}FATFSi___fat_primary_cache_0{4T}FATFSi___fat_hash_table_7{Ufromc^Tsize̳n]FATFSi_rtfs_memsetnDPpvnPbn^PnoJPp̳8 rtutil.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^̳@'^]FATFSi_pc_path_to_driveno'+Upath*^Pdrivenumber@p?^]FATFSi_pc_parse_raw_drivep?1PpathA^PdnopK7]FATFSi_pc_parsedriveK=VdrivenoKCUpathN^TdnoMIPp̵vO]FATFSi_pc_mpathvUYtov[XpathvaWfilenamezgcyxVpx~Uretval̵|^]FATFSi_pc_search_cslPsetPstringSp|ȶ^]FATFSi_name_is_reserved8Tfilenameȶ]FATFSi_to_DWORDPfromPtPres ]FATFSi_to_WORD Pfrom Pnres]FATFSi_fr_WORD6PtoPfrom8&]FATFSi_fr_DWORD&Pto&Pfrom8  apifilio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\I__FUNCTION__,766676767667667666676677766B6B6B8ԺN^]FATFSi_rtfs_po_openNZVnameNZflagNmode``Ppdrive_^Xp_errno^YltempZ clusters_to_releaseY^Wopen_for_writeX^drivenoWffileextVwPfilenameU}PpathTVpobjSUparent_objRPclusterQTpfileԺU^]FATFSi_rtfs_po_readU^TfdUZin_buffU^Ycount^^end_of_chain]^Wret_val]^Vp_errno\Pn_clusters\next_cluster[n_w_to_read[Un_to_read[Pn_left[Pltemp[Pn_read[block_to_read[Un_bytesZQbyte_offset_in_blockXTpdriveWPpfile_|]FATFSi_rtfs_po_lseekf_^Tfd_|Xoffset_^Woriginc|Pret_valbVpdriveaPpfile4^]FATFSi_po_ulseek&^WfdVoffsetUpnew_offset^Torigin^Pret_valXpdrivePpfile4^]FATFSi__po_ulseekŊZpfileYoffsetˊnew_offset^Porigin^Xp_errno^end_of_chainPalloced_sizeWret_val next_clusterVfirst_clusterPn_clustersUn_clusters_to_seekPltemp2Pltemp^Ulog2_bytespcluster^[l_at_eofъTpdrivePfile_pointerT|]FATFSi__po_lseekْ׊Ppfile|Poffset^PoriginPu_offsetnew_offset^Pu_origin|Pret_valT,^]FATFSi_rtfs_po_closeF^Vfd"^Vdriveno!^Pret_val,,n݊]FATFSi_pc_fd2filen^Wfdn^UflagsqUpdrivepTpfile,^]FATFSi_pc_allocfile^ViUpfile]FATFSi_pc_freefileiUpfileTpobj^]FATFSi_pc_enum_fileZpdrive^Ychore^Xdirty_count^WiVpobj Upfile]FATFSi_pc_free_all_filYPpdrive4^]FATFSi_pc_flush_all_filPpdrive4D^]FATFSi_pc_test_all_filPpdriveD/^]FATFSi__synch_file_ptrsB/%Tpfile1PclnoS^]FATFSi_pc_flush_file_bufferǖS+VpfileZWsave_drive_filioU1Upfile_bufferz^]FATFSi_pc_load_file_bufferez7WpfilezVnew_blocknoVsave_drive_filio|=Upfile_buffer ^]FATFSi_pc_sync_file_bufferCPpfilePstart_blockPnblocks^PdoflushIPpfile_buffer p rtdevio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\77777777777 ^]FATFSi_check_drive_name_mountwPname^driveno7^]FATFSi_check_drive_number_mountș7^Udriveno\Q]FATFSi_release_drive_mount&Q^TdrivenoSPpdr\\^]FATFSi_release_drive_mount_write\^Tdriveno^Ppdrl^]FATFSi_check_drive_number_present ^VdrivenoƘUpdr^Pmedia_statusl^]FATFSi_check_media_entryf^Pdriveno̘Ppdr^]FATFSi_check_media_ioҘPpdr^Prawp^]FATFSi_check_mediaؘWpdr^Vok_to_automount^Uraw_access_requested^Tcall_crit_err^Ycrit_err_media_status^Pmedia_statusp^]FATFSi_card_failed_handlerޘTpdr^Pret_valp^]FATFSi_devio_read^ZdrivenoYblocknoXbufWn_to_read^(rawVpdrp^]FATFSi_devio_write_formatN^ZdrivenoYblocknoXbufWn_to_write^(rawVpdr^]FATFSi_devio_write^ZdrivenoYblocknoXbufWn_to_write^(rawVpdrp>^]devio_fill>^Tdriveno>Zblockno>Ybuf>Xn_to_write>^Wraw@Updrl(  rtvfat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\6T lfninode lfnorder $lfname1 lfnattribute lfnres lfncksum 5lfname2 lfncluster Flfname3TLFNINODE    BC dosinode Xfname ifext fattribute zresarea fclusterhi ftime fdate fcluster fsizeDOSINODEyGB66 7yGBT7FTBT7FTB^T7FTBFFF666C66TyGB6lG^]FATFSi_pc_findin8G<ZpobjGB[filenameG^YactionUHPpTWlastsegorderSFsRNPlfn_nodeQWsfnPhPlfnOnVscratchN^PdowildcardM^PmatchfoundLtPpfiKzUpiJPpdITrbufpp)^]FATFSi_pc_insert_inodeԧ)Zpobj)Ypmom)Wattr)Vinitcluster)filename5^ n_segs4^[end_of_dir3Tcksum2vffileext2vffilename15crdate0ˢpdrive/Xcluster.^Wi-ѢVpi,עPpd+ݢUpbuffp]FATFSi_pc_nibbleparseOUfilenameTpathPtPp,]FATFSi_pc_cksumPtest^i\sum,P]FATFSi_pcdel2lfiPlfi^PnsegsP ^]FATFSi_pc_deleteseglist  Vpdrive Us^Pntodo_2^Wntodo_1^Pntodo_0PlfiWrbufa%]FATFSi_text2lfia+Wlfna1Vlfia^Unsegsa[ncksumaTordere7Zpfid^Yend_of_lfnc^Xn^]FATFSi_pc_seglist2diskn=YpdriveCXsIWlfnOPpsegtext^Pntodo_2^Tntodo_1^Pntodo_0UPlfi[Trbufla]FATFSi_lfi2textgWlfnmVcurrent_lfn_lengthsUlfi^TnsegsyZpfi^Yn!]FATFSi_pc_seglist2text!Wpdrive!Vs!Ulfn'^current_lfn_length&^Pntodo_2&^Xntodo_1&^Pntodo_0%Zp$Plfi#Yrbuf h]FATFSi_pc_zeroseglistWhPs Xq]FATFSi_pc_addtoseglistǭqPsqPmy_blockq^Pmy_indexX]FATFSi_pc_reduceseglist Ps^]FATFSi_pc_parsepathZtopathYfilenameǣXpathͣTpfilespaceӣPpto٣Vpߣ[pcolonUpslashPpfile^keep_slash^Ti4^]FATFSi_pc_patcmp_vfat 4Zin_pat4Yname4^Xdowildcard8^Wres7star6Ppn26Ppp26Ppn6 Ppp6&PpatX{^]FATFSi_pc_patcmp_vfat_8_3{,Xpat{2Wname{^Vdowildcard~^Pret_valX^]FATFSi_pc_malias8Zfname>YfextDXinput_fileJWdestPascii_aliasaalias^ValiasuniquerPpobj^Utry^]FATFSi_pc_allspaceбxPp^Pi^]FATFSi__illegal_lfn_charTch\^]FATFSi_pc_isdotT~Pfname\^]FATFSi_pc_isdotdotPfname^]FATFSi_pc_delete_lfn_info޲Ppobj]FATFSi_pc_zero_lfn_info$Ppdir^]FATFSi_pc_get_lfn_filenamePpobjPpath(]FATFSi_scan_for_bad_lfnsUpmom^Zdelete_bad_lfn"Ybad_lfn_count!Xlastsegorder FsWlfn_nodePpiPpdVrbufUpobj(^; apifilmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\766(^]FATFSi_rtfs_pc_unlinkm0Zname^Yp_errno^Xdriveno6fileextGPfilenameMPpathSPpdrive^Wret_valYVparent_obj_Upobja[ rtdrobj.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\67666B766666666CyG7666yG6667B6676C5C67C6yG667C7C7C66CC767CC6C666D@]FATFSi_pc_get_cwd\@TpdriveCPpobjB#VpcwdDlt)]FATFSi_pc_fndnodeGt/Zpath~5Yscratch|;fileext{LPfilenamezRPpdrivey^drivenoxXXpchildw^WpmomvdVpobjl4j]FATFSi_pc_get_inodepXpobjvPpmom|WfilenameVfileext^action^Ustarting4P]FATFSi_pc_get_momPTpdotdotYPclnoXPpfiVPpdTPsectornoSXpdriveRWpmom8]FATFSi_pc_mkchildVpmomPpdPpobj8ķ]FATFSi_pc_mknodeʷYpmomз[filenameַ fileextXattributesWinclusterܷnull_strdot_strattrUpdriveYpbuff5crdatePcltempTclusterC lfinode Ppdinodes^Zret_valZpobj^]FATFSi_pc_rmnodeVpobjUpdrivePcluster^]FATFSi_pc_update_inode"Vpobj^Wset_archive^Uset_date5crdate^Tid]FATFSi_pc_init_inode}(Updir.Pfilename4XfileextWattrclustersize:TcrdatedD]FATFSi_pc_ino2dosѿD@UpbuffDFTpdirtuL]FATFSi_pc_get_rootJuRWpdriveyXPpfix^VpobjwdPpdt]FATFSi_pc_firstblockjTpobjPclno^]FATFSi_pc_next_blockpTpobjPnxt]FATFSi_pc_l_next_blockivUpdriveTcurblockPcluster`5]FATFSi_pc_marki5|Tpfi5Xpdrive5Wsectorno5^Vindex`\]FATFSi_pc_scanic\Wpdrive\Vsectorno\^Uindex^Tpfi4~]FATFSi_pc_allocobjUpobj4D]FATFSi_pc_allociPpD]FATFSi_pc_free_all_drobjLVpdriveUpobj^Ti8]FATFSi_pc_free_all_iTpdriveĸWpfi8]FATFSi_pc_freeiʸTpfi ]FATFSi_pc_freeobj  иTpobjl7]FATFSi_pc_dos2inodev7ָUpdir7ܸTpbuffll^]FATFSi_pc_isavollPpobj^]FATFSi_pc_isadirPpobj^]FATFSi_pc_isroot3Ppobj apifrmat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^^Hdev_geometry ^dev_geometry_heads dev_geometry_cylinders ^dev_geometry_secptrack dev_geometry_lbas ^fmt_parms_valid fmtDEV_GEOMETRY4fmtparms >oemname secpalloc secreserved numfats secpfat numhide numroot mediadesc secptrk numhead numcyl "physical_drive_no $binary_volume_label (Otext_volume_labelFMTPARMS   777^^^]FATFSi_pc_calculate_chsWPtotalXcylindersWheadsVsecptrackUsTh\cXp^]FATFSi_rtfs_pc_get_media_parmspUpathpTpgeometryt`Ppdrr^PdrivenoX^]FATFSi_rtfs_pc_format_medianfTpathlWpgeometryrPpdr^Pdriveno^]FATFSi_rtfs_pc_format_volumexUpath~Zpgeometry^[partition_status^nibs_per_entryXsecpfat^ secpalloc^root_entriesYn_cylsXpartition_size^Wdrivenofmt^Vraw_mode_ioUpdr@]FATFSi_pc_fat_sizePnreservedPcluster_sizeUn_fat_copiesProot_sectorsvolume_sizeTnibs_per_entryPentries_per_blockPtotal_clusters@]FATFSi_get_format_parametersPnblocksPpsectors_per_allocPpnum_root_entries^Snum_root_entries^Psectors_per_alloc csstrtab.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\_FATFSi_string_tablertfs_string_table ^string_id string_valueRTFS_STRING_TABLEH]FATFSi_rtfs_strtab_stringrPptable^Pstring_id ]FATFSi_rtfs_strtab_user_string^Pstring_idXS rtfat16.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\7pJB^]FATFSi_pc_init_drv_fat_info16(hTpdrnPpbl01Pdiv31Vmax_index3*Pmax_indexXY^]FATFSi_pc_mkfs16|Y^drivenoYtZpfmtY^Yuse_raw|Pltotnibblese^Vret_vald[blocknocUjcPib^PfausizeaPldata_area`Plnclusters]Wltotsecs\zbuf[TbX } rtfat32.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\7pJ76767676B7C7CpJ7B77X`^]FATFSi_pc_init_drv_fat_info< Updr&Tpbl09Pmax_index`U]FATFSi_pc_get_parent_clusterU,PpdriveU2Ppobjb]FATFSi_pc_alloc_dirb8Updriveb>TpmomdPclusterdPclbasePn]FATFSi_pc_grow_dirnDUpdrivenJTpobjpPclusterpPtmpclP]FATFSi_pc_truncate_dir"PUpdriveVPpobjTclusterPtmpcl|^]FATFSi_pc_mkfs32U^Zdriveno\Ypfmt^Xuse_raw^Uret_val[blocknoPkWjViPldata_areaPlnclustersWltotsecsbbufhTb|{]FATFSi_pc_finode_cluster{nPpdr{tPfinode]FATFSi_pc_pfinode_cluster zPpdrPfinodePvaluep ^]FATFSi_pc_gblk0_32TdrivenoVpbl0Ubp  ^]FATFSi_pc_validate_partition_typePp_type ( ^]FATFSi_fat_flushinfo>UpdrPbufPpf( ` ^]FATFSi_fatxx_pfpdwordPpdrVindexUpvaluePppage`  ^]FATFSi_fatxx_pfgdword=PpdrVindexUvaluePppage 8 C apigfrst.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Hdstat *fname ;fext Llfname ]filename fattribute ftime fdate $fsize (^driveno ,^drive_opencounter 0npname 0pext 4path @pobj DpmomDSTAT     7 8 ]FATFSi_rtfs_pc_gdoneTstatobjPpdrive 8 x& csunicod.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\FATFSi_print_bufferBB   8 | "]FATFSi_pc_unicode_byte2upper("Pto"Pfrom$Rc|  5^]FATFSi_unicode_ascii_index5Rp5Tbase8^Pindex7c  H^]FATFSi_unicode_compareHPp1HPp2 $ ]^]FATFSi_unicode_compare_ncw]Rp1]%Vp2`+cp2_<cp1  u^]FATFSi_unicode_cmp_to_ascii_charuMPpuPc$ 4 |]FATFSi_unicode_assign_ascii_char/|SPp|Pc$T]FATFSi_map_ascii_to_unicodeYPunicode_to_Pascii_fromePp4 p ]FATFSi_map_unicode_to_asciikPtoqPfromp  ]FATFSi_pc_ascii_strn2upperwPto}Pfrom^PnSc^\i  ]FATFSi_pc_ascii_str2upperPtoPfromRc | ^]FATFSi_rtfs_cs_strcmpkUs1Ts2Pw2Pw1|  ^]FATFSi_rtfs_cs_strcpyPtargPsrc^Sloop_count  ^]FATFSi_rtfs_cs_strlen2Pstring^Rlen  ^]FATFSi_validate_filenameYnameascii_bufferuni_bufferXpuWpa^Vlen  ^]FATFSi_pc_cs_malias Yalias Xinput_file ^Wtry&^Vret_val%Pascii_alias$Pascii_input_file#Uscratch1"Tscratch]FATFSi_lfn_chr_to_unicode$Pto Pfr]FATFSi_unicode_chr_to_lfn{PtoPfr]FATFSi_pc_cs_mfile#Uto)Pfilename/Pext5temp_to^]FATFSi_pc_ascii_fileparse|FWfilenameLVfileextRUp^Pi$X]FATFSi_pc_ascii_mfile^PtodPfilenamejPextpTretval^^ivPpH-^]FATFSi_pc_ascii_malias-|Valias-Uinput_file-^Ttry0fileext0filename/^Ps/^Xi/^PnH ^]FATFSi_pc_valid_ascii_sfnYfilename^Xbadchar^Wext_start^Vperiod_count^Ulen x]FATFSi_unicode_make_printablePpPc^PixP%@K rtfatxx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\tFATFSi_fatxx_d(fat_driver fatop_alloc_chain [fatop_clnext fatop_clrelease_dir fatop_faxx fatop_flushfat fatop_freechain Pfatop_cl_truncate_dir fatop_get_chain fatop_pfaxxterm $(fatop_pfaxxFAT_DRIVER pdrOpstart_clusterUn_clustersdolink^7apdr}clno7^pdrclno7^pdrclnopvalue7^driveno^^pdrJclustermin_to_freemax_to_free7Vpdrclusterl_cluster7pdrstart_clusterpnext_clustern_clustersend_of_chain7^^pdr"clno7.^pdrVclnovalue777^77777777align1 wrdbuf fill77align2 Awrdbuf2 Rfill7^777777777xH]FATFSi_fatxx_alloc_chainH\ZpdrHbYpstart_clusterHXn_clustersH^[dolinkP^is_errorOPlast_clusterNvalueMWn_contigLVclnoKUfirst_new_clusterJTstart_clusterX]FATFSi_fatxx_find_free_clusterhXpdrWstartptVendptnUis_errorvaluePiXH]FATFSi_fatxx_clalloc<tUpdrWclhint^is_errorTclnoH9]FATFSi_fatxx_clgrow9zWpdr9Vclno=|Urange_check<Pnextcluster;Pnxtr^]FATFSi_fatxx_clrelease_dirMrTpdrrWclnot^Pcurrent_errno^]FATFSi_fatxx_flushfat^PdrivenoPpdr^]FATFSi_fatxx_freechain}ZpdrYclusterXmin_clusters_to_freeWmax_clusters_to_freeVclusters_freedUnextcluster]FATFSi_fatxx_cl_truncate_dirEVpdrUclusterTl_cluster^Zcurrent_errno|Yrange_checkPnextcluster?^]FATFSi_fatxx_pfaxxterm?Ppdr?PclnoW^]FATFSi_fatxx_pfaxxMWTpdrWZclnoWYvalue]Pt]Zoffset]Xindex\uP]FATFSi_fatxx_clnextUpdrPclnonxtP "^]FATFSi_fatxx_faxx}"Vpdr"Pclno"Upvalue- u2)u$result$Xoffset$Windex t!]FATFSi_fatxx_get_chaincZpdrYstart_clusteriXpnext_clusterWn_clustersoVend_of_chainPvalueUn_contigPnext_clusterPclnot!!u]FATFSi_fatxx_pfswap{PpdrPindex^Pfor_writePblock_offset_in_fat! "^]FATFSi_fatxx_fwordPpdrVindexUpvalue^TputtingPoffsetPppage "" ^]FATFSi_init_fat Ppdr" #^]FATFSi_faxx_check_free_spaceWpdr |VfreecountnxtUi #@#-^]FATFSi_init_fat32-Tpdr@#t#4^]FATFSi_init_fat164Tpdrt##;^]FATFSi_init_fat12<;Tpdr#|$J^]fat32_check_freespaceJUpdreltempO|TfreecountNQpdwM^ViLWpage_base|$P%s^]fat16_check_freespacesUpdrltempx|TfreecountwQpwv^ViuWpage_baseP%t&jq apiinfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\6P%%)^]FATFSi_rtfs_pc_set_default_drive)7Tdrive+^Pdrive_no%0&^]FATFSi_rtfs_pc_get_attributesX=WpathCTp_return^Vdriveno^Uret_valIPpobj0&t&!^]FATFSi_pc_getdfltdrvno't&' apiinit.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\{FATFSi_current_pdr^FATFSi_enabled_drivers777t&4'^]FATFSi_rtfs_initWpdr^Vj4''^]FATFSi_auto_format_disk\PpdrUdrivenamegeometry'']FATFSi_drno_to_stringTpname^Pdrno'h)ʱ portkern.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\55'(h]FATFSi_rtfs_port_alloc_mutex((]FATFSi_rtfs_port_claim_mutexPhandle( (]FATFSi_rtfs_port_release_mutex8Phandle (0(]FATFSi_rtfs_port_get_taskidn0(4(]FATFSi_rtfs_port_puts4((Y]FATFSi_pc_getsysdatef_Tpd-!dataPsecPminutePhourPdayPmonthPyear(h)6]RtcBCD2HEX6Pbcd:|^w9|Ri8\hex-apifastmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ alias_buffer ^alias_buffer_size ^alias_buffer_count alias_buffer_datavALIAS_BUFFERh)+C apimkdir.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\7666h)+^]FATFSi_rtfs_pc_rmdirZname^Yp_errnoXpdrive^[drivenofileextPfilenamePpath^Wret_valVpchildUpobjTparent_obj+2 apirealt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\7767fileseginfo |block |nblocksFILESEGINFOfreelistinfo cluster |nclusters FREELISTINFO+,(^]FATFSi_rtfs_pc_cluster_size (Tdrive,Ppdrive+^Uret_val*^Pdriveno,01^]FATFSi_rtfs_po_extend_file8 ^Tfdn_bytesnew_bytes start_cluster^ZmethodYpdrXpfileclusters_in_chainrange_checkWnew_file_sizeQnew_alloced_sizeValloced_size0iUlast_cluster_in_chain4first_cluster largest_chainTn_clusters$ltemp(n_allocedPclno^[ret_val012]FATFSi_pc_find_contig_clusters pdrZstartptpchainYmin_clusters^XmethodWendptlargest_chain largest_sizeVFATFSi_chain_sizeUchain_start[best_sizeTbest_chainvaluePi[2Aprblock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\B7T@BBPAB7PABBBBPAB7PAB7BPABPABPABBB7BPAB7PABBBB7BPABdBB7T@T@R>7T@T@R>R>T@T@R>T@T@R>T@R>T@R>T@R>T@T@T@T@T@22,^]FATFSi_block_devio_writeq,bRpblk223^]FATFSi_fat_devio_write3hPpdrive3nSpblk3^Pfatnumber2T3U]FATFSi_pc_release_buf'UtTpblkT3 4y]FATFSi_pc_discard_bufyzUpblk{Tpbuffcntxt H ]FATFSi_pc_read_blk YpdriveXblocknoWpbuffcntxtVpblk 4x4]FATFSi_pc_scratch_blkMUpblkx44 ]FATFSi_pc_free_scratch_blk UpblkPpbuffcntxt45(]FATFSi_pc_init_blk4(Wpdrive(Vblockno+Upbuffcntxt*Tpblk5x6c]FATFSi_pc_free_all_blkcYpdriveg^XdeletingfWpblkeVpbuffcntxtx66^]FATFSi_pc_write_blkPpblk66]FATFSi_pc_add_blk[PpbuffcntxtPpinblk6 7]FATFSi_pc_release_blkPpbuffcntxtPpinblk\pblk 77]FATFSi_pc_find_blkR PpdrivePblocknoSpblkRpbuffcntxt78]FATFSi_pc_allocate_blkX"Xpdrive(Wpbuffcntxt^loop_guard^Upopulated_but_uncommited.Qpblkscan4Ppfoundblk:Tpuncommitedblk@Ppfreeblk891]FATFSi_pc_flush_chain_blk1FYpdrive1Xcluster5LWpblk4Vblockno3^Ui9:T^]FATFSi_pc_initialize_block_poolTRZpbuffcntxtT^YnblkbuffsUXXpmem_block_poolU^Wblk_hashtble_sizeU^(pblock_hash_tableYjVpblkW^Ui:;w^]FATFSi_pc_flush_fat_blocks}wpUpdrive|PbzvQplastz|XpblkyPpfatbuffcntxt;?]FATFSi_pc_map_fat_blockdXpdriveWblocknoVusage_flagsPbQpblkscanPpblkPpfatbuffcntxt^Phash_index?P?^]FATFSi_pc_initialize_fat_block_poolzPpfatbuffcntxt^Pfat_buffer_sizePpfat_buffers^Pfat_hashtbl_sizepfat_hash_tablepfat_primary_cachepfat_primary_indexP?$@]FATFSi_pc_free_all_fat_blocksXpfatbuffcntxtWpblk^Vi$@X@]FATFSi_pc_find_fat_blkiPpfatbuffcntxtPblocknoPpblkX@@]FATFSi_pc_commit_fat_blkPpfatbuffcntxtPpblk@ A]FATFSi_pc_commit_fat_tableQUpfatbuffcntxtPpblk^PiVb AA]FATFSi_pc_sort_committed_blocksPpfatbuffcntxt Vpblk_source_scanUpsortTpsorted_list^pprev$\pblkwAH:rtkernfn.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\FATFSi_med_st^x77C6666CCBCAB^]FATFSi_rtfs_resource_initB(C"]FATFSi_rtfs_get_system_user%Xt$^Wj$^\i(CCi]FATFSi_pc_free_all_usersAi^Wdrivenok^UiCC^]FATFSi_rtfs_set_errno^TerrorC D^]FATFSi_rtfs_get_errno D8D]FATFSi_pc_report_error ^Terror_number8DD^]FATFSi_critical_error_handler ^Pdriveno^Xmedia_status^Wneeds_flushVpdrinbufDE'^]FATFSi_pc_nuserfiles E#\buffer(Pcount(^reading^]FATFSi_defaultRtfsCtrl$>^Pdriveno>^Wopcode>D#UpargsAgc@J#Ppdr`JM1}drfile.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\)FATFSi_file_heads+FATFSi_file_cylinders*FATFSi_file_secptrack'FATFSi_file_capacity(FATFSi_file_adjusted_capacity")&FATFSi_fileDescListh^7`JKG^]FATFSi_fileRtfsIo'G^ZdrivenoGPblockG:&YbufferGXcountG^(readingJdmyI^ViI^UresultKXMp^]FATFSi_fileRtfsCtrl'p^Ydrivenop^Xopcodep@&Zpargsudmyufile_sizesgcrF&PpdrXMM/^]FATFSi_fileRtfsAttach_(/^PfileDesc/^Pdriveno27pdr1^PresultMQattach.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^FATFSi_rtfs_first_attach[)FATFSi_rtfs_first_stat_flagh^7,77MOC^]FATFSi_rtfs_attach *C^XdrivenoCl)WpdrCr)Vdev_nameEx)Utarget_pdrOQ^]FATFSi_rtfs_detachg*^Zdriveno~)Vtarget_pdrQTdSrtfs_twl_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\BB776C66667667676776666766667B6567QR5^]pc_fill_blk9-5+Ppblk5^PblocknumR4RO^]block_devio_fill-O+RpblkO^Qblocknum4RS^]FATFSi_rtfs_pc_gfirst_ex.+Zstatobj%+Yscf++Xname^Wget_lfname1+Ppdrive^Vdriveno7+fileextH+PfilenameN+PmompathSU^]FATFSi_rtfs_pc_gnext_ex%/T+XstatobjZ+Wscf^Vget_lfname`+Ppdrivef+PnextobjUU%]pc_upstat_ex/%l+Xstatobj%r+Wscf%^Yget_lfname(x+Vpi'~+UpobjUVS+]pc_get_inode_exw0S+WpobjS+PpmomS+VfilenameS+UfileextS^ actionS^$get_lfnameU^TstartingV(X^]FATFSi_rtfs_pc_cache_clusters>1^Ufd+Zbuf[buf_sizestart+Vpdrive+Upfile^Tret_val(XX^]rtfs_get_next_cluster_cache72+PpfilePfile_pointer+PclnoPnext_of_end_index^start_index\cluster_index+Ppdrive^SresultXZ@^]rtfsi_pc_cache_clusters4@+Zpfile@Yfile_pointer@+Xbuf@buf_size@+Wstart_indexmPnew_indexMnow_indexMPindex_numL$next_clusterLfirst_clusterKPn_clusters_to_eofKPn_clustersK[n_clusters_to_seekJ^PindexI^PiH^(end_of_chainG^log2_bytespclusterFbytespclusterE+Pfat16_bufD+Pfat32_bufC+TpdriveB^ ret_valZH[^]FATFSi_twfs_po_open!5+PnamePflagPmode+Ppfile^UfdH[[^]FATFSi_twfs_pc_get_fatbits5+Ppdrive^Pret_val[|^^]FATFSi_rtfs_pc_mv_ex7+Told_name,Znew_name^Yp_errno,PpdrivePcluster^[ret_val,Xnew_parent_obj,Wnew_obj^new_driveno,fileext+,Pfilename1,Ppath7,Vold_parent_obj=,Uold_obj^ old_driveno|^_G^]FATFSi_rtfs_pc_mkdir_ex8GC,ZnameQ^Yp_errnoPI,XpdriveO^WdrivenoN^Vret_valMO,fileextL`,PfilenameKf,PpathJl,Uparent_objIr,Tpobj_bx,]pc_mknode_ex9~,Ypmom,Xfilename,[fileext attributesWincluster,null_str,dot_str,Updrive,Vpbuff5crdatePcltempTclusterClfinode,Ppdinodes^Zret_val,Zpobjbc}^]FATFSi_twfs_pc_set_propertiesc:},Tpath}Xattributes},Wst_mtime^Vdriveno^Uret_val,Tpobjcc^]twfs_ismountedname:,Pname^Tret_val^drivenocTd^]twfs_ismounteddrive>;^Udriveno^Tret_val,PpdrTdg\rtfs_twl_vfat_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\6TBCyGBTdgJ^]pc_findin_ex=J;ZpobjJ;filenameJ^YactionJ^[get_lfnameX;PpWWlastsegorderVFsU<Plfn_nodeT<sfnS<PlfnR<VscratchQ^PdowildcardP^PmatchfoundO$<PpfiN*<UpiM0<PpdL6<Trbuf>gLmsdmc_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\N^first_select7>FATFSi_func_SDCARD_Out6> FATFSi_func_SDCARD_In>>@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_PORT_CARDSDMC_PORT_NANDD -ASD_CID >ASD_CSD OASD_OCR $`ASD_SCR ,SD_RCA .6mSDCARD_MMCFlag 06mSDCARD_SDHCFlag 26mSDCARD_SDFlag 4qASDCARD_ErrStatus 8SDCARD_Status <SD_CLK_CTRL_VALUE >SD_OPTION_VALUE @6mOutFlag Bport_no?SDPortContext@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTqA>AAA CC(C7C  Cbuf bufsize offset ^fill Cfunc Dinfo operation ?portFCSDCARDMsgDQD b_flags result residDSdmcResultInfoQDQDQDQD Val DPSel L Hg(hh]FATFSi_sdmcGetErrCodeEh?PporthBPrehBPdekB\SDPortTargetContext(hh^]FATFSi_sdmcIsFatalErr2F?Pport^Pfatal_flagBQSDPortTargetContext>PdeqAPrehi^]FATFSi_sdmcIsAbortErrF?PportBPSDPortTargetContextqAPrei0i-qA]FATFSi_sdmcSetInsertCallbackF-CPcallback0iPiAqA]FATFSi_sdmcSetRemoveCallbackGGACPcallbackPiiUqA]FATFSi_sdmcGoIdleGUPportsU"CPfunc1U1CPfunc2X@Cinit_msgWCSdMsgijx]sdmcPostSleep3H{fDrecv_datzCSdMsgjtjqA]FATFSi_sdmcWriteAesFifoHlDPbufPbufsizePoffset?PportrD0infoxDrecv_datCSdMsgtjj=qA]sdmcFillAesFifoI=~DPbuf=Pbufsize=Poffset=?Pport=D0info@Drecv_dat?CSdMsgj\kgqA]FATFSi_sdmcWriteFifotJgDPbufgPbufsizegPoffsetg?PportgD0infojDrecv_datiCSdMsg\kkqA]sdmcFillFifo-KDPbufPbufsizePoffset?PportD0infoDrecv_datCSdMsgklqA]FATFSi_sdmcSelectKVselectDSDCARD_PSellLm>qA]FATFSi_sdmcSetLatencyEmulationL>PenableAErecv_dat@CSdMsgwLmo)sdmc_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\EMD}SdmcCache  0Mport ^valid offset gMbufLSdmcCacheInfo@enumSDMC_PORT_CARDSDMC_PORT_NAND@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTQDQDO~MbufIObufsizeoffsetCLmhm^]sdmcInitCacheOhmmm]sdmcInvalidateCacheOm0MPportmn^]sdmcIsHitCache^PxMPbuf\bufsizePoffset0MPportPcache_offset_endnn~M]sdmcCacheReadAesFifoQNPbufPbufsizePoffset0MPportN0infoNrecv_datCSdMsgno~M]sdmcCacheReadFifoQOPbufPbufsizePoffset0MPport O0infoOrecv_datCSdMsgoo>~M]SDCARDi_CacheAccessR>OXAccessFunc>Wlimit>OOVSdMsgAUOToriginal_buf@~MPapi_resultop5Lsdmc_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\$SD_port_en_numbersP ~SD_INFO1_VALUEFATFSi_sdmc_dma_noT ~SD_INFO2_MASK_VALUEX ~SD_INFO_ERROR_VALUE\ ~SD_INFO1_MASK_VALUE` ~SD_INFO2_VALUEFATFSi_sdmc_dma2_no^(FATFSi_thread_flag^,SDCARD_UseAesFlag0FATFSi_ulSDCARD_Size^4sdmc_abort_request;Y8FATFSi_sdmc_dtq_arrayRY<sdmc_slpq_arrayu^@FATFSi_sdmc_tsk_createdd ~FATFSi_ulSDCARD_SectorCountiYh ~FATFSi_pSDCARD_BufferAddroYDFATFSi_sdmc_result_dtq_arrayYSDNandContexttHsdmc_srandl ~FATFSi_ulSDCARD_RestSectorCountp ~SDCARD_SectorSize= Ltimeout_ms^PSDCARD_EndFlag[ SDPortCurrentContextsdmcRandEnableJ[TSDCurrentAccess Y[`FATFSi_aesCounterDefault[pFATFSi_sdmc_intrq_arrayLsdmc_slpqLFATFSi_sdmc_intrqLľFATFSi_sdmc_dtqLFATFSi_sdmc_result_dtqFATFSi_sdmc_almU]0FATFSi_sdmc_current_specd]dSD_SDSTATUSASDPort1ContextASDPort0ContextN,FATFSi_sdmc_intr_tskNFATFSi_sdmc_tsku]tFATFSi_sd_intr_stack]tFATFSi_sd_stackLYcYYA@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTA  operation offset len[SDAccessAESCounter [bytes [wordsY[AESCounter[4 csd_ver2_flag memory_capacity protected_capacity card_capacity adjusted_memory_capacity heads secptrack cylinders SC BU RDE SS $RSC (FATBITS *SF ,SSA 0NOM[SdmcSpec@ U UAA@enumSDMC_USE_DMA_4SDMC_USE_DMA_5SDMC_USE_DMA_6SDMC_USE_DMA_7SDMC_NOUSE_DMA@enumSDMC_PORT_CARDSDMC_PORT_NANDAC^Ybuf^bufsizeoffsetCop]FATFSi_sdmcInitAesCounterU_]md]bufferpp5]FATFSi_sdmcSetAesCounter_5Usector7Y[counterp0qL]FATFSi_sdmcStartAes `LUsectorLTcount0qxq]sdmcInitContextQ`]Usd_contextxqTrY]sdmcCheckPortContext`]Vbuf_adrYUresultTrr?]i_sdmcEnable`A^Plast_irqrrA^]OS_DisableIrq'aAPprepruY]FATFSi_sdmcInita]Pdma_no]Pdma2_no^Plast_irqYPapi_resultuuY]FATFSi_sdmcResetaPirq_core_flaguvY]i_sdmcInit/bUportsv}#Y]SDCARD_LayerInitb&^Yretry%YPresult},5]FATFSi_i_sdmcCalcSizec8Wmult_val8Vread_block_len_val7UulCSize,$Y]SDCARDi_ReadAesFifoc;^[bufTbufsize offset YposYXresult$,tY]SDCARDi_ReadFifodtA^WbuftVbufsizetUoffsetvYPresult,tY]SDCARDi_ReaddG^PbufPbufsizePoffsetYPresult Y]SDCARDi_ReadCoreeM^XbufZbufsizeYoffset^Xlast_irqt#]SDCARD_TimerStartee#Vtim+^Plast_irqA]SDCARD_TimerStopeI^Plast_irq]FATFSi_i_sdmcErrProcess$fYUErrBackupTStatusBackupusRSP0_^]sdmcIsProtectedf_S^Pportc^RSDTargetContextaTcsd_wp$Y]SDCARDi_WriteAesFifo*g^UbufTbufsize offsetYposYXresult$"Y]SDCARDi_WriteFifog"^Ybuf"Xbufsize"Woffset$YPresultsY]SDCARDi_Write$hs^PbufsPbufsizesPoffsetuYPresultH  Y]SDCARDi_WriteCoreh^WbufZbufsizeYoffset^Zk^[last_irq ]SDCARD_Thread&i YYapi_result ^current_dat ^XSdMsgp Y]SDCARDi_Accessj ^AccessFunc limit ^USdMsg YPerr_status Prrms ^Ws_retry ^Zretry Ypos Plen Xoffset ^[ptr  last_r1status Wr1status Ylast_result YVresult XI}hgwsdmc_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\L tsd_last_info1[ kxSDCARDi_TransferM ^SDCARD_EndByDmaFlag ^|ikXI}I} ]SDCARDi_CpuRecvFast{l k srcp kQdestp RsizeI}I} ]SDCARDi_CpuSendFastl kPsrcp kQdestp Rsizep ]SD_OrFPGACm kUreg Tvalue ^Pb_irqD^]OS_DisableIrqmDPprep ]SD_AndFPGAm kUreg Tvalue ^Pb_irq ]SD_SetFPGA?n kUreg Tvalue ^Pb_irq  ]SD_GetFPGAn kUdest kTreg ^Pb_irq \ ]SD_ClrFPGAo kUreg Tvalue Pread_value ^Pb_irq\ ]SDCARD_SetAbortVo ^Pb_irq ]SDCARD_ResetAborto ^Pb_irq- ]SDCARD_irq_HandleroS ]NDMA_irq_HandleroԒm ]SDCARD_Timer_irq`pm lTarg Ptimeout_spec now_restԒ, ]SDCARD_Abortp, ]SDCARD_TerminateForcep ^Tstop_com_flag ]SDCARD_ReadyToEndq ]SDCARDi_CpuReadFifoAesUq ^Uk ^iX$ ]SDCARDi_DmaReadFifoAesq' ^Wk& ^iX45 ]SDCARDi_CpuWriteFifoAesr8 ^Uk7 ^i4K ]SDCARDi_DmaWriteFifoAesVrN ^TkM ^iPa ]SDCARDi_CpuReadFiforPi ]SDCARDi_CpuReadBufrt ]SDCARDi_CpuWriteFiforx} ]SDCARDi_CpuFillFifosx ]SDCARDi_CpuWriteBuf dPpacket  ]FATFSi_CommandMountSpecial ZargP stat? зarchivepath$ Ppath# Wletter Vfile ^[usedLetter ^Pi offsetMap ^Pbit ^Rpos ^Vi ^Sforbidden  drive ^Uslot special ^isShr ^PisPub ^Wletter Pinfo  Vspecial Ttable Ppacket T ]FATFSi_CommandSetNdmaParametersv Targ PpacketT  ]FATFSi_CommandFormatSpecialm Zarg geometry ^Vsucceeded ^Uletter Vinfo Tname tmppath drive Ppacket L ]FATFSi_CommandSetLatencyEmulation YTarg  Presult _PpacketL ]FATFSi_CommandSearchWildcard ںZargZ ^PcM shortnameK ^YnummerJ ^XposF ^PsuffixLenE ^WprefixLenD PsuffixC Pprefix9 ^Xopendir' ^Qc$ ^Ui# Pidlow ^pos tmppath Ppath drive Vdir Ppacket@ ]FATFSi_SDInsertCallback@T ]FATFSi_SDRemoveCallbackTt ^]FATFS_Init: Wdma1 Udma2 Tpriority Yfilesize 4stat ^PvalidSize Eunipath Xhandle ^Plen V0drive gWinfo  Presult ^Vretvalt ^]FATFSi_NTLowerStringl mZshort_dest sYlong_dest Xscf yWfname 8fext Utarget_fext Ptarget_fname Pdest Psrc myfext myfname ^Ti<Рfatfs_request.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\4 8FATFSiLastError5$8FATFSiResultBufferListbHFATFSiCommandBuffer3@8FATFSiRequesta8FATFSiCommandBufferDefault FATFSResultBuffer hnext nthread tcommand result zreservedFATFSResultBufferN,,FATFSRequestContext Uwait_q fdone_list lbuffer_mutex $}buffer_normal (buffer_emergencyFATFSRequestContextz,FATFSCommandInitialize header unicode2sjis_array sjis2unicode_array arclistFATFSCommandInitialize,]FATFSi_InitRequest0]FATFSi_SendToPXIParg0|]FATFSi_AllocateCommandBufferxUcommandPheader|U]FATFSi_FreeCommandBufferUPbufferTx]FATFSi_NotifyRequestCompletionnxUargRqqRp^QfoundPheaderzTbak_cpsrT]FATFSi_WaitForRequestXargQppWbak_cpsr^VbusyPtarget<]FATFSi_SyncInitialization^UarclistPargC<lfatfs_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\* HFATFSiThread 1 FATFSThreadContext task_list thread stack1FATFSThreadContextN <:]FATFSi_AppendRequestj:Ttarget:^VisARM9=Qpp<Ubak_cpsrV]FATFSi_CommandThread^Xbak_cpsrYVsync9_headerX^Usync7]FATFSi_PostRequest Parg]FATFSi_PXICallbackaPdata]FATFSi_InitThreadPpriorityxfatfs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\,FATFSFileInfo +shortname <longname Mpadding length dos_atime dos_mtime $dos_ctime (attributesOFATFSFileInfo,,,,.,OTo]FATFSi_CopyUnicodeStringoCPdstoIPsrco^Plenq^PiT"^]FATFS_MountDrive"^Xname"Wmedia"Vpartition%dTarg$^Pretval^]FATFS_CloseFileUfilejTarg^PretvalxI]FATFS_OpenFileWkIpXpathIvWmodeL|PargKTretval6 |Haes_lo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\xaHispCallbacky~LisCallbackParami08DMA_CONFIGgargx AESNonce bytes wordsAESNonce   Y[AESMacLengthAES_MAC_LENGTH_4AES_MAC_LENGTH_6AES_MAC_LENGTH_8AES_MAC_LENGTH_10AES_MAC_LENGTH_12AES_MAC_LENGTH_14AES_MAC_LENGTH_16AES_MAC_LENGTH_MAXAESMac bytes !wordsAESMacAESKey bytes words2AESKeyId2AESKey2AESKeySeed22AESKeySlotAES_KEY_SLOT_AAES_KEY_SLOT_BAES_KEY_SLOT_CAES_KEY_SLOT_D3@3AESModeAES_MODE_CCM_DECRYPTAES_MODE_CCM_ENCRYPTAES_MODE_CTRAES_MODE_CTR_ENCRYPTAES_MODE_CTR_DECRYPTg|]AES_Reset]AESi_InterruptHandlerL]AES_SetNoncePpNonce$]AES_SetCounterPpCounter$x]AES_SetMac*PlengthPpMacPregx#]AES_SetKeyCd#PpKeyM]AES_SetKeySeedAMPpKey`]AES_LoadKey`PslotgPreg]AES_WaitKey8]AES_DmaSendPdmaNo'PsrcPsize-PcallbackFarg8\]AES_DmaRecv(PdmaNoLPdstPsizeRPcallbackXarg\l]AES_Send_Pdatal|]AES_Recv|^]AES_IsIFifoFull,]AES_RunN,^Pmode,PaBlockNum,PpBlockNum,Pcallback,arg?Preg,f]AES_Waitq,Hz^]AES_IsVerificationSuccessP*aes_hi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ZPisMacSize[TisFractionSizeTXisDmaNoForSendU\isDmaNoForRecvX`isSrcSizeYdisDstSizekHsNextSlot\!LspSrc]'hispDst_-lisFraction^Y[|isCounteriY[isRandCountergzisMutexcLisThreadQbNisThreadd>xjsThreadQBuffereUxksThreadStackO?8ThreadOpOP_PXI_SET_KEYOP_PXI_INIT_RANDOP_PXI_RANDOP_PXI_CTROP_PXI_CCM_ENCRYPTOP_PXI_CCM_DECRYPTOP_PXI_FOR_JPEGOP_PXI_CALC_MAC OP_CB_DMA_SEND_FINISHED OP_CB_AES_FINISHED OP_CB_AES_CTR_CONTINUE OP_CB_AES_CCM_ENC_FINISHEDOP_CB_AES_CCM_DEC_FINISHEDY[AESResultAES_RESULT_NONEAES_RESULT_SUCCESSAES_RESULT_VERIFICATION_FAILEDAES_RESULT_INVALIDAES_RESULT_BUSYAES_RESULT_ON_DSAES_RESULT_UNKNOWNAES_RESULT_MAX$AESPxiData key src srcASize srcPSize macLength dstAESPxiDataAESPxiKey 2key Y[counter nonceRomAccessControl common_client_key hw_aes_slot_B hw_aes_slot_C sd_card_access nand_access game_card_on shared2_file hw_aes_slot_B_SignJPEGForLauncher game_card_nitro_mode hw_aes_slot_A_SSLClientCert hw_aes_slot_B_SignJPEGForUser photo_access_read photo_access_write sdmc_access_read sdmc_access_write backup_access_read backup_access_write common_client_key_for_debugger_sysmenuRomAccessControlP]SetupDefaultFractionfPpDataPdataSize^\i]StepSubKeylPp ]ExclusiveOrAesBlock rPa xPb^\iU]CallbackSendMessage]U~Pargn]AesRunoQsrcpPsrcASizeqPsrcPCSizerWdsts^ aesModet$finishMsg{VpBlockNumzUaBlockNumyTdmaRecvSizexPdmaSendSizewPdstSizevPsrcSize ]CtrRunPpCounter\srcPsrcSizeVdst !0^]IsValidAddressi0Pptr0Plength2Paddr!|(R]AesThread 5Vresult)^Wi(0mactmpXpCpuDst8PpCpuDst32WcpuRecvSizePdmaRecvSizeY[counterPnextSrcSizePnextDstPnextSrc^ViFWsrcASizeEVfractionBegin=pxiDataPpMacSrcpxiDatamacpxiDatapxiDataVresultdst|seed{2keyh2keyYPopParamXVopW packed|((a]PxiCallbackV aPdataa^Perr()]AES_Init PdmaSendPdmaRecvUpriority^TbClearPprac)\*]AES_CoreA Psrc UdstPdst32\**]AES_Randx VpDst**!]AES_Lock **']AES_Unlock *T,Aaes_fifo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\LLAESPxiCommandAES_PXI_COMMAND_SET_KEYAES_PXI_COMMAND_INIT_RANDAES_PXI_COMMAND_RANDAES_PXI_COMMAND_CTRAES_PXI_COMMAND_CCM_ENCRYPTAES_PXI_COMMAND_CCM_DECRYPTAES_PXI_COMMAND_FINISHEDAES_PXI_COMMAND_RESULTAES_PXI_COMMAND_FOR_JPEGAES_PXI_COMMAND_CALC_MAC AES_PXI_COMMAND_MAX *(+H]AESi_PxiSendFirst7H^VtagHPcmdHPdata(++]AESi_ReceiveData[ YpQa XpBufferWsize^Voffsetbufferg Pp8+4,]AESi_PxiHandler(m PpQPdata4,T,]AESi_PxiSendResult}s PcmdQresultT,,`aes_common.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\Y[T,,7]AES_AddToCounter7PpCounter7PvalueF^Ri=PlswptHstubs_isd.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\stubs\isd\common\src\pt,]_ISDbgLib_Initializej#"twvr_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\ state aid %macAdrs rssi capaInfo authSeed supRateSet rsv lastSeqCtrl frameCount lifeTime maxLifeTime WlStaElementWmInit dmaNo indPrio_low indPrio_high reqPrio_low reqPrio_high wlPrio_low wlPrio_high6WmInit4 workingMemAdrs stack stacksize priority 'sendMsgQueuep 'recvMsgQueuep dmaChannel dmaMaxSize heapType $-heapFunc ,camAdrs 0camSizeWlInitL Uos ext Uid ^heapHandle alloc freeWMCallback apiid errcode wlCmdID wlResultWMCallbackWMSPWork LtoWLmsgQ toWLmsg (LfromWLmsgQ HfromWLmsg XLconfirmQ xconfirm LrequestQ request (requestStack ("indicateStack (zfifoExclusive @dmaNo DUarenaId H^heapHandle L3wm7buf PS4status TY4rssiHistory trssiIndex xindPrio_high |wlPrio_high reqPrio_high indPrio_low wlPrio_low reqPrio_low wmInitializedLWMSPWork 9WMArm7Buf status  4reserved_a )fifo7to9 14reserved_b -connectPInfo B4requestBuf9WMarm7Buf9WMArm7BufWMStatus state BusyApiid ^apiBusy ^scan_continue ^mp_flag ^dcf_flag ^ks_flag ^dcf_sendFlag ^VSyncFlag T'wlVersion (macVersion *rfVersion ,e'bbpVersion 0mp_parentSize 2mp_childSize 4mp_parentMaxSize 6mp_childMaxSize 8mp_sendSize :mp_recvSize <mp_maxSendSize >mp_maxRecvSize @mp_parentVCount Bmp_childVCount Dmp_parentInterval Fmp_childInterval HUmp_parentIntervalTick PUmp_childIntervalTick Xmp_minFreq Zmp_freq \mp_maxFreq ^mp_vsyncOrderedFlag `mp_vsyncFlag b6mmp_count d6mmp_limitCount fmp_resumeFlag hmp_prevPollBitmap jmp_prevWmHeader lmp_prevTxop nmp_prevDataLength pmp_recvBufSel rmp_recvBufSize tv'mp_recvBuf |)mp_sendBuf mp_sendBufSize mp_ackTime mp_waitAckFlag mp_readyBitmap mp_newFrameFlag )reserved_b mp_sentDataFlag mp_bufferEmptyFlag mp_isPolledFlag mp_minPollBmpMode mp_singlePacketMode )reserved_c mp_defaultRetryCount mp_ignoreFatalErrorMode mp_ignoreSizePrecheckMode mp_pingFlag mp_pingCounter )dcf_destAdr )dcf_sendData dcf_sendSize dcf_recvBufSel )dcf_recvBuf dcf_recvBufSize curr_tgid linkLevel minRssi rssiCounter beaconIndicateFlag wepKeyId pwrMgtMode miscFlags VSyncBitmap valarm_queuedFlag v_tsf v_tsf_bak v_remain valarm_counter \+reserved_e m+MacAddress mode ~+pparam (g-childMacAddress child_bitmap -pInfoBuf aid 1parentMacAddress scan_channel 2reserved_f wepMode ^wep_flag 2wepKey rate preamble tmptt retryLimit enableChannel allowedChannel "2portSeqNo D2sendQueueData 3sendQueueFreeList 3sendQueue 3readyQueue zsendQueueMutex 4^sendQueueInUse 83mp_lastRecvTick Ump_lifeTimeTick mp_current_minFreq mp_current_freq mp_current_maxFreq mp_current_minPollBmpMode mp_current_singlePacketMode mp_current_defaultRetryCount mp_current_ignoreFatalErrorMode 4reserved_gWMStatusWMstatus''6WMMpRecvBuf )rsv1 length )rsv2 ackTimeStamp timeStamp rate_rssi *)rsv3 ;)rsv4 L)destAdrs ])srcAdrs $n)rsv5 *seqCtrl ,txop .bitmap 0wmHeader 2)data'WMmpRecvBuf'WMMpRecvBuf))0WMDcfRecvBuf frameID *rsv1 length *rsv2 rate_rssi +rsv3 +destAdrs )+srcAdrs $:+rsv4 ,K+data)WMDcfRecvBuf)WMdcfRecvBuf@WMParentParam )userGameInfo userGameInfoLength padding ggid tgid entryFlag maxEntry multiBootFlag KS_Flag CS_Flag beaconPeriod 4-rsv1 "E-rsv2 2channel 4parentMaxSize 6childMaxSize 8V-rsv~+WMpparam~+WMParentParamZx--WMBssDesc length rssi /bssid ssidLength */ssid ,capaInfo .;/rateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @j/gameInfo-WMbssDesc-WMBssDesc  basic supportWMGameInfo magicNumber ver platform ggid tgid userGameInfoLength 0__anon gameNameCount_attribute attribute parentMaxSize childMaxSize .1__anon e1userGameInfo v1old_typej/WMGameInfoj/WMgameInfo gameNameCount_attribute attributep e1userGameInfo v1old_typep7p 1userName 1gameName 1padd1X+P'32n3  next port destBitmap restBitmap sentBitmap sendingBitmap padding size seqNo retryCount )data 3callback argU2WMPortSendQueueData3 head tail3WMPortSendQueue33U t]WVR_Shutdown4$4}5}2wmsp_system.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMIndCallback apiid errcode state reason,5WMindCallback,5WMIndCallback WMMpRecvData length rate_rssi aid noResponse wmHeader o6cdata5WMmpRecvData5WMMpRecvDataWMMpRecvHeader bitmap errBitmap count length txCount 97data6WMmpRecvHeader6WMMpRecvHeader 5 8wlRsv 69header H9staMacAdrs retryLimit enableChannel rsv mode rate wepMode "wepKeyId $Y9wepKey tbeaconType vprobeRes xbeaconLostTh zactiveZoneTime |{9ssidMask preambleType authAlgoJ7WlParamSetAllReq  code length 9WlCmdHeaderPj9   69header resultCode9WlParamSetCfm$4}5}@]WMSP_GetAllowedChannelx:@PbitFieldg|TiE|^centerD|PminC|\maxBPtempwmsp_indicate.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ c;wlRsv 69header t;buf;WlCmdReq @ ;wlRsv 69header =ack;WlMaMpAckInd 0 *=rsv1 length txKeySts rsv3 timeStamp rate rssi ;=rsv4 L=rsv5 ]=destAdrs n=srcAdrs $=rsv6 *seqCtrl ,tmptt .bitmap;WlRxMpAckFrame;wmsp_wl_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ 69header resultCode/>WlMlmeResetCfm >wlRsv 69header mibw>WlMlmeResetReq  69header resultCode>WlMlmePowerManagementCfm>WlMlmePowerMgtCfm ?wlRsv 69header pwrMgtMode wakeUp recieveDtimsF?WlMlmePowerManagementReqF?WlMlmePowerMgtReq N 69header resultCode foundMap bssDescCount @bssDescList@WlMlmeScanCfmD1BD length rssi ABbssid ssidLength RBssid ,capaInfo .cBrateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @B__anon @BgameInfo @BotherElement@WlBssDesc  basic support_element BgameInfo BotherElementT CwlRsv 69header Dbssid ssidLength Dssid 8scanType :$DchannelList JmaxChannelTime LbssidMaskCount N5DbssidMaskBWlMlmeScanReq   69header resultCode statusCode DpeerMacAdrsFDWlMlmeJoinCfmX LEwlRsv 69header timeOut rsv 1BbssDescDWlMlmeJoinReq  69header resultCode statusCode FpeerMacAdrs algorithm]EWlMlmeAuthenticateCfm]EWlMlmeAuthCfm FwlRsv 69header FpeerMacAdrs algorithm timeOutFWlMlmeAuthenticateReqFWlMlmeAuthReq   69header resultCode ^GpeerMacAdrsFWlMlmeDeAuthCfmFWlMlmeDeAuthenticateCfm HwlRsv 69header HpeerMacAdrs reasonCodeoGWlMlmeDeAuthReqoGWlMlmeDeAuthenticateReq   69header resultCode statusCode aid$HWlMlmeAssCfm$HWlMlmeAssociateCfm PIwlRsv 69header aIpeerMacAdrs listenInterval timeOutHWlMlmeAssReqHWlMlmeAssociateReq   69header resultCode statusCode aidrIWlMlmeReAssociateCfmrIWlMlmeReAssCfm JwlRsv 69header JnewApMacAdrs listenInterval timeOutIWlMlmeReAssociateReqIWlMlmeReAssReq  69header resultCodeJWlMlmeDisAssociateCfmJWlMlmeDisAssCfm KwlRsv 69header KpeerMacAdrs reasonCode.KWlMlmeDisAssociateReq.KWlMlmeDisAssReq  69header resultCodeKWlMlmeStartCfm@ EMwlRsv 69header ssidLength VMssid 2beaconPeriod 4dtimPeriod 6channel 8basicRateSet :supportRateSet <gameInfoLength >gMgameInfo)LWlMlmeStartReq  ( 69header resultCode reserved NccaBusyInfoxMWlMlmeMeasChanCfmxMWlMlmeMeasureChannelCfm ( NwlRsv 69header rsv ccaMode edThreshold measureTime OchannelList!NWlMlmeMeasChanReq!NWlMlmeMeasureChannelReq  69header resultCode txStatusOWlMaDataCfm0 frameId Prsv1 length status rsvm1 rsvm2 rate rssi rsvm3 Prsv4 PdestAdrs PsrcAdrs $Prsv5 ,PdatapsOWlTxFrame@ FQwlRsv 69header PframePWlMaDataReq  69header resultCodeWQWlMaKeyDataCfm "RwlRsv 69header length wmHeader PkeyDatapQWlMaKeyDataReq  69header resultCode3RWlMaMpCfm$ sSwlRsv 69header resume retryLimit txop pollBitmap tmptt currTsf dataLength wmHeader PdatapvRWlMaMpReq  69header resultCodeSWlMaClearDataCfmSWlMaClrDataCfm OTwlRsv 69header flagSWlMaClearDataReqSWlMaClrDataReq  TwlRsv 69header TstaMacAdrs`TWlParamSetMacAdrsReq`TWlParamSetMacAddressReq  eUwlRsv 69header retryLimitUWlParamSetRetryLimitReq  UwlRsv 69header enableChannelvUWlParamSetEnableChannelReq  IVwlRsv 69header modeUWlParamSetModeReq  VwlRsv 69header rateZVWlParamSetRateReq  !WwlRsv 69header wepModeVWlParamSetWepModeReq  WwlRsv 69header wepKeyId2WWlParamSetWepKeyIdReq ` WwlRsv 69header XwepKeyWWlParamSetWepKeyReq P!X  XwlRsv 69header beaconType2XWlParamSetBeaconTypeReq  (YwlRsv 69header probeResXWlParamSetProbeResReqXWlParamSetProbeResponseReq  YwlRsv 69header beaconLostTh9YWlParamSetBeaconLostThresholdReq9YWlParamSetBeaconLostThReq  AZwlRsv 69header activeZoneTimeYWlParamSetActiveZoneReq 0 ZwlRsv 69header ZmaskRZWlParamSetSsidMaskReq   0[wlRsv 69header typeZWlParamSetPreambleTypeReq  [wlRsv 69header typeA[WlParamSetAuthenticationAlgorithmReqA[WlParamSetAuthAlgoReq  \wlRsv 69header ccaMode edThreshold agcLimit[WlParamSetCCAModeEDThReq[WlParamSetCCAModeEDThresholdReq  8]wlRsv 69header tableNumber camLifeTime frameLifeTime\WlParamSetLifeTimeReq  ]wlRsv 69header countI]WlParamSetMaxConnReqI]WlParamSetMaxConnectableChildReq  C^wlRsv 69header mainAntenna]WlParamSetMainAntennaReq  ^wlRsv 69header diversity useAntennaT^WlParamSetDiversityReq  M_wlRsv 69header enableMessage^WlParamSetBeaconSendRecvIndReq  _wlRsv 69header mode^_WlParamSetNullKeyModeReq  (`wlRsv 69header 9`bssid_WlParamSetBssidReq 2 `wlRsv 69header ssidLength `ssidJ`WlParamSetSsidReq   DawlRsv 69header beaconPeriod`WlParamSetBeaconPeriodReq  awlRsv 69header dtimPeriodUaWlParamSetDtimPeriodReq  0bwlRsv 69header listenIntervalaWlParamSetIntervalReq  bwlRsv 69header gameInfoLength bgameInfoAbWlParamSetGameInfoReq F 69header resultCode dstaMacAdrs retryLimit enableChannel channel mode rate wepMode wepKeyId beaconType probeRes beaconLostTh activeZoneTime "dssidMask BpreambleType DauthAlgobWlParamGetAllCfm   69header resultCode (estaMacAdrsdWlParamGetMacAdrsCfmdWlParamGetMacAddressCfm 69header resultCode retryLimit9eWlParamGetRetryLimitCfm  69header resultCode enableChannel channeleWlParamGetEnableChannelCfm 69header resultCode mode&fWlParamGetModeCfm 69header resultCode ratefWlParamGetRateCfm 69header resultCode wepModefWlParamGetWepModeCfm 69header resultCode wepKeyIdCgWlParamGetWepKeyIdCfm 69header resultCode beaconTypegWlParamGetBeaconTypeCfm 69header resultCode probehWlParamGetProbeResCfmhWlParamGetProbeResponseCfm 69header resultCode beaconLostThhWlParamGetBeaconLostThresholdCfmhWlParamGetBeaconLostThCfm 69header resultCode activeZoneTime(iWlParamGetActiveZoneCfm& 69header resultCode imaskiWlParamGetSsidMaskCfm  69header resultCode typejWlParamGetPreambleTypeCfm 69header resultCode typeljWlParamGetAuthenticationAlgorithmCfmljWlParamGetAuthAlgoCfm  69header resultCode ccaMode edThreshold agcLimitjWlParamGetCCAModeEDThCfmjWlParamGetCCAModeEDThresholdCfm 69header resultCode countkWlParamGetMaxConnectableChildCfmkWlParamGetMaxConnCfm 69header resultCode mainAntennarssi @maxSendDataSize BmaxRecvDataSizeWMPortRecvCallback'-req_SetMPParameter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\$WMSetMPParameterCallback apiid errcode mask oldParamWMSetMPParameterCallback,req_StopTestRxMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStopTestRxModeCallback apiid errcode fcsOk fcsErrWMStopTestRxModeCallback$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\code32.hcodereset.hcode32.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcommand-line defines)initScfg.c|8%C  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\ARM7.TWL\src\code32.hcodereset.hcode32.hboot_sync.hversion.hformat_rom_certificate.hformat_rom.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcrt0.hstdarg.ARM.hva_list.h ansi_parms.h cstdarg stdarg.h file_struc.h eof.h null.h wchar_t.h size_t.h stdio_api.h msl_rsize_t.h msl_lib_ext1.h cstdio os_enum.h ansi_prefix.ARM.hmslGlobals.h msl_c_version.h stdio.h printf.h emulator.h armArch.h command-line defines) crt0.LTD.c 58 (5h85$858585858585858C# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmain_end.hsection.hmain_begin.hltdmain_end.hltdmain_begin.htwl.htwl_sp.hspi_sp.htypes.hnvram_sp.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htypes.hhi.h aes.hsndex_api.h pm.h spi.h type.h config.h spi.hcdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hcodecmode.hgx.hlcd.hrtc.hsnd.hstd.hpad.hfatfs.hspi.hmemorymap.hmemorymap_sp.hownerInfo.hmmap_shared.hspec.hownerInfoEx.hgenPort.hexi.hdsp.hcontrol.htypes.hi2c.hemulator.hutil.hfifo.hcamera.hmmap_wram.hmmap_wramEnv.hsystem.hscfg_private.hscfg.hscfg.hnwm_sp.hwm.hnwm.hnwm.hmisc.hdgt.hcrc.hchecksum.hfx.hfft.hmath.hqsort.hrand.hmath.hpxi.hos.hmi.hmemorymap.hctrdg_sp.hctrdg_task.hctrdg_sram.hctrdg_flash.hnitro.hctrdg_backup.hctrdg_common.hctrdg.hwvr_sp.hwvr_common.hwvr.hWlParam.h WlStaList.h WlCmdLabel.h WlBuf.h WlFrame.h WlCmd.h WlLib.h version_wl.h!twl_hybrid.hwm_sp.h"wm.h#gx_sp.h$types.h%command.h&api.h%thread.hsystemWork.hstdlib.h'unicode.h'memory.h(string.h'overlay.h)romfat.h)file.h)archive.h)api.h)hook.h)rom.h*types.h)fs.hpullOut.h*device.h(types.h*hash.h*exMemory.h(dma.h(backup.h*fram.h*flash.h*eeprom.h*common.h*card.hsndex_common.h+util.h,exchannel.h,channel.h,midiplayer.h,seq.h,mml.h,data.h,bank.h,capture.h,alarm.h,mmap_global.hioreg_SND.h-mmap_global.h-armArch.hwork.h,global.h,command.h,main.h,snd.htype_ex.h.instruction_ex.h/fifo_ex.h.gpio.h0type.h1instruction.h0control.h0fifo.h1rtc.hshutdown.h2fifo.h3pm_common.h4ioreg_PAD.hpm_common.h ioreg_SPI.hmic_common.h4xyButton.h5ioreg_PAD.h-pad.h6sharedWram.h7dma.h7mi.hos.hlimits_api.h8ansi_parms.h8climits8limits.h8armArch.hcrt0.h9application_jump.hprofile.hfunctionCost.hcallTrace.hvalarm.harena.halarm.hresource.hspinLock.hsystemWork.hentropy.hgxcommon.h$userInfo_ts_300.h spec.hregname.h3platform.hcache.h(endian.h(init.h(compress.h(uncomp_stream.h(stream.h(byteAccess.h(secureUncompress.h(uncompress.h(swap.h(wram.h(compparam.h3init.h3pxi.hreset.htick.halloc.hinit.hexception.hmutex.hmessage.hprintf.hsystemCall.htimer.hcontext.hevent.hinterrupt.hinterrupt.hsystem.hversion.hsystemCall.hstdarg.ARM.h:va_list.h8cstdarg8stdarg.h8file_struc.h8eof.h8null.h8wchar_t.h8size_t.h8stdio_api.h8msl_rsize_t.h8msl_lib_ext1.h8cstdio8os_enum.h8ansi_prefix.ARM.h:mslGlobals.h8msl_c_version.h8stdio.h8ioreg_SD.hioreg_OS.hioreg_PXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hmmap_parameter.hmmap_main.hcommand-line defines);main.c<|& nn|}|B|  5}  |,|?7 /    G7 /   | |v| 0|@|P|7{{&  7~ 7~ 6  /v|v| v| |6~|zD||>/7n%~6 z%  |/ua D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7.TWL\src\ioreg_OS.hmmap_global.hsystem.hthread.hinterrupt.htypes.hcode32.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5memorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_irqHandler.c7 |. L|t|Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_irqTable.c7||$|y}'(|8|H|X|h|x||||||. |||(| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ltdmain_end.hsection.hltdmain_begin.hsystem.hinterrupt.harmArch.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hthread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.h scfg_private.h2misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_interrupt.c78|)|\|<%_zk(Z'~'~'~z X,T.  |{{q4|v |&} |||H||||0|d|L D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_pxi.c7|%|6|&|~& 0|l D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hnitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_spinLock.c7`|o~'}w ~@|~~|.n|7~?zx| 7/z||(|H|L|P||  D:\Program Files\INTELLIGENT SYSTEMS\IS-TWL-DEBUGGER\Target\include\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\istdbglibpriv.histmidi.histdfio.histdsio.histdhio.histdprint.histdbglib.hdbghost.hnitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7os_printf.c8|?@|'l~/|7|'~&/  h| |.~4|.~&| }v ~~/~|| #j D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hmi.hos.hmemorymap.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_thread.c7|)[z   vq |a"x||} |}P| ''~|t & z w6} u| T |   u |~ vt|zz}} P!|t!|?!|"| 'z7"| p}"| j~Gz P#| ~|#| ~z#| .}/T$| \$| /.~~{ ~ $| ~%| D%| ~`%|''%|~'k D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hmemorymap.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_context.c7%|*8&|l&|Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\mmap_wramEnv.htwl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_emulator.c7&|&|/ '|4'|7' 0(|<(|)P D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\message.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_message.c7D(|"&l(|7v|(|v/.})|vN D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htypes.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_mutex.c7*|*~},*|8 yv *|*||x *|zx3T+|&p+|&z{  '~3`,|&|,|v,|O D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hscfg.htwl.happlication_jump_private.hpm.hcommon.hctrdg_common.hpxi.hwram.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h#rom.hhook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)7os_init.c8,|,| _N D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_arena.c7 -|PH-|6>-|.-|.-|.X(a|p  (.|-jt .|.N D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\alloc.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_alloc.c7.|.|  }}}~~{|zp/||.j0| &}|v6O7 6N>7n 6N>6Ol (m D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hos.hmemorymap.harmArch.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_exception.c72| G~  2|d3|x3| 3|~~.&   hN D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_timer.c75|FBM D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_tick.c7@5|7/|{|} 5|5| v~(6||  F 6|i D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_alarm.c76|7{~ } x7|/}7|7|7|W'~i~8| y?|9| u x :|~~}:|:|}7~ /  O D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_valarm.c7;|/;|;|~b"^t<|k||<|<|6  u| r h=| =| >|{~H>| {-  >|&}*p$L|} ?D l@||' j D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code32.hcodereset.hscfg.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_system.c7@|(@|<@|@|A|A|$A| S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\codecmode.hemulator.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.h unicode.hstdlib.hownerInfo.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.hthread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_systemWork.c7~}~.> . D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7\src\mcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hctrdg.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8os_terminate_sp.c9B|$/'/6lC|C|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmi_ndma.hsystem.htwl.htwl_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7mi_ndma.c86}$_!cfiloru x{ 6}W676'~ 6 & z|~8} 8} &8} (8} (T9} (9} G9} &:}  L:} x:} .F:} :} :} :} }|{z8;};}@c D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\system.htwl.htwl_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.hapi.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_sharedWram.c7C|C|~^D|  w  D|  w  R D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\nitro.hmi_dma.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.h nwm.h0wm.h nwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.h genPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7mi_dma.c8XE| E|  trF| v D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\code32.hcodereset.hcode16.hmath.hmemory.hplatform.htypes.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hfft.hfx.h.checksum.hcrc.hdgt.hmisc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h&scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_memory.c7HF|dF|F|F|F|F|G|G| H| u h D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\code32.hcodereset.hswap.htypes.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_swap.c7 I|,pM D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\dma.hnitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h sharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_init.c7I|! _ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pad\ARM7\src\nitro.hnitro_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6pad_xyButton.c7,I|)'~&I|~{'gO D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\misc.hpxi.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6pxi_init.c7J|/O D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\twl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6pxi_fifo.c7J|(~~~|&~|'y&K| yz'PK|FtK|.&K|/~'L|y u|'6g"ZQ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6std_string.c7L|.~M|{ 'XM|'~ ~xM|~M|} N|/z R D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6std_sprintf.c7PN| xN| ~ ./~'64 64  B~'.~.~  $&' ~.v '6|~{ FN}  'NF}  ?>7}~}}|~y .'{{~&|| $}~L4~}~' D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\ltdmain_end.hsection.hltdmain_begin.hunicode.hnitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6std_unicode.c7X|uI D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7\src\exi.hgenPort.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6gpio.c7X|!>Y|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7.TWL\src\memorymap.htypes.hgenPort2.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7gpio2.c8,Y|&>LY|/6Y|Y|?e D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.hcapture.hchannel.htypes.hmisc.hpm_utility.hpm_common.hioreg_SND.hos.hglobal.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hmmap_global.h alarm.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.hioreg.h scfg_private.h4system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)8snd_global.c9Y|<.Y|~~&Z|}6 pZ|}. Z|Z|~/>P D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\channel.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_channel.c7[|; {|}s?|'[| |{w ?|&\| |{w ? &0]|~X]|$?&  ]|6]| ~zG&`^|'&|^|~}}}}}}^|&^| {|'w  P_|'F y{NzO D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\os.hchannel.hutil.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_util.c7_|}}$}z~ }7'~'`|'~~~&`a| w}a|6cO D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\sndex_api.hwork.hutil.hcommand.halarm.hseq.hexchannel.hglobal.hos.hmain.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hmidiplayer.hchannel.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_main.c7a|7f Tb| b| b|b|b|b|?7 c|}}}.? {  [ P D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\misc.hcapture.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_capture.c7d|({dd|6/#R D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\work.hutil.hexchannel.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_exchannel.c7|d|~~{z &d|~q7*'7 7H~ tf|C=I'z{'?&z  }}}*|>  t }/z  '&'O'O'~ 4j|~pj|~{j|k|~}k||'k|&k|k|&l|l|&$l|6}p{p'~/q g'7}'@m|n| y~}~' &kn| x{~' &k'o| 7o| o|~ u/sTp|}xp|'t~.~&p|4q|q|yx$L D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\main.hmisc.hutil.hbank.hmml.hwork.hseq.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hdata.hmidiplayer.hchannel.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_seq.c7q|~~{ ||$r|'~'7L'n'|s| |N&~u%}}'/ u|>u|'/' Hv|'?|.&y v| |.&y 7y 'Gw|7&x w| t y&v dx|~{&/wyx|~~/w Ly|'  wy|p}v{&  wq,z|hz|/z|&'z|F /&x{|}xxjZD||T|| y/t||}|| {}| 7&&t}| ~&}| '~y  ~|  xx zyx  uy~ol{ z}z s'? ld| ~r|' x<|~'t ||&pO D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\main.hmi.hmisc.hbank.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_bank.c7|  '| F | V} N @|| z/~z.&}&&'~O D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\work.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_work.c7ȍ|>|6||}~'||'~VP D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\work.hpxi.halarm.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_alarm.c7|~~}|~ |~|'>Џ|~|. z{hR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\main.halarm.hutil.hglobal.hwork.hcapture.hseq.hmi.hpxi.hos.hmisc.hcommand.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hbank.hdata.hmml.hmidiplayer.hchannel.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_command.c7|) Ԑ|B7.  &&7..?6 6 ."Wfof > &&&&&&&~~~~  @|  /T  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hspi_sp.htypes.hnvram_sp.htype.hpm_sp.hioreg_OS.htypes.hmic_sp.htp_sp.htwl.htwl_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6memorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7spi_sp.c8|= }|.&&~{| }~~6 |h|4,| H|&`|~|7~|&}~ ~&6l|/|Gf| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\codecmode.htypes.hmisc.hpm_shutdown.hpm_selfBlink.hpm_sleep.hpm_utility.hpm_common.hpm_pmic.hpm_send.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0std.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hgenPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9pm_sp.c:X|~~ |~~~  N |/>N6' 6  $|GN+ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\pm_common.hpxi.htwl.htwl_sp.hspi_sp.htypes.hmisc.hpm_send.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.h thread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8pm_send.c9h|2N4 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\twl.htwl_sp.hspi_sp.hpm.hspi.htype.hconfig.hspi.hpxi.hpm_common.htypes.hmisc.hpm_pmic.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8pm_pmic.c9|> } |&. |}W |.|.&! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\main_end.hsection.hmain_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hspi.hcdc_api.hcdc_dsmode_access.hcdc_twlmode_access.hspi.hcdc_reg.hcdc.hcodecmode.htypes.hmisc.hpm_shutdown.h global.h pm_selfBlink.h pm_utility.h pm_common.h pm_pmic.h emulator.h system.h pm.htype.h config.h twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h command.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_api.h"sndex_common.h#card.hcommon.h$eeprom.h$flash.h$fram.h$backup.h$dma.hexMemory.hhash.h$types.h$device.hpullOut.h$fs.htypes.h%rom.h$hook.h%api.h%archive.h%file.h%romfat.h%overlay.h%fatfs.hsystemWork.hthread.h api.h&command.h'types.h&gx.hgx_sp.hlcd.h!wm.h(wm_sp.h)twl_hybrid.h*version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h*ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5twl.h*scfg.hscfg.h6mmap_shared.hscfg_private.h7mmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8i2c.h9types.h8control.h9dsp.hexi.hgenPort.h:memorymap.hcommand-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines);pm_utility.c<|8*     G~~%&7' ''.'~  |>|0&F4|  ||̥|' q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\main_end.hsection.hmain_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.hexi.hpxi.htypes.hmisc.hpm_utility.h pm_sleep.h pm_common.h pm_pmic.h pm_send.h twl.h twl_sp.h spi_sp.h pm_sp.h twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.h instruction_ex.h!type_ex.h snd.hsnd.hmain.hcommand.hwork.harmArch.h"mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.h version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.hscfg_private.h7system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hmemorymap.hcommand-line defines):twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines):pm_sleep.c;|4~| u $q$| &'&|&'&&} f D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\types.hmisc.hpm_selfBlink.hpm_utility.hpm_common.hpm_pmic.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h genPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8pm_selfBlink.c9| G/.~/ |4|"n  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\ltdwram_end.hsection.hltdwram_begin.hltdmain_end.hltdmain_begin.hfatfs.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hmemorymap.hgenPort2.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.h exi.h pxi.h codecmode.h types.h misc.h pm_shutdown.h pm_utility.h pm_common.h pm_pmic.h pm_send.h spi_sp.hpm_sp.htwl.htwl_sp.hioreg_OS.hmic_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.h fifo.h control.h!instruction.h!type.h gpio.h!fifo_ex.h"instruction_ex.h#type_ex.h"snd.hsnd.h main.hcommand.hwork.harmArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h%sndex_common.h&card.h common.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.h types.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(systemWork.h thread.hapi.h)command.h*types.h)gx.h gx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.h wvr_common.h/wvr_sp.h0ctrdg.h ctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.h mi.h os.h math.h rand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4std.h nwm.hnwm.h6wm.h nwm_sp.h7scfg.hscfg.h8mmap_shared.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hcommand-line defines)<twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)<pm_shutdown.c=;}>;}&.&&'7 D|^<}'D=}'h=}t=}/'=}'&=}7/.~ >}/'&&H?}76?}~~&.&&  S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\scfg.hioreg_OS.hmessage.hfifo.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6scfg_proc.c7||6'.|.D||!`{7 ~?i] x C D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\tpex_reg.htp_sp.hspi_sp.htypes.htpex_sp.hcodecmode.htwl.htwl_sp.htypes.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8tp_sp.c98|2&~~~'}.}'.>,|&.P|~~~ &?&' z' z| |  ~?|'&/ 6&  |{tp 7 7Ա|~'~ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\spi_sp.htypes.htp_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7tp_sampling.c88|.>/ ~6|&.@|u & |VV|~~z~ ~ /6}~z~~$|&&|  wG z~& &y&7/s!9 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\mic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.htwl.htwl_sp.hioreg_OS.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8mic_sp.c9 |;~~6 \| ~~~ '&{$"~~w ~x' 6||jq x|7'/7~'z 7'zz|| ||ؼ|   D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\spi_sp.hioreg_OS.htypes.hmic_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6memorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7mic_sampling.c8@|96>~| ~'~~''P|&.&|6>~|7'~~~7'~U D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\code32.hcodereset.hmic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.hinterrupt.hioreg_OS.htwl.htwl_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)8mic_irq.c9|||z||| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\archive.hfile.hhash.htypes.hmisc.hrom.hromfat.hcommand.hutil.hfs.hcommon.hpxi.hos.hmi.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.htypes.hdevice.hpullOut.htypes.hrom.hhook.hapi.hoverlay.hfatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7fs_api.c8| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_api.c8|<ji& |||X D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\rom.hcard_spi.hnitro.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_common.c8|(|} D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\os.hcard_task.hnitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_task.c8P|'p||/~&'''h|&y | 7v ! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_spi.c8 |&6| 7|,7  |//`|}{}~  y'&&''&gl||&..&|.&.&L|&}&|$ |'  v   6x|&/'|.&&  <|.v.&6m |.v.&6&m |.'~7/ 4|.'~~&u|.'~~&ul|'' |'} {~}&&   D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hrom.hpullOut.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_rom.c8`|}}|} 4|(|.N ||' D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\card_common.hnitro.hcard_rom.hcard_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_command.c8|./|}~'&& 6666....x|O|7l D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\os.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.hcard_rom.hctrdg.hpullOut.hrom.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_sp_pullOut.c8|6&|/.W &G |'|//P|~&7|}}|'~' ||w X D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\ltdwram_end.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.htwl.hsection.hltdwram_begin.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h scfg_private.h3system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7i2c_instruction.c8 @}T@}/@}@}~|~z $&$//WWW7/7//X| '  /7/WWWG| 6&}}}}/WWW /7/F \|  ./7'WWWF | | }G/WWW/7//7WWW 7/||'7_WW/7/77 /|&.|NNNNVNNVVNNNNF||7@.`|||&&&&| h|~~&&~ 0|{. y |{.y |?~ H|~/z~ 3 M D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\twl.htwl_sp.hspi_sp.hcdc_twlmode_access.hspi.hcdc_reg.htypes.hmisc.hcdc_api.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4system.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8cdc_twlmode_access.c9| |/&|..0|7 |&.|&&|/  x|&.&||? &}}'|..|W &} d|..|&| z)$6 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\memorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hcodecmode.hpm.hspi.htype.hconfig.hspi.h cdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hsndex_api.h init.h spinLock.h emulator.h message.h system.h twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hpm_common.hioreg_PAD.hpm_common.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.h command.h global.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.h api.h%command.h&types.h%gx.h gx_sp.hlcd.h!wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.h wvr_common.h,wvr_sp.h-ctrdg.h ctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.h mi.h os.h pxi.h math.h rand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.h types.h std.h nwm.hnwm.h3wm.h nwm_sp.h4twl.h)scfg.hscfg.h5mmap_shared.hscfg_private.h6mmap_wramEnv.hmmap_wram.hcamera.hfifo.h7util.h7i2c.h8types.h7control.h8dsp.hexi.h genPort.h9command-line defines):twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines):sndex_request.c;|~' '|  4|~~{7~/&~'|' |~'~ | ~}~x/sxog}`(zV,T,I7H8E;D<w } G}.~~~~~~~ ~~~~>~~/~'~ ~~&.}}'&}} }z}}}|>|{| |? w & ` D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htwl.htpex_reg.htp_sp.hspi_sp.htpex_sp.htwl_sp.htypes.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9tpex_sp.c:|7'  |/6G'&    D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htpex_reg.hspi_sp.htypes.htp_sp.htwl.htwl_sp.htpex_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9tpex_sampling.c:|1| |} || |<|X|t|||| ~}/~?~ }z#}x~u~z nVN~ ? D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\codecmode.hsndex_api.htwl.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl_sp.hioreg_OS.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.h system.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8micex_sp.c9T}* v  &.~~&.N|~&.}~~'G|N~ '}V}~..? }//.&&~oyko~.&?~.&g j6l}}&'}&{&'}. ( [ [ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\code32.hcodereset.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl.htwl_sp.hioreg_OS.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8micex_irq.c9}}} } }}'  ? /D }  }  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmemorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h scfg_private.h5system.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)9mcu_intr.c:\C}N.~~^.NhD}|zzD}~/zzD}E}~\E}E}{{{E}fE}q e/'/s  6&}~e G} G}&` D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8mcu_control.c94G}//f/'  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\memorymap.hmemorymap_sp.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h mi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7nvram_sp.c8l }7~~~ }~~~      '  '~''~OT}/6..>>'67`}}~}${/! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\spi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7nvram_instruction.c8 }!/>L}&.p}1/>}6>.}~'.}}&&|}&.(}~'.}}&.&|,}/|{{'.}}&}}'-(}/|{{'.}}&}}'-$}|~'>}|~'>,}/>l}/>}/>}6>.. t}/>= } D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hfifo_ex.hemulator.hgenPort.hpxi.hfifo.hinstruction.hcontrol.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.htype.hgpio.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.hthread.hapi.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4i2c.h5types.h4control.h5dsp.hexi.htypes.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)6control.c7}& 7&&P}?~~W }OG 0}4}& ~  D}>}9~rsrO~8.l/// ///~ H#}~'#}/~~ ~~! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hgenPort.hgpio.hinstruction.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.htype.hfifo_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6instruction.c7L$}+.N$}> & x xO%}6&}N<&}6h&}6&}N&} z64'} zN'}z6(}zNt(}Wz6(}OzN<)}6h)}N)}6)}N*}60*}Nh*}6*}NG}6G}G60H}_NH}6H}NH}6 I}N*}4r x}+} 4  f y}d,}6&&d D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\code32.hcodereset.hioreg.hgpio.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6gpio.c7,}(-}4-}-}4.}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apistat.c;'G~..tG'~&n}~{.>z{||'6" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtlowl.c;P,}}'~'.7 6opq &&&.' ~&67&' .&'&(?O7$ v&&&&&&&&&&/W؇~& jT/}~}&؈~H> ~/| y}Љ {.Q& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apickdsk.c;~ ||}}&'&!_!_}'&&/&y.}}b# &7'&&'&~ '/&.'&d 6&&'&&&&&&&&&&'&'&'&&'&&'&'&&&&/..&}h ~'&/&.{'k8~./~}}F~4 z&&&&'~&&6_&tG&.& .z //&}/& F}/&.7/z'/& N&& F z/../N~ /& &'>r 7'&m/|' y y ~,'/' z.& tl|o O~y  '06_%'~~ ?h 7'&& {6} y  z..&}/& F }}/&.&/7& O&& F z/../Nt '>  b/7z'.&~`%W+ /&&&~ H ~6} 'ġ 6# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs_twl_append.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiwrite.c;ܡ*~|O'~7?~'~ &y y&}}yy>/6&r{} {{~V.  |y.}z~~|} zg'~~~g}}~6..O. &&&&  ?|}~'7~?7~>'}~G$&w >&.'>~. V'FN&8} ~F&& ?.&&p?'~'&>& &x! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ltdwram_end.hsection.hltdwram_begin.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apicnfig.c;8}&&&&&}fffffffeefjjjjjjjjj&&&&j&'&&&jjjjjj&&&&&&'&&&&HF~{ "  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rttermin.c;&ȱ&&&'.\ v~} //~>=  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs_target_os.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutbyte.c;{  8#.\ t7~%! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutil.c;̳'.?&/&@?.p&'&|.w  O| &̵.r}Fz>&t|ȶz~}& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilio.c;8Ox}/&6G~&GN!G~7~z' & ~f&'/}&Ժ /~~~xy&|}|} 77O6}z.}G|  'y}&'~&hzw y O| '~ O'~ WW'~ W4~~'&}& /~ y'}&>?mj  /~&_ '~}Y*}&~7T   v'>&}} ,7' >>&, .'.&z & 7~ ~j&6_&&&`#   4 D / }'G& /~~/&/' 6z}}~/&.' & @" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdevio.c; /F{>&7'>{6/>\&>/??l 7.7&O~_ p/ '{.W~|p ' }6W~ 'x}.W~| ' }.W~O( D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtvfat.c;l> zz'}''' '7'.. 7&7'7F&~'~&p~}6{/}'/s x/?~/7'L7//.}6 .p ?~'~v '~~~,$P&'z x y''&z''z?,'&w ,'&w ,'&w W)'M%5.'{y Fz''Vz''&Fz?'x ?'x ?'x ]'/&{y $'&>'&&6 }}~ Xm/t &|..7u  ww 7'~z } &~~'u }     '.n 6~ 7G}j .F~&X &&>~.&& F./ %  \        } z }r'&$&z '/  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilmv.c;( ?}}G~&GG6&"& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdrobj.c;&~...&D 6&y t6> F '???@ l77/&?~>4'6.7>'}&.&' y>'|&>8~ 7/ >~~|O.>  t>>>~~ }&w w  w>|'>7~>7//&F&///&'/6.yF./ u t w{d&. vx   x~t''&?'/' &. > }}&&`F&v .&4 D '&} ?}/'p8 .''&/  }& l   F " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifrmat.c; ~}..y  ?~& O OX?~&{w w t &'   .}.}| ~{}exyx{}|  ~ 76@l D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9csstrtab.c;| &! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat16.c;&}} tz~ s &> .~  ~/&~'~  ~''&.}   /}6$x%u%6 ~z " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat32.c;X.7~~xxz 6~~`7~F'O&&.Px.N .}%7'~ u  ' ~''&&&&&..}' 6&&&&K5/~~{6$x%n%6 ~%| 7&&&&&&.O~&'p  &'/&( 7{` 7~ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apigfrst.c; //'&.D$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9csunicod.c;8 $ v&}| 5& > >/  G~$ $&}4 }|{ p &{ &{ } | .|  }   G|{w  /.%&z '  & &.&F.'}~v |}w ~}v F'~7'}}w  ''?w~~'~ ~%&~}'~~H/z * /'v '&& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfatxx.c;x &. > . 66666s .6'6~ G}~y X~66>.'H7{ /G} 6~  l 6&~i{/  {j  ?~|&~,V, ,V~&, |}'/?~6' }. OP 7&6}}zN~.N~|'. > x{&~~ t!7>!'~' ""^|{ #W@#Wt#V#66~|$66~  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinfo.c;P%)&/&%~~}0&7F  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\portconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinit.c;t&/~~|%~ 4'.6..G'/'&u  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs_target_os.hportconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfs_naming_convention.hrtc.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9portkern.c;'(( (0(4(:.&&6..{'(/~~ ~~^  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apimkdir.c;h) ?||}?~z/&~i. N6/} & t& &" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apirealt.c;+(?'},w~77/{|  x y7 $&z  |&&x '~| ~>}'&']*>..yy% ~R0~~'~'&01 { V}  | /&;& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9prblock.c;2,V23f2 7..T3.~66}&' ../&~'W&|.& 4.7..x46~&&&4./.&'~&|.5 v'&&u &x6&6>66 x}y  7 7'&}k7 |yt~{~t/'.8 }6/&&vFk9V/'.}{:/ &t' v.s};/x &'&&m~ &' '~ &&.~y 'O}{~} &?yP? zz 6 ~{>}.$@ }{X@|@ .v  A}} c " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtkernfn.c;A6?B"&&.~ >&y 7{(CG7/g{  CC D&&8D  >&./}'  D&E^ W z&   D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9drfile.c;`Jf'7D K/>6~'to {&& XMxv xt  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\drdefault.hrtfs.hrtfs_twl_append.hportconf.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9attach.c;MV~/~}~ wx&X&O/~Df{}}' D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs_twl_append.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_append.c;Q5&R^4RO~}O./7'N~~|z&&.S/&/G~~&U&$ {7&/'U77/&O~V .}D&} (X|}{}'X s.~}}~6~~|}z x7$ } ~'~t t]&Z&~/H[&[}&{zy7~&~p/~W)~&OC=}}z{|'6&|^ ?|}G~&G~' & &_ ~7}/ >~~ u  t> > y }djqq wO.>7zb O&~&& }&c ~''c ~./>  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_vfat_append.c;TdF zz'}''' 'O'.. 7&7'7F&~'~&#  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_api.c=g?' (h?   .& h? i&0i&Pix}| i~}. j|~y{ tj|~y{ j|~y{ \k|~y{ k~F~~ ~~yz&xl~} G"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hexi.hgenPort.h:types.hmemorymap.hcommand-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_cache.c=Lm&hm&m.Nn|~y{ n|~y{ o }/~z. .+! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hdma.htypes.hlo.htypes.hmisc.hhi.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hsdmc.h sdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.h instruction.h type.hgpio.h fifo_ex.h!instruction_ex.h"type_ex.h!snd.hsnd.hmain.h#command.h#global.h#work.h#armArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.h#capture.h#bank.h#data.h#mml.h#seq.h#midiplayer.h#channel.h#exchannel.h#util.h#sndex_api.h%sndex_common.h&card.hcommon.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.htypes.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(fatfs.hsystemWork.hthread.hapi.h)command.h*types.h)gx.hgx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.hwvr_common.h/wvr_sp.h0ctrdg.hctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.hmi.hos.hpxi.hmath.hrand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4misc.htypes.hstd.hnwm.hnwm.h6wm.hnwm_sp.h7scfg.hscfg.h8mmap_shared.hioreg.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hexi.hgenPort.h<memorymap.hcommand-line defines)=twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch workaround.h>symbols.h>command-line defines)=sdmc_thread.c?oG6.6.&p p'~0q  }|xq G'676 Tr}&Arr>.'&&/'6..g~~FG$}8u}|'~u&v }zzDzz<zfz z>z&zJ{4}6G~~~~}}xxx {x .~7'}y&, |~ skb }}.&&p  trrr '&,}L;$ |7''~}& s&& , }~   ~{..?.?t  |}^' ' { y/&. .. ~| O'?.|~  rOx .&' u u j a!   }t&&q 'V,T-}$W~ '~&.&'. &}~ H  '&}.'x/~y  u'/?.?# |B  66   $&rv|&^N> ~ a& b}f&i& 2|sQ~ '! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\code32.hcodereset.hltdwram_end.hsection.hltdwram_begin.hcode32.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htypes.h hi.h dma.h types.hmisc.hlo.h twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.hos_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.h instruction.h type.hgpio.h fifo_ex.h!instruction_ex.h"type_ex.h!snd.hsnd.hmain.h#command.h#global.h#work.h#armArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.h#capture.h#bank.h#data.h#mml.h#seq.h#midiplayer.h#channel.h#exchannel.h#util.h#sndex_api.h%sndex_common.h&card.hcommon.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.htypes.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(fatfs.hsystemWork.hthread.hapi.h)command.h*types.h)gx.hgx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.hwvr_common.h/wvr_sp.h0ctrdg.hctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.hmi.hos.hpxi.hmath.hrand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4misc.htypes.hstd.hnwm.hnwm.h6wm.hnwm_sp.h7scfg.hscfg.h8mmap_shared.hioreg.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hexi.hgenPort.h<memorymap.hcommand-line defines)=twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch workaround.h>symbols.h>command-line defines)=sdmc_intr.c?XI}I}p'D''' &\F. ~~~&/z&/!'~~. .>Ԓ~>/ ,....&w z&.6{w .w&.6{w .X~%w z&.6{w .4~%w&.6{w .>. P/>. ->. ->. x'->.>|~~~X|-.&G6&.~7|/./6''& T96Xs#}y!. t{&7@ &6.6/'}&a"~D\t. .&  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdif.c=h>'.' М.., ..&'', .67. T}'6 r&&.&.&d6 |~&&.&.x 6./&&6.&6.. С67/. 86'/6 |'Т|.'6`F&..&....... d.7.&......6D.7.'6 .'/6 ..'6t }} vu }6 |  ȧ.&o,.'/.,.'/...}6 .' z|$|.&, &$kk&.'>'F'./. 6 . >  .4  d > 6&&&&&  ., , .  | ..'6"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drsdmc.c= 7{  &6/\yy v v'~>~~&}~yT6~  .& v!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drnand.c=7&x?~&}|~.&.~{ u w&x ?.h D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\spi.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7sdmc_flags.c9P../&&. `.'&r'~ p(&.6..60&~ 5!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drnand_aes.c=?7{{\ >|G.F! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htypes.hresource.hfatfs.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&systemWork.hthread.hapi.hcommand.h'gx.hgx_sp.hlcd.h"wm.h(wm_sp.h)twl_hybrid.hversion_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.hctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.htypes.hstd.hnwm.hnwm.h3wm.hnwm_sp.h4scfg.hscfg.h5mmap_shared.h ioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9types.hmemorymap.hcommand-line defines):twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.hsymbols.hcommand-line defines):fatfs_resource.c;\9z~~~~~&~~(} x ~|~ z|.O<L}|w  xz.Ov4g" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rsvwram_end.hsection.hrsvwram_begin.hsdif_reg.htwl.hsdmc_config.hrtfs.hrtfs.hsdmc.hdrfile.hrtfs_twl_append.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.h mcu.htypes.h unicode.h attach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hresource.h request.h format_rom_certificate.hformat_rom.hfatfs.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.h ioreg_SPI.hpm.h pm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.h!rtc.hrtc.hfifo.h"control.h#instruction.h#type.h"gpio.h#fifo_ex.h$instruction_ex.h%type_ex.h$snd.hsnd.hmain.h&command.h&global.h&work.h&armArch.h'mmap_global.hioreg_SND.hmmap_global.halarm.h&capture.h&bank.h&data.h&mml.h&seq.h&midiplayer.h&channel.h&exchannel.h&util.h&sndex_api.h(sndex_common.h)card.hcommon.h*eeprom.h*flash.h*fram.h*backup.h*dma.hexMemory.hhash.h*types.h*device.hpullOut.h*fs.htypes.h+rom.h*hook.h+api.h+archive.h+file.h+romfat.h+overlay.h+systemWork.hthread.hapi.h command.h,gx.hgx_sp.hlcd.h'wm.h-wm_sp.h.twl_hybrid.hversion_wl.h/WlLib.h0WlCmd.h0WlFrame.h0WlBuf.h0WlCmdLabel.h0WlStaList.h0WlParam.h0wvr.hwvr_common.h1wvr_sp.h2ctrdg.hctrdg_common.h3ctrdg_backup.h4nitro.hctrdg_flash.h4ctrdg_sram.h4ctrdg_task.h4ctrdg_sp.h5memorymap.hmi.hos.hpxi.hmath.hrand.h6qsort.h6math.h6fft.h6fx.h7checksum.h6crc.h6dgt.h6misc.htypes.hstd.hnwm.hnwm.h8wm.hnwm_sp.h9scfg.hscfg.h:mmap_shared.hscfg_private.h;system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h<util.h<emulator.hi2c.h=types.h<control.h=dsp.hexi.hgenPort.h>memorymap.hcommand-line defines)?twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h symbols.h command-line defines)?fatfs_command.c@~ &~~>>y l*  zz }{?&'G&&7e 8'/ /|/ .?P&| ~G~q~~\|t .~  0Wh&G&~G7O'~'~$~'/&}~~ & 8| |~{  ~}'7&6  7 7F7 ?~ $ ~~&nH?7$y (p,~ /~~ ~ ~|&|?|' 6'~' ~' /~&( 6'~''~ /~ s s d  .6z~}~& t &...'H   z{>>/, |{~x .6  & P  } '&  . 0  &   } '& z{|6~.66>  6{|} w ~|. ~l/&'6|{.  ~|. ~m/& & '~~.&/. 0' '~~|~G~~W}'r' G~~&&/66/4 '~/.7 t~OL~{' /}x x x x /} ?x ?x ?x ?x /~}}'~''~.&7~y'~~ ~~~x~~'~y?>G~~~~~.{&&&' .6~ G&O.7~&''" &.T..'~'/~| }?7/? ~L?~~ ~}.}}'&$&&$&G'~&|}?}/{  Z ( @ T6&///#]~&&/'6 . ~/7&J>t'&&$y &$y /$> D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_request.c9&& 0|/y|}~~' Tc y~}~ a!'>C? D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_thread.c9<:&~'~~~ ~'~z  : D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_api.c9~ 'T.~'~  &$ 1 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hinterrupt.hioreg_AES.hdma.htypes.hlo.htypes.hmisc.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.hmemorymap_sp.hmi.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8aes_lo.c9|&~''/ $xx |x686\l|>| ,6# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hformat_rom_certificate.hformat_rom.hinterrupt.hmutex.hpxi.hmath.hlo.htypes.hdgt.hmessage.haes_fifo.hhi.hdma.h types.hmisc.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.hscfg_private.h5system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9aes_hi.c:P~|{~  w|}w FF7@ /t/ !  F' 7/ 67/' ~  //'  // }'/{{~~.w e /}'&}@|&w  ~z{7 x~ w&.~ }$|((  x&.} ) G\* ?/&* *  2 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hfifo.hsection.hltdmain_begin.hdma.htypes.hlo.htypes.hmisc.hdgt.hmessage.haes_fifo.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9aes_fifo.c:*F(+ ..~z .&.'+'4,x3 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hsection.hltdmain_begin.htypes.hhi.htypes.hmisc.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8aes_common.c9T,< y~{nV D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\stubs\isd\common\src\nitro.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6stubs_isd.c7p-t? D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\code32.hcodereset.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.hos.htypes.hwmsp_private.hwvr.hioreg.hioreg.hmi.hos.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1nwm_sp.h2twl.hscfg.hscfg.h3mmap_shared.h scfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7types.hmemorymap.hcommand-line defines)8twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8wvr_sp.c9t}}M D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7.TWL\common\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\wram_end.hsection.hwram_begin.hltdmain_end.hsection.hltdmain_begin.hos.hwmsp_private.hmemorymap.htypes.hgenPort2.hwmsp_common.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.htypes.htwl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.hstd.hnwm.hnwm.h3nwm_sp.h4twl.hscfg.hscfg.h5mmap_shared.hioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9command-line defines):twl.h.16M.A7.ARM.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines):wmsp_system.c;$4} y ~~ ~ &>} ||&qF_start_LtdMainParams_start_LtdModuleParams_start_BuildParams7_start_ModuleParams% OSi_IrqThreadQueueGq OS_IRQTable2OS_IRQTableOSi_IrqCallbackInfo ;GT3uOSi_FuncTerminateOS_FPutStringOS_PutString|9"OSi_CurrentThreadPtrOSi_StackForDestructorOSi_RescheduleCountOSi_IsThreadInitializedOSi_SystemCallbackInSwitchThreadOSi_ThreadInfoOSi_IdleThreadStack&OSi_IdleThreadGOSi_LauncherThreadA  gYOSiHeapInfo 9bBOSi_NeedResetTimerOSi_TickCounter e ]$xOSi_LtdMainParamst&9 q!bgMMIi_NDmaConfigR [ <)[PADi_XYButtonAvailable   @Ks sSurroundDecaysMasterPansOrgPansOrgVolume@_SNDi_DecibelSquareTableSNDi_DecibelTable uw&s0 |!SNDi_SharedWorkSNDi_Work9>$ PMi_StatusPMi_InitializedPMi_Workv 1+PMi_LEDStatus>~1PMi_BlinkPatternNoPMi_BlinkPatternData6+ ;$nAMATH_SHA256iConst @ H0*I$֏cardi_common !cardi_rom_baseW"$QI2CiSlowRateTable U -<?Q1g_VersionpBusContextirqHelperStack07! .g_sdio_settingl; ,g_pRecvMsgBufferAhcdDmaNo|g_recvMesgg_pMsgBufferg_mesg2dpcTaskStack_0r- 99Ty'FATFSi_glFATFSi_crossed_file_corenjT/FATFSi_prtfs_cfgFATFSi___fat_primary_cache_5FATFSi___fat_primary_index_4%FATFSi___fat_primary_cache_1TFATFSi___fat_primary_cache_6FATFSi___fat_primary_cache_9FATFSi___fat_primary_cache_7FATFSi___fat_primary_index_1FATFSi___fat_primary_cache_4?FATFSi___fat_primary_index_9nFATFSi___fat_primary_cache_8FATFSi___fat_hash_table_6FATFSi___fat_primary_index_8FATFSi___fat_primary_index_0'FATFSi___fat_primary_cache_3VFATFSi___fat_hash_table_5FATFSi___fat_primary_index_5FATFSi___fat_primary_index_6FATFSi___fat_hash_table_0 FATFSi___fat_hash_table_18FATFSi___fat_primary_index_3gFATFSi___fat_hash_table_3FATFSi___fat_hash_table_4FATFSi___fat_primary_index_7FATFSi___fat_primary_cache_0FATFSi___fat_hash_table_7IFATFSi___fat_hash_table_8uFATFSi___fat_hash_table_9FATFSi___fat_hash_table_2FATFSi___fat_primary_index_2FATFSi___fat_primary_cache_2+FATFSi___mem_block_hash_table[FATFSi___rtfs_user_tableRtfsMyMutexBufFATFSi___mem_file_poolFATFSi___fat_buffer_5FATFSi___fat_buffer_4GFATFSi___fat_buffer_3oFATFSi___fat_buffer_1FATFSi___fat_buffer_0FATFSi___fat_buffer_9FATFSi___fat_buffer_8FATFSi___fat_buffer_77FATFSi___fat_buffer_6_FATFSi___mem_drobj_poolFATFSi___fat_buffer_2FATFSi___mem_finode_poolFATFSi___mem_block_pool FATFSi___mem_drives_structures$*$>AFATFSi_prompt_tableFATFSi_string_table &!FATFSi_print_buffer!#FATFSi_fatxx_d@<FATFSi_current_pdrFATFSi_enabled_drivers'FATFSi_polled_signalx  { hFATFSi_med_st$UFATFSi_file_headsFATFSi_file_cylindersFATFSi_file_secptrackFATFSi_file_capacity=FATFSi_file_adjusted_capacitymFATFSi_fileDescListK`(5FATFSi_rtfs_first_attachFATFSi_rtfs_first_stat_flag*gC=FATFSi_func_SDCARD_OutFATFSi_func_SDCARD_In OR&SD_port_en_numbersSD_INFO1_VALUEFATFSi_sdmc_dma_noSD_INFO2_MASK_VALUE:SD_INFO_ERROR_VALUE`SD_INFO1_MASK_VALUESD_INFO2_VALUEFATFSi_sdmc_dma2_noFATFSi_thread_flagSDCARD_UseAesFlag=sdmc_abort_requestbFATFSi_sdmc_dtq_arraysdmc_slpq_arrayFATFSi_ulSDCARD_SectorCountFATFSi_pSDCARD_BufferAddr0FATFSi_sdmc_result_dtq_array_SDNandContextFATFSi_ulSDCARD_RestSectorCountSDCARD_SectorSizeSDCARD_EndFlag0SDPortCurrentContextxSDCurrentAccessFATFSi_sdmc_intrq_arraysdmc_slpq FATFSi_sdmc_intrq/FATFSi_sdmc_dtqQFATFSi_sdmc_result_dtqzFATFSi_sdmc_almFATFSi_sdmc_current_specSD_SDSTATUSSDPort1ContextSDPort0Context'FATFSi_sdmc_intr_tskNFATFSi_sdmc_tskpFATFSi_sd_intr_stackFATFSi_sd_stackoj`sd_last_info1SDCARDi_TransferSDCARD_TransferByHost_EndFlagSDCARD_EndByDmaFlag3|uSDCARD_V2FlagSD_port_numberB9!FATFSi_func_usr_sdmc_outsdmc_total_sectorsDžNAND_FAT_PARTITION_COUNTNAND_RAW_SECTORSNAND_FAT1_SECTORS=NAND_FAT2_SECTORSaNAND_FAT3_SECTORSNAND_FAT0_SECTORS -mFATFSiComanndFunctionTable<mFATFSiCommandBufferFATFSiArcnameList. 8_jF24:wmspW0rj'/ 3@v  A2 I8 8888808\8 h8l l8p8888888 8 8 X8888| |% |+|Z |Z$| 0| 8|L@|#D|(H|P|o X|4\|ct|! ||l |s||| | | |[||<|$| $5} (|_H|^P|[`|at|_| |`|: |P|A|: | |\|`$|a<|_L| \|`||: |P|A|: | |!|'|"|Y|]|&|Z | ,| <|Z L| h| | | |b8|WH|*`| p| | | |I |)| | T|`|,| | | | | x| m | t | | | ||<|d@|UD|H| l|p| |e | LJ}1HJ}1DJ}1@J}1| ,>|<>|' P>| l>|: >|>|' >|>|>|>|J ?|@?|?|?|J?|?|0@|D@|h@|t@| @|' @|8A|A| A|A|A|; A|gA|A|A|`A|B| B| 3} 3} 6} (B|B| B| C| C| C|3C|C|s|V0s|Uts| @xs|g s|>Tt|[lt|t|t|t|Zt|[t|0u| @4u|g 8u| hu|u|\u|u| @u|u| @v|>@v| @Dv|g v|Vv|v|v| @v|Vv|w|w| (w|X8w|>Lw| w| @w|g w|Vw|w| @(x|V`x| @x|Vx|>x| @0y|>Hy| @y| @y|V(z| @dz|\pz||z|z|z|z|z|z|Z{| {|,{|<{|ZH{|ZT{| 0||2 d||U||| ||_||W ||= }| (}|V<}|D}|p}| }|Y}|= H|W `|(|V,|H|\|||||Ѐ|P| |\ |b|= @|q T|7h|a ||_||| |V$|,|<|WH|`||,|4|H|Ć|| |@|\|p|| <| |Y||\|=8|g x| ̊||||$|!0|!L|p|!| 4|H|X| |q |7|a |_|g|g,|T P| `| |g| | | <| d|]| || ȏ| ̏|h| | `| | | |Đ|sȐ||̐|zА|g p|z ||% ||M| |ؑ|< |l| (|D|7 \|p| | 4| P| |)|' |t| 0|X|*|3 | x|||~ | | |E| ,| <|j L|Z \|l| || |I | ܖ| | 4|g 8| <|sH| d|t| ||' |s| ė|" ȗ| ̗| З| ||||| 4| t|||} |||}||| ||| И|K ؘ|' |' ||4| L|' T|n`|d|| D|\||n||| 8|' L|\|`|d| h||| || Л| ؛| |r| |(| 4|u@| L|[ || |` (| P|Lx|L|| |̝| ܝ||' || |' P| t|| О||| |||T| | П|L||z|̠|z|T|qd|qt|q|F |f |)̡|ء||\||||n$|X|||z|| ||~|z̢|آ|W(|z4|5@|d|t||W|z||Jģ|ȣ| У|ԣ|4ܣ|J||X |q(||z|||| Ĥ|Ф| ؤ|n|' | ||h |n$|' X|: l|t|x||| |F ||d|f Х|: ԥ||J | ||F |? d|M l||| ||`| ||| |8|H| T|J`| l|zx|q| | |: |L|LЧ|ܧ|||L|L|L |u $| ,|' <| @|nH|g T|t||||| | | | |g| Ĩ|' | |L,|qX|L||. |L |||0|@|;} <}z<}z<}z(<}z4<}z8<}L<} \<}< <} <}<}' <}<}<}<}<}<}<}<}H| P|\| d|nl|' <}=}_ =}=} =} 0=}8=}P=} T=}`=}d=}p=}=} =}=} =}=}: =} =}=}h >}n>}' (>}. 4>}. D>}f T>} X>}-\>} p>}t>} >}h >}' >}? >}>} >} >}>}< ?} ?}\?} ?}$?}H0?}4?}8?}|>8|=|>̿|>|=|d| | ||E ,|8|R d|l|} p|ut|x|X |* | |Y |5|S| |w |' | | $| D| H|L|| |n|' | |w X|w d| x| |K |' |w | | | <|U l|U t| | | ||||e|j|0|\| |`|`X| \|kh|bp|||~ |||a|jd|p| t|j| |] | ||i|f$|0| 4|8|L|i|g|f||| ||j|i8|gT|fh|t|| ||j|i|f|(| ,|0|dd|i||g|f|| ||i|g0|f<|d| h|p|i|g||| ||_|j|i |g$|0|T| X|j\||c|X 0|H||v|| |2 ||| $|x,|gt|i ||v|+| |X ||| |< | @|] T| \|d|p| t|| 4|: \|x| | ||||| | |||| || <| @|-D| H| P|: T| \|' `|Hh| t|||' |]| ||||%||: ||,|[4|>H|X| l| || | | |' |||,|X t|% | || ||@@} L@}P@}h@}p@}2 |@}@}@}@}@}@}@}@}@}A} A}|A} A}A}A}A}A}B} B}HB}pB}B}B}B}B}B}B}C} C},C} | | |0| t|C |V |V |V |V |V |V |V |C |X|>|C |V |V ,|V <|V L|V X|V d|V l|C ||X|C |V |V |V |V |V |!|| ,| H| d| x|U | | | |f | ,| T| p| | |U | | | | | T| `|x| | | | | | 4| <|C L|V X|V `|C p|V ||V |C |V |V |C |V |V | |g | $| 4| D| P|?|g ||| | | | ,|C <|V H|V P|C `|V l|V |C |V |V |C |V |V | |U || |?0| <|H| `| | | | | | | |C |V (|V 0|C @|V L|V T|C d|V p|V x|C |V |V | |g | | | | || | (|f 4|D| P|?t| || ||g | | (| <|f L|9\| p| | | |C |V |V |C |V |V |C |V ,|V 4|C D|V P|V `| h|f t|| |?|=|| || |C |V |V |C ,|V 8|V @|C P|V \|V d|C t|V |V | | | | ||| | | |C 0|V <|V D|C T|V `|V h|C x|V |V |C |V |V | |g | | |8|,| 8|C H|V T|V \|C l|V x|V |C |V |V |C |V |V | | | | |(|<| P| `| t|g | | |U || |:|C | |V 0| <|`|C l|V x|V |C |V |V |C |V |V |C |V |V |C |V |V |C $|V 8|C D|V P|V X|C d|V p|V x|C |V |V |C |V |V |C |V |V |C |V |V |C |V (|V 0|C <|V H|V X| `|U l||| | @|P|\|:|;|<| T| `|6d|6|;|| | (|,|P| t|U | |U @| D|:|:|F| | |V |C $|X@|\||E|C|B|A|C |V |$|L|EX|dh|Cl|Bp|V|C | |||Et|Cx|B||X|C | || |E(|dD|dX|C\|B`|bt|C | |c|V |c| |' (| L|: X|z`|' p| x|]| |||} ||s|r|f|o|p|||k|||n|l| p|||| |0|l|gx|||p|| ,| ||gp| x||~|' | | || | 8|gD|' | |l\| ||l|| | | 0| <| D| L||| |} | || | | | $| |||p|m||q| || |n|' | ||h |n |' `|p| ||| | ||p|| (|: 0| 4|<|D| L| X| l|Ot|o|| |{ | |r | |||| ||' | | |' | ,| p| x|| | |g |g |g 8|g T|g p|g |g |g |g | <| `|T} } l}; }L} }}_ } }u } } }_ }d} |}}}; }; } }; } }; }}(}P}X}p}; } }}  }: ` }' l } t }x }| } }2 } } }: }:  }' } $ }( }, }4 }2 8 }@ }H }x }2 | }H } L }T }X }U\ }dh } dC} lC}m C}C}C}' C} C}C}} D}_ D}u D}C 8D}HD}LD}PD}TD}XD}\D}`D}D}D}D} D}D}E} E}' 8E}U XE}E}E}E}E} E}E} E}nE}' $F} 4F}@F}M LF}XF} `F}nF}]F}F} F}F}F} F}F}G}G}G}0G}HG} PG}\G} dG}nlG}' G}G}G}G}G} }|}}},}L@} L}P}\} l}|}' } } }' } } } }} }<} D}h}p}}}} }} }@ }}} }} } ,}L} T}h} } }}}}|}}}}}}} }' }}<}y L}> }u }: }(}(}(}. }. }. 0}. \} d}l} } } }}}} }}}} } }L}' (}?,}*4}=8}* <}>@}*0D}*H}<L};}U }2 }?} }=}$}?(} ,}=}9}p}}'}*}*} } }2 } }}: }}Z }Y < }h } } } }` }1 } !}Z!} ,!}? D!} p!} !} !}y !}u !}k "} t"}"} "}B"}A"}> "}5 #}4 (#}'0#}<#}*@#}=D#}*P#} X#}|#}#}u #}'#})T$}h$}Ut$} $}) $}$ $}$}_%}%}U$%} 0%}) 4%}$ H%}_X%}a`%}`d%}Up%} |%}) %}$ %}_%}a%}`%}U%} %}) %}$ %}%}_&}&}U &} ,&}) 0&}$ H&}\&}_t&}&}_&}&}U&} &}) &}$ &}&}_$'}_@'}X'}_x'}U'} '}) '}$ '}'}_'}_(},(}_H(}UT(} `(}) d(}$ (}(}_(}_(}(}_)}U)} ()}) ,)}$ H)}\)}_t)}x)}U)} )}) )}$ )})}_)})}U)} )}) )}$ *}$*}_<*}@*}UL*} X*}) \*}$ t*}*}_*}*}U*} *}) *}$ G}G}_G}H}_$H}_ @ P l t   ĂЂ!' $| D4 hx ؃DF |^ ȄԄ ,T"hF  ȅ ܅  + D HXx"+ ȆF     , 8 D P \ h t F W + ć+ 8 0+ `  !' Ĉ| Ԉ    H '  ,. L |n >    a (/ H T. Ћ  y  Ԍ ܌ PX \ ` $ $ȍ ԍ$  $ $, L X$d p$|  $ $Ȏ  $  $$0 H T `$l   $  ̏ ؏$ $  ,$8 X d $ؐ  4T d t ȑ ̑Б4ԑؑD ܑ 0d, p  Ē Ԓ  $ ,ih}p Г@    @ @ d lBv   ДM9 \ 0 `v p x  M ȕ Е@  M8 Ld9 t\ |/   M Ȗ  "" B,dd ܗ   X hl pd     Ȝ@   B05 @ \ xM9 \ ԝ 5    0M@ H P@ t M ̞9 \    0M@ H \d"h"B D l!  <D4$ | c̢ :Уܣ8D F D 8` x:;8 ̧ܧ  @P x D c  4hĩ8Dh  4 Dp !, DPl >  Ȭ 4 P (h O5         İ Ȱ ̰ аw ԰v ذ ܰ                } x $ ( , 0r 4q 8 < @ D    ] Աر> ܱ ]  ] $> ( 8 H TX. .  p p  )  (D P     ) p) n   h> j ܷ ` @ & (TMd& t  X::Թl \ t | к  H 0D F D ;":Ծ8   DP h    Կ  c  0 \  : 8<cx :' | ( @F `' | ' |  | ( <' h t| F |  ' |   $' h| x' |  | F  VV@Vd88@ `:p+ + X"x: D ,IP' X||   ' |  !4 L| X d!| |  !Lp!  tw   w  0\6 6 !DX!,!`!XK b    4 d# |# '  1 ( < D ` h+ x+ '+  :R84 \ ) p Q  +  Q ,+ @ pQx + 8@ z   +  z  $+ 8 |z  +  y+ 4 hyt+  y+ K$) <) ) ) h) xK) ) HQ  M :* (8\Mh p: * p <'B ('4A x+ '  d|# '+    X`> p ` @ & MB( < L X:hp  [  -' F | 0@ XIhx ) [   +  - () `Mp+ - ) ) h- + - -  4-< \+ A  :-$ D& Thx[ - 8 ' , 8| @+ P%`-x -  &  -  t  8x- 8 - 8- t  H    - $+ < T-\ - 84H h:(' L t|     +   Xt  F %,-D |& 8 8h 8' P| \ |' | |     @ |  ' | -' ' | 4 P' t| |   - F F 8F . !D T |!  08P\!|   4 . d  , , P   . (. NMLKJITSQUP. . ,; 4X |      $ D`p .   , |    <+ p . BB8Dl;  $ X     . ( 4 @T `lx   . 0` |        , X+ lh      F < "P  \           + < i t i        $  0  } } } ( )   (D TV h|+ + b  ,  x  LX|  Px (, t 4 x   D x     l|  : :8 t    L  :  <X l  D    ( T    (88 T h 8x   P  c   (! ! !i p"t"x" |"E "" " " "9 "" "#$# H#X#G |###i $i $i $i \%d%p% %% % %%> %@ & & ,& H& `& p& &&& (' ,'0',D'; `'= x' '= ' 'n 'n (Z (2 (,( <(0 D(: H( X(l((((())> ) )` ) )*@ *& @*ML*& *M* **M*:+ + ,+ @+ P+ `+ p+++ ++> + , , p,, , (- 8- -.:.:/00 1 1,1 2 2 $3' D3| P3 t3' 34| 4 04' @4d4| t4 4' 4| 4 5' 5 @5P5| 5' 55| 5 5 6' ,6| 46 @6' `6| t6 |6| 6:6<8h88$98L9' X9 t9| 9 9 9 : (: P: : : : ::::,; 8;:4<_ D<X<_ < < <: =,= X>t>">:?@?? ? ? ? @ @_ @A B B (B B B $C \C C C C C D (D$LD!`D D D D D Dn D D 8E PE |E EE8G `G' G| G' G G| G G G$H $H' `H| pH+ xH' H H| H| H H H$H $I4I8IPI!II I IJ0JDJHJLJPJTJXJ\JJJJ J K 8K!lK KKKL. L LM PM TM MM M| M0 MMo N!tN, 8O' HO TOlO| OO O^ O OVO O!O PP (P 4P xPPP P' P| Q Q' Q| (Q 4QF DQLQ Q, Q Q QVQB Q Qo Q:Q(R`RpR xR> R R` R RRF RF RF R@ S& 0SMXS hS-S S:SS S S S T,T @T XT`T pTTT T-T T:TT U (UF @UF XUb U U9 VA ,V4V @V:PVtV V VV VW W(WpWF WWWW W X X X$$X%XXXDY. tYTZZ  [ 8[ [[I[I\\> $\@\ X\` l\@ x\& \M\B\@ \]` ]@ $]& 4]L]p] x]l ] ]] ^ ^ (^ 8^ D^:T^\^x^ ^^> ^ ^` ^@ _& _8_MH_:X_p_ _ _ ___ `0` h` ```8` a8a a Xa a a a aHa a a b b 8b+ Pbb bbc> c@ |c cc cc cIc d' d!@d| Pd tdxdd'd de Pe eB eQ e# f9 0f?df%tf-f f-f f f# f'g'g+ g+ (g+ 0g+ @g'hg+ pg g g:gg+ h h hh hh h h h hh i i ih ,iLLiLii iLi i ii i i HjXj lj pj jj j j 0k@k Tk Xk kk k k 4l: lell.l=l/llh l l m0m Dm Hm dmOmOm nOnO `npn n n nn n n odoooooboO oOoNoM  p (p 8pI Lp \p `pW dp tppbp`pI pP pep`p p p q qDq qq q q q1r r rU rR 0r HrbLr Xrhtr_ |ru rrs! s$s0 \k x   X l t G  Lk d       #     $ H  !    4 D & w   D X d H    = @ H       (> , | G( x 0 H T   z   8 d    k   H    i  $ , < D l         $ H \ d t |              lit    i   8 x :  ( h    , Dx  :  $ `      @ l   $ H \     Dd&|    :8 X&h |> s  ^,:|       H    <T    $ h    tH  H  H ( lH x  H <iX h p  G $ p 8h     $ h  i             0 @M p    G G $  H   ( L X  :  , < P =        ,r |s   ` t ^: , ,  (    " 4 < P lo I Dc s   , H     G G  4 H L T X ` h l p  lb 9 H%   7 & 6   H2 t7 x6 6 7  4n<' H6 L7 P7 p K ' 7 7   $ (46 87 H } ' 9 9  K '  v 4G G  9 8 8 9 ? 9 l E  $   $  8E LE T \$ hJ o ( 4L L XL J o | {  x   p  r  t   (  t    p   r   t Py P}TTTT|T T T(h 5xT=TEȝ R,TZTrTTT 5HAEg