ELF(84J4 (T88T88T||T||TTTT||TT@ T@ @  T T@T TTaT.shstrtab.debug_abbrev.debug_aranges.debug_frame.debug_info.debug_line.debug_loc.debug_macinfo.debug_pubnames.debug_overlay.strtab.symtabferret.relaferretferretWRAM.relaWRAMWRAMbinary.AUTOLOAD_INFObinary.STATIC_FOOTERferret_defsFcheck.WORKRAMbinary.LTDAUTOLOAD_TOPRSVWRAM.relaRSVWRAMRSVWRAMLTDMAIN.relaLTDMAINLTDMAINbinary.LTDAUTOLOAD_INFOferret_defsLcheck.LTDMAINcheck.RSVWRAM$m$a$dINITi_CopySysConfigINITi_ShelterLtdBinaryINITi_Fill32INITi_IsRunOnTwlmicrocode_GotoMain.rodata$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dmicrocode_ShakeHandINITi_DetectMainMemorySizeINITi_DoAutoloadINITi_Copy32IsValidConfigExOS_HaltGX_VBlankIntrVBlankIntrPrintDebugInfoOS_EnableIrqMI_CpuFill32MI_CpuClear32ReadUserInfoGetRomValidLanguage$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dMI_CpuCopy32$Ven$lb$$PrintDebugInfo.WRAMmain.oInitializeAllocateSystemOS_GetSubPrivArenaHiOS_GetWramSubPrivArenaLoOS_GetSubPrivArenaLoInitializeAllocateSystemCoreOS_GetWramSubPrivArenaHi$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tMI_CpuClear8CheckCorrectNCDExInitializeFatfs.text$d$d$t$t$a$a$d$d$Ven$lb$$SVC_CalcSHA1.LTDMAINsyscall_twl.o $t$t$t$t$Ven$lb$$SVCi_CalcSHA1Core.WRAMsyscall_twl.o .text.text$a$a$a$a$d$d$t$t.text$a$a$a$a$d$d$d$t$t$t.text$a$a$d$t.text$a$a$d$t.text$a$a$a$d$d$t$t.text$a$a$a$d$d$t$t$Ven$lb$$__call_via_r0.RSVWRAMthumb_interwork$Ven$lb$$__call_via_r5.LTDMAINthumb_interwork$Ven$lb$$__call_via_r4.LTDMAINthumb_interwork$Ven$lb$$__call_via_r6.LTDMAINthumb_interwork$Ven$lb$$__call_via_r0.LTDMAINthumb_interwork$Ven$lb$$__call_via_r1.LTDMAINthumb_interwork$Ven$lb$$__call_via_r3.LTDMAINthumb_interwork$Ven$lb$$__call_via_r2.LTDMAINthumb_interwork$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tbreakCtx$a$a$a$a$d$d$d$d$t.bss.data$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_IrqCallbackInfoIndex$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_SetIrqFunctionEx.LTDMAINos_interrupt.o $Ven$lb$$OS_EnableIrqMaskEx.LTDMAINos_interrupt.o OS_DisableIrq$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tOSi_IsTerminateOccurred$a$d$d$d$d$dOSi_IsResetOccurred.bss$t$t$t$t$tOSi_AllocateCardBus_ZZ11OS_InitLockvE13isInitializedOSi_DoUnlockByWordOSi_FreeCardBus$a$a$a$a$a$d$d$d$d$d$d$d$d$dOSi_DoTryLockByWord$t$t$t.bss$t$t$t$t$t$t$t$t$t$t$a$d$d$Ven$lb$$OS_SPrintf.LTDMAINos_printf.o $t$tOSi_ThreadIdCount$Ven$lb$$OS_WakeupThreadDirect.LTDMAINos_thread.o $Ven$lb$$OS_SleepThread.LTDMAINos_thread.o $Ven$lb$$OS_CreateThread.LTDMAINos_thread.o OSi_ExitThread_ArgSpecifiedOSi_RemoveSpecifiedLinkFromQueue$a$a$a$a$aOSi_InsertLinkToQueue$Ven$lb$$OS_WakeupThread.LTDMAINos_thread.o OSi_InsertThreadToListOSi_IdleThreadProcOSi_RemoveThreadFromList$d$d$d$d$dOSi_RescheduleThread$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_ExitThreadOSi_SystemStackBuffer$t$t$t$t$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_Sleep.LTDMAINos_thread.o OSi_ExitThread_DestroyOSi_SleepAlarmCallback$a$a$a$a$a$a$d$d$d$t$t$tOSi_RunningConsoleTypeCache_ZZ17OS_GetConsoleTypevE20OSi_ConsoleTypeCache_ZZ18OSi_DetectPlatformvE12OSi_Platform_0.data_ZZ20OSi_DetectDeviceTypevE5table_ZZ18OSi_DetectEmulatorvE22OSi_IsDetectedEmulator.rodata$a_ZZ18OSi_DetectEmulatorvE12OSi_Emulator_0$d$d$d$d$d_ZZ18OSi_DetectPlatformvE22OSi_IsDetectedPlatformOSi_DetectPlatform$t.bss$t$t$t$t$t$Ven$lb$$OS_GetRunningConsoleType.LTDMAINos_emulator.o $Ven$lb$$OS_ReceiveMessage.LTDMAINos_message.o $Ven$lb$$OS_ReadMessage.RSVWRAMos_message.o $Ven$lb$$OS_ReceiveMessage.RSVWRAMos_message.o $Ven$lb$$OS_InitMessageQueue.LTDMAINos_message.o $Ven$lb$$OS_ReadMessage.LTDMAINos_message.o $a$a$a$a$a$a$a$d$d$d$d$d$d$d$Ven$lb$$OS_SendMessage.RSVWRAMos_message.o $t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_SendMessage.LTDMAINos_message.o $Ven$lb$$OS_LockMutex.LTDMAINos_mutex.o $Ven$lb$$OS_UnlockMutex.LTDMAINos_mutex.o $a$a$aOS_IncreaseMutexCount$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$OS_InitMutex.LTDMAINos_mutex.o $t$t$t$t$t$t$t$t$t$t$t$t$tOS_DecreaseMutexCount$d$t$tOSi_Initialized$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$tOS_InitArenaHiAndLo$d$d$d$d.bss$t$t$t$tOSi_UserExceptionHandlerArgOSi_ExceptionHandler$a$a$a$aOSi_UserExceptionHandler$d$d$d$dOSi_DisplayExContextOSi_SetExContextOSi_GetAndDisplayContext.bss$tOSi_OriginalHandlerOSi_ExContextOSi_DebuggerHandlerOSi_TimerReserved$d.bss$tOSi_UseTick$Ven$lb$$OS_GetTick.LTDMAINos_tick.o $a$a$d$d$d$d$d$d$dOSi_CountUpTick$t$t$Ven$lb$$OS_IsTickAvailable.LTDMAINos_tick.o .bss$t$t$t$t$tOSi_AlarmHandler$Ven$lb$$OS_CancelAlarm.LTDMAINos_alarm.o OSi_InsertAlarm$Ven$lb$$OS_IsAlarmAvailable.LTDMAINos_alarm.o OSi_ArrangeTimer$a$a$a$a$a$a$Ven$$OSi_ArrangeTimer.WRAMos_alarm.o $d$d$d$d$d$d$d$d$d$d$dOSi_UseAlarmOSi_AlarmQueue$t$t$t$t.bss$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_SetAlarm.LTDMAINos_alarm.o OSi_SetTimer$Ven$lb$$OS_CreateAlarm.LTDMAINos_alarm.o OSi_DetachVAlarmOSi_PreviousVCountOSi_InsertVAlarmOSi_VAlarmQueueOSi_GetVFrame$d$d$d$d$d$d$d$d$dOSi_VFrameCountOSi_VAlarmHandlerOSi_SetNextVAlarm.bss$t$t$t$t$t$t$t$t$t$t$t$tOSi_UseVAlarm$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_GetBootType.LTDMAINos_systemwork.o$a$d$d$d_ZZ18OSi_IsCodecTwlModevE11initialized_0_ZZ18OSi_IsCodecTwlModevE6retval$t.bss$t$tOSi_ReloadTwlRomData.rodata$a$a$a$a$a$a$aOSi_DoBootOSi_IsInitReset$d$d$d$d$d$d$t$t.bss$a$d$Ven$lb$$OS_GetLowEntropyData.LTDMAINos_entropy.o $d$t$t_ZZ12OS_TerminatevE4sent_0$Ven$lb$$OS_Terminate.LTDMAINos_terminate_sp_ZZ12OS_TerminatevE10terminatedOS_EnableIrq$a$d$d$d$t.bss$t$t$t$Ven$lb$$MI_NDmaPipeAsync_Dev.LTDMAINmi_ndma.o $Ven$lb$$MI_NDmaRestart.LTDMAINmi_ndma.o $Ven$lb$$MIi_Aes_NDmaSend.LTDMAINmi_ndma.o $Ven$lb$$MIi_Aes_NDmaRecv.LTDMAINmi_ndma.o $Ven$lb$$MI_SetNDmaBlockWord.LTDMAINmi_ndma.o $Ven$lb$$MI_SetNDmaWordCount.LTDMAINmi_ndma.o $a$a$a$a$a$a$a$a$a$a$a$a$aMIi_GetControlData$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$MI_NDmaSendAsync_Dev.LTDMAINmi_ndma.o $Ven$lb$$MI_StopNDma.LTDMAINmi_ndma.o $Ven$lb$$MI_SetNDmaInterval.LTDMAINmi_ndma.o $t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$MI_WaitNDma.LTDMAINmi_ndma.o $Ven$lb$$MI_NDmaPipeAsync_SetUp.LTDMAINmi_ndma.o $Ven$lb$$MI_NDmaRecvAsync_Dev.LTDMAINmi_ndma.o resultPtrMIi_DoUnlockWramSlotslock$d$d$d$dMIi_CallbackForPxifinishPtrMIi_DoLockWramSlots.bss$t$t$t$t_ZZ19MIi_InitWramManagervE12sInitialized$a$d$d$d$t$t$t$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$a$a$d$t$tPADi_XYButton_CallbackPADi_XYButtonAlarm$d$d.bss$t$t$a$d$d$Ven$lb$$PXI_Init.LTDMAINpxi_init.o $t$tPXIi_SetToFifoFifoRecvCallbackTable$Ven$lb$$PXI_SetFifoRecvCallback.LTDMAINpxi_fifo.o $Ven$lb$$PXI_SendWordByFifo.LTDMAINpxi_fifo.o $a$a$a$d$d$d$d$d$d$d$dFifoCtrlInit$t$t.bss$t$t$t$t$t$t$Ven$lb$$STD_CopyString.LTDMAINstd_string.o $Ven$lb$$STD_SearchString.LTDMAINstd_string.o $a$a$a$a$a$a$Ven$lb$$STD_CompareNString.LTDMAINstd_string.o $d$d$d$d$d$d$Ven$lb$$STD_CompareString.LTDMAINstd_string.o $Ven$lb$$STD_CopyLString.LTDMAINstd_string.o $t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$STD_GetStringLength.LTDMAINstd_string.o $a$d$t$t$t$Ven$lb$$STD_TSNPrintf.LTDMAINstd_sprintf.o STD_Unicode2SjisArray.dataSTD_Sjis2UnicodeArray$a$d$d$Ven$lb$$STDi_AttachUnicodeConversionTable.LTDMAINstd_unicode.o $t$t$d$d$t$t$d$d$d$d$t$t$t$t$a$d$d$d$d$d$d$d$t$t$t$t$t$t.data$d$d$d$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t_ZZ14SND_CalcRandomvE1u.data.rodata$d$d$d$dSinTable$t$t$t$tsndMesgBuffersndAlarmSndAlarmCallback_ZZ8SND_InitmE11initialized$d$d$d$d$d$dsndThreadsndMesgQueue.bss$t$t$t$t$t$t$t$tsndStackSndThread$d$d$t$tsWeakLockChannelStartExChannel.rodataCalcReleasesLockChannel$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d_ZZ22SND_SetExChannelAttackP12SNDExChanneliE12attack_table_ZZ22CompareExChannelVolumePK12SNDExChannelS1_E5shift_ZZ18SND_AllocExChannelmiiPFvP12SNDExChannel26SNDExChannelCallbackStatusPvES2_E13channel_order.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tSetTrackMuteseqCacheReadArgInitTrackChannelCallbackReadByteInitCacheRead24GetVariablePtrFreeTrackChannelAllReleaseTrackChannelAllFinishPlayer$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dUpdateTrackChannelGetPlayerTrackStartTrackPlayerSeqMainClosePlayerTrackRead16AllocTrack.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tsMmlPrintEnable$t$t$t$d$d$d.bss$t$t$tAlarmHandler$d$d$d$d$d$t$t$t$t$tsCommandMesgQueue$d$d$d$dPxiFifoCallback.bss$t$t$t$tsCommandMesgBuffer$Ven$lb$$SPI_Lock.LTDMAINspi_sp.o SpiPxiCallback$a$a$d$dSpiCommonThread$d$d$d$d$d$d$d$d$dspiWork$t$t.bss$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$SPI_Unlock.LTDMAINspi_sp.o spiInitializedPMi_ReturnResult$d$d$d.bss$t$t$t$t$tSPI_SendWait$d$d$d$t$t$t$t$t.data.rodata$a$d$d$d$Ven$lb$$PMi_SetLED.LTDMAINpm_utility.o MCU_WriteRegisterMCU_ReadRegisterPMi_AmpGainLevelTable$t$t$t$t$t$t$t$d$dPMi_PreDmaCnt.bss$t$tPMi_BlinkCounter$a$d$d$d$d$Ven$lb$$PM_SetLEDPattern.LTDMAINpm_selfblink.o $t.bss$t$t$tPMi_MCUShutdownCallbackPMi_MCUResetCallbackMCU_GetBatteryLevelPMiMCUBatteryEmptyCallbackCalledPMi_DummyHandlerPMiInTerminatePMiMCUPwswCallbackCalled$d$d$d$d$d$d$d$dPMi_MCUBatteryEmptyCallbackPMi_MCUBatteryLowCallbackPMi_MCUPwswCallback$t$t$t$t$t$t$t$t$t$t$t$tSCFGi_ExecSCFGi_CommonCallback$d$d$dSCFGi_MessageQueueSCFGi_MessageBufferSCFGi_SendPxiData.bss$t$t$t$tSCFGi_StackSCFGi_Thread_ZZ18TP_AutoAdjustRangeP9SPITpDatatE9valid_cnt_0_ZZ18TP_AutoAdjustRangeP9SPITpDatatE11invalid_cntSPI_DummyWaittpw$d$d$d$d$d$dTpVAlarmHandler.bss$t$t$t$t$t$tTPi_DetectTouchTPi_DetectPosSPI_DummyWait$d$d$d$dlast_touch_flg.bss$t$t$t$tmicwMIC_TimerHandler$d$d$d$d$d$d.bss$t$t$t$t$t$tMicSetTimerValuecounter12sam12counter8offset12sam8$d$d$d.bss$t$t$tSPI_DummyWaitReceiveoffset8$d$d$d$d$t$t$t$t$d$tCARDi_EnableFlag$d$d$d$d.bss$t$t$t$t$d$d$t$t$d$d$t$t$t$t$t_ZZ19CARDi_EraseChipCorevE3argCARDi_WaitBusyforIRC_ZZ17CARDi_WriteEnablevE3arg.dataneed_commandCARDi_CommVerifyCore_ZZ23CARDi_CommandReadStatusvE3bufCARDi_SendSpiAddressingCommandCARDi_WriteEnable.rodataCARDi_WaitPrevCommandCARDi_CommWriteCorecardi_paramCARDi_CommReadCoreCARDi_CommandEndCARDi_CommArray_ZZ24CARDi_InitStatusRegistervE14status_checked$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tCARDi_SetRomOpCARDiReadRomFunctionCARDi_IsNormalMode$d$d$d$d.bss$t$t$t$t$tCARDi_DoneTaskFromARM9.data_ZZ22CARDi_LockMutexForARM7vE7isFirst$d$d$dCARDi_DoTaskFromARM9CARDi_ARM7Mutex.bss$t$t$t$t_ZZ26CARD_InitPulledOutCallbackvE13isInitializedCARDi_CallbackForPulledOut.dataCARDi_TryTerminateARM7_ZZ25CARD_CheckPullOut_PollingvE9skipCheck_0_ZZ25CARD_CheckPullOut_PollingvE12isFirstCheck_1isCardPullOut$d$d$d$d$d$dCARDiSlotResetCount_ZZ22CARDi_TryTerminateARM7PvE5alarm.bss$t$t$t$t$t$t$tdetectPullOut_ZZ25CARD_CheckPullOut_PollingvE9nextCountmutexI2Ci_SendMiddleI2Ci_StopExI2Ci_SendStartI2Ci_GetResultI2CiDeviceAddrTableslowRateisInitializedI2Ci_WaitEx.rodata$d$d$d$d$d$d$d$d$d$d$d$dI2Ci_ReceiveStart$t$t$t$t$t$t$t$t$t$t$t$tI2Ci_GetDataCDC_PowerUpDAC_ZZ20CDC_WaitPowerDownDACvE25mute_wait_append_time_maxCDCi_InitializeIirFilterBuffersMicBiasBkisUnmuteSpBk_ZZ20CDC_WaitPowerDownADCvE25mute_wait_append_time_maxCDC_WaitPowerDownDACCDC_SetIirFilterCoreCDCi_IsIirFilterInitializedsCdcSysClockBk.rodataisDACOnBksIirFilterAddressHalfHpf10HzSamplingrate48kDefaultIirParamHpf10HzSamplingrate32k$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsIirFilterAddressisUnmuteHpBkCDCi_EndForceOutSoundCDC_PowerUpDAC_WaitWithSpinsIirFilterBackupCDC_WaitPowerDownADCisAudioADCOnBkCDCi_StartForceOutSoundCDC_SetIirFilterHalfCore.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tisSARADCOnBkSPI_SendWaitcdcMutexcdcCurrentPage$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tSPI_DummyWaitReceivesndexLockReplyResultsndexIirTargetsndexSetAlarmPxiCallbackMCU_SetVolumeSetVolumeHandlerRequestThreadMCUVolumeSwtichCallbacksndexReqMsgQsndexIirParamsndexIsPlayShuttersndexVolAlarmsndexReqInitialized$d$d$d$d$d$d$d$dsndexReqMsgQArrayMCU_ReadRegistersndexReqThreadsndexReqThreadStacksndexSpiLockId.bss$t$t$t$t$t$t$t$t$t$t$tsndexVolsndexTempDSPMixRate$d$t$t$d$d$t$t$t$t$t$t$t$t$t$t$t$tMicexUpdateStatusOnBufferFullMicexConvSamplingSpanMicexIntrHandler$d$d$d$d$d$t$t$t$t$t$t$amicexIntrPrio$d$d$d$d.bss$t$t$tmicexIntrInfoMCUiThreadMCUiEnableHeartBeatMCUiMessageMCUiIrqTableMCUiStackMCUi_HandlerMCUi_ThreadMCUi_GetIrqReason$Ven$lb$$MCU_GetPwswStatus.LTDMAINmcu_intr.o MCUiMessageQ$a$dMCUiPwswStatus$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$tMCUiIsInitializedMCUi_HeartBeatHandlerMCUi_UpdatePwswStatusverInfo$d$tnvramwNvramCheckReadyToReadNvramIsAvailableMemAddr$d$d$dNvramCheckReadyToWrite.bss$t$t$t$t$t$t$Ven$lb$$NVRAM_PageWrite.LTDMAINnvram_instructi$Ven$lb$$NVRAM_SoftwareReset.LTDMAINnvram_instructiSPI_DummyWait$a$a$a$a$a$aSPI_SendWait$Ven$lb$$NVRAM_WriteEnable.LTDMAINnvram_instructi$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$NVRAM_WriteDisable.LTDMAINnvram_instructi$Ven$lb$$NVRAM_ReadDataBytes.LTDMAINnvram_instructi$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$NVRAM_ReadStatusRegister.LTDMAINnvram_instructiRtcReturnResultRtcBCD2HEX$a$artcWork$d$d$d$d$d$d$d$Ven$lb$$RTCi_Unlock.LTDMAINcontrol.o rtcInitializedRtcAlarmIntrRtcThreadrtcMutex$Ven$lb$$RTCi_Lock.LTDMAINcontrol.o RtcPxiCallback$t$t.bss$t$t$t$t$t$t$t$t$t$Ven$lb$$RTC_ReadDateTime.LTDMAINinstruction.o $aRtcGpioTransfer$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tRtcChangeAlarmFormat12to24RtcChangeAlarmFormat24to12$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$t$t$t$t$t$d$d$d$t$t$t$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t@8130$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$d$d$t$t$t$t$t$t$d$dFATFSi_rtfs_cfg_core.bss$t$t@7152$d@7159$t$t$t$t$t$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_pc_freefile$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_check_media_ioFATFSi_card_failed_handler$d$d$d$d$d$d$d$dFATFSi_check_media_entryFATFSi_check_media$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$dFATFSi_pc_allspace$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$t$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$d$d$d$t$t$t$t$t$t@7020@7021@7022@7014@7015@7016@7017$d@7018@7019FATFSi_rtfs_strtab_string$t$t$d$d$t$t@7496$d$t$t$t$t$t$t$t$t$t$t$t$t$t$d$t$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$dFATFSi_init_fat.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$t$t$t$d.bss$t$t$tRtcBCD2HEX$d$d$d$d$d$t$t$t$t$t$t$t$d$t$d$d$t$t$t$tFATFSi_pc_add_blkFATFSi_pc_allocate_blkFATFSi_pc_commit_fat_blk$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_pc_release_blk.rodata$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t@7082@7083@7064@7085@7065@7086@7088@7089FATFSi_i_no_print@7090$d$d$t$t$t$d$d$d@7278.bss$t$t$t.data$d$d@7379$t$t$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t.data$Ven$lb$$sdmcPostSleep.WRAMsdmc_api.o $a$d$d$d$d$d$d$d$d$d$d$d$d$d$d_ZZ17FATFSi_sdmcSelecttE12first_select$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$tSdmcCache$d$d$d$d$d$d$t$t$t$t$t$tSDCARDi_WriteAesFifoi_sdmcIniti_sdmcEnableFATFSi_aesCounterDefaultSDCARD_Thread.dataSDCARDi_WriteFifoSDCARD_LayerInitsdmcRandEnableSDCARDi_ReadCoreSDCARDi_ReadOS_DisableIrqsdmc_srand$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsdmcCheckPortContextFATFSi_i_sdmcErrProcessFATFSi_sdmc_tsk_createdSDCARDi_WriteSDCARDi_ReadFifoSDCARDi_ReadAesFifo.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_ulSDCARD_SizeSDCARDi_WriteCore_ZZ17SDCARD_TimerStartmE10timeout_msSDCARDi_FPGA_irq$Ven$$SDCARDi_CpuSendFast.LTDMAINsdmc_intr.o SDCARDi_CpuRecvFastOS_EnableIrqOS_DisableIrq$a$a$a$a$Ven$$SDCARDi_CpuRecvFast.LTDMAINsdmc_intr.o $d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dSDCARDi_CpuSendFastSYSFPGA_irqSDCARD_ReadyToEnd$t$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t_ZZ18SDCARD_Intr_ThreadPvE1i$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@7905FATFSi_sdmc_drive_no$d$d$d$d$d$d_ZZ19FATFSi_sdmcRtfsCtrliiPvE15initialize_flagi_sdmcIdleCard.bss$t$t$t$t$t$t$tFATFSi_nand_drive_noFATFSi_nand_calculated_fat_params$d$d$dNandFatSpec.bss$t$t$tsdmc_nand_flag_baki_sdmcSetParitysdmc_nand_flagsdmc_nvram_adrsdmc_spi_lockidi_sdmcCheckReadyNvramsdmc_log_initialized$d$d$d$d$d$d$d$di_sdmcGetNvramAdri_sdmcCheckParityi_sdmcGetNvram.bss$t$t$t$t$t$t$t$t$t@7222@7223@7221@7224FATFSi_nandaes_drive_no$d$d.bss$t$tFATFSiHandleManager$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$tFATFSi_SDInsertCallbackFATFSiNowOnHeavyCommand@9442FATFSi_CheckHeavyCommandEnd_ZZ27FATFSi_CommandFormatSpecialPvE4work.data@12777@12775FATFSi_CompareNIString@12774@12773@12450@11581@12772FATFSi_CopyLUnicodeString$Ven$lb$$FATFSi_AbortHeavyCommand.WRAMfatfs_command.oFATFSi_NormalizePath@11443FATFSi_GetValidDirectoryHandle@12874_ZZ20FATFSi_NormalizePathPKtPm17OSMountPermissionP18FATFSCommandHeaderE5index@12875@12779@12996@12778FATFSi_IsValidDrive$aFATFSi_SDRemoveCallbackFATFSiLetterToHandle_ZZ27FATFSi_GetLauncherInfoTablevE5tableFATFSi_GetValidFileHandle$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dFATFSi_RegisterDriveFile_ZZ26FATFSi_VerifyCommandResultim25@enum$8098fatfs_command_cPmE5tableFATFSiSpecialDrivesFATFSi_IsMediaProtected@11939FATFSi_IsMediaFatalFATFSi_CheckHeavyCommandBegin@11494@12766@11938FATFSi_GetLauncherInfoTableFATFSi_UnregisterDriveFile@11491$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@11931@12940FATFSi_CompareUnicodeString@11930FATFSiOnceAccessedSDCard@11933@11932@11935FATFSi_VerifyCommandResult@11934FATFSi_UnpackAsciiToUnicode@11937FATFSiUnicodePathBuffer@11936FATFSi_IsShareArchiveNameFATFSiCommandBufferDefault.dataFATFSiLastError$d$d$d$d$d$dFATFSiResultBufferList.bss$t$t$t$t$t$t$tFATFSiRequestFATFSi_AppendRequestFATFSiThreadFATFSi_CommandThread$d$d$d$d$d$t$t$t$t$tFATFSi_CopyUnicodeString$d$t$t$t$tspCallback.rodataDMA_CONFIG$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsCallbackParam$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tsSrcSize@7280spDstCtrRunCallbackSendMessageSetupDefaultFractionPxiCallbacksNextSlotsThreadStack$Ven$lb$$AES_Init.WRAMaes_hi.o ExclusiveOrAesBlocksRandCountersFractionsMutex$aspSrcAesThreadIsValidAddresssDmaNoForSend$dsMacSize$d$d$d$d$d$d$d$d$d$d$dsThreadsThreadQsDstSizeStepSubKeysDmaNoForRecv$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tAesRunsFractionSizesCountersThreadQBuffer$d$d$t$t$t$t$t$a$Ven$lb$$WVR_Shutdown.WRAMwvr_sp.o $d$d$t$t$d$tpc_upstat_exMI_InitNDmaConfigSTD_TSNPrintfOS_SetPeriodicAlarmMIi_CpuClear32SDCARD_SetAbortSDCARDi_CpuWriteFifoAessdmcCacheReadFifoAES_SetKeyCOS_TryLockCardFATFSi_NTLowerStringSDK_AUTOLOAD_LIST_ENDsdmcFillFifoFATFSi_fat_devio_writeSDK_LTDAUTOLOAD.LTDMAIN.DATA_ENDSND_StartExChannelNoiseFATFSi_sdmc_alm$Ven$$OS_LoadContextWRAM$Ven$$RTCi_GpioStartWRAMOSi_SendToPxiFATFSi_pc_flush_all_filSVC_CalcSHA1SDK_AUTOLOAD_SIZEFATFSi_pc_get_cwd_start_AutoloadDoneCallbackFATFSi_pc_fd2fileFATFSi_rtfs_pc_cluster_sizeSDCARDi_DmaReadFifoAes$Ven$$MI_CpuCopy8WRAMFATFSi__synch_file_ptrsFATFSi_pSDCARD_BufferAddr_ll_mulFATFSi_rtfs_port_alloc_mutexSND_StartAlarmSDK_AUTOLOAD_WRAM_STARTFATFSi_CommandFormatDriveFATFSi_pc_path_to_driveno$Ven$$OS_SaveContextWRAMMCU_DisableHeartBeatFATFSi_fatxx_pfaxxSDK_LTDAUTOLOAD_TOP_STARTSDK_WRAM_ARENA_LOSDCARDi_RemoveProcSDPort1ContextMIC_ExecSampling8FATFSi_fileRtfsAttachSDPort0ContextPADi_XYButtonAvailableMICEX_DisableMultipleInterruptFATFSi_sdmcRtfsIoCARDi_ReceiveTaskSND_GetChannelControlAES_Reset$Ven$$OS_SetIrqMaskWRAMTP_AnalyzeCommandOSi_ThreadInfoSDK_LTDAUTOLOAD_LIST_ENDSND_SetChannelPanSDK_LTDAUTOLOAD.RSVWRAM.BSS_SIZESD_SelectCardFATFSi_rtfs_pc_format_mediaFATFSi_CommandCheckDiskOS_GetProcModeFATFSi_AbortHeavyCommandFATFSi_pc_firstblockNVRAM_ReadStatusRegisterFATFSi_rtfs_cs_strcpy$Ven$$MI_StopNDmaWRAMNVRAM_Init_ull_modRTCi_GpioEndSND_CommandInitFATFSi_nandAesRtfsAttachOS_RestoreInterruptsFATFSi_GetCurrentDirectoryHandlesFATFSi_unicode_cmp_to_ascii_charSD_SetPullUpOS_InitThreadSTD_GetStringLengthFATFSi_CommandReadFile_u32_div_fFATFSi_file_secptrackFATFSi_CommandDeleteFileRTC_ReadFreeMICEX_IrqHandlerSND_SetChannelVolumeSDK_LTDAUTOLOAD.LTDMAIN.SIZEFATFSi_process_crossed_fileFATFSi_fatxx_get_chainRTC_ReadDateTimeFATFSi_check_drive_number_presentSD_ClrErrFATFSi_rtfs_pc_get_media_parmsRTC_WriteFoutOSi_TerminateCoreFATFSi_pc_fndnodeFATFSi_CommandCloseFileSVC_GetCRC16CDC_ChangePageFATFSi_crossed_file_coreCARD_InitFATFSi_copybuffFATFSi_NotifyRequestCompletionFATFSi_pc_free_all_iOSi_IrqTimer2OSi_IrqTimer3OSi_IrqTimer0OSi_DetectDebuggerOSi_IrqTimer1OSi_EnterNDmaCallbackFATFSi_pc_patcmp_vfatSDCARD_UseAesFlagSDK_SYS_STACKSIZE_SIGNOS_SetVAlarmTagCDC_WriteSpiRegisterAES_LockOS_GetBootTypecardi_rom_baseFATFSi_rtfs_my_alloc_mutexNVRAM_AnalyzeCommandSND_AllocExChannelSVC_WaitIntrFATFSi_current_pdrOS_SetIrqFunctionExRTC_ReadAdjustFATFSi_allocate_chkdsk_coreSND_EnableSVC_UnpackBitsFATFSi_get_bitOS_IrqDummyOSi_IdleThread$Ven$$OS_InitResetWRAMSNDi_SharedWorkSND_ExChannelInitFATFSi_fatxx_pfswapSCFG_InitFATFSi_twfs_pc_set_propertiesMCU_InitIrqSD_StopTransmissionFATFSi_unicode_assign_ascii_charFS_InitAES_CoreOS_EnableSchedulerTPEX_EnableNewBufferModeFATFSi_CommandCloseDirectory__sinit__FATFSi_EnumPublicArchivesOS_SetThreadPrioritySD_SendIfCondNAND_FAT_PARTITION_COUNTFATFSi_text2lfiSDK_STATIC_ETABLE_ENDFATFSi_rtfs_port_release_mutexCDC_StartShutterSoundSDK_STATIC_BSS_START_ull_mulSDK_AUTOLOAD_WRAM_IDNVRAM_SectorEraseTP_ExecuteProcessSD_SendStatusCDC_WriteSpiRegistersExOSi_IsThreadInitializedSND_CalcRandomMIi_CpuPipe32WMSP_GetAllowedChannelSND_EndSleepFATFSi_CommandFormatSpecialFATFS_OpenFileWCDC_InitCurrentPageMI_CpuCopy8FATFSi_pc_get_lfn_filenameI2CiSlowRateTableCARDi_ReadRomIDFATFSi_rtfs_po_flushCARDi_WriteBackupCoreFATFSi_pc_sec2indexSDK_AUTOLOAD_LISTFATFSi_AllocateCommandBufferFATFSi_pc_getsysdatePMi_SendPxiCommandMIi_Aes_NDmaSendINIT_InitializeScfgcardi_commonFATFSi_pc_init_inodeFATFSi_sd_stackRTC_InitFATFSi_FreeDirectorySDK_STATIC_SIZEFATFSi_pc_ascii_strn2upperSPIi_ReturnResultFATFSi_CommandRenameFileFATFSi___fat_hash_table_0FATFSi___fat_hash_table_1FATFSi___fat_hash_table_2FATFSi___fat_hash_table_3FATFSi___mem_block_hash_tableFATFSi___fat_hash_table_4FATFSi___fat_hash_table_5FATFSi___fat_hash_table_6FATFSi___fat_hash_table_7FATFSi___fat_hash_table_8TPEX_SetTouchPanelDataDepthFATFSi___fat_hash_table_9SND_IsExChannelActiveFATFSi_to_WORDFATFSi_sdmcGetErrCodeSDK_IRQ_STACKSIZE__exception_table_end__FATFSi_rtfs_memsetFATFSi_InitHandleManagerFATFSi_rtfs_port_get_taskidSDCARDi_TransferNVRAM_WriteDisableFATFSi_CommandCreateDirectoryPMi_SetLEDSD_SendRelativeAddrSVC_SoftResetMI_SetNDmaBlockWordSND_CommandProcFATFSi_pc_fat_sizeFATFSi_lfn_chr_to_unicodeOS_InitIrqTableSND_InvalidateBankFATFSi_rtfs_port_putsMIi_Aes_NDmaRecvSDK_STATIC_DATA_STARTFATFSi_fatxx_clnextOSi_InitCommonFATFSi___mem_finode_poolOSi_DoResetSystemSTDi_AttachUnicodeConversionTableFATFSi_prtfs_cfgFATFSi_devio_writeFATFSi_pc_free_all_blkFATFSi_pc_calculate_chsCDC_ReadSpiRegisterFATFSi_add_cluster_to_crossedSDK_LTDAUTOLOAD.RSVWRAM.DATA_ENDOS_ReceiveMessageSDCARD_SectorSizeOSiHeapInfoFATFSi_pc_mkfs32SD_INFO_ERROR_VALUEsMasterPanPXIi_HandlerRecvFifoNotEmptyFATFSi_sdmcGoIdleSDK_LTDAUTOLOAD.LTDMAIN.TEXT_STARTSND_InvalidateWaveFATFSi_rtfs_cs_strcmpNVRAM_ExecuteProcessFATFSi_chain_sizeMI_InitNDmaRTC_ResetCARDi_EraseBackupSubSectorCoreFATFSi_pc_mkfs16FATFS_MountDriveNAND_RAW_SECTORSOSi_UnlockMutexCoreNVRAM_ReadDataBytesAtHigherSpeedCDC_ReadSpiRegistersFATFSi_pc_rmnodePM_SelfBlinkProcFATFSi_print_chkdsk_crossed_filesSDCARDi_CpuReadBufSingleOS_UnlockCardOSi_TickCounterSDK_LTDAUTOLOAD.LTDMAIN.BSS_SIZE$Ven$$OS_GetLockIDLTDMAINRTCi_UnlockTPEX_ExecuteProcessSND_SeqMainFATFSi_pc_finode_statFATFSi_scan_for_bad_lfns$Ven$$MIi_CpuClear32LTDMAINOS_ReadMessageSDCARDi_CpuWriteBufTPEX_SetNewBufferModeOSi_LtdMainParamsFATFSi_pc_free_all_filFATFSi_rtfs_pc_unlinkNVRAM_WriteEnableCDC_UnmuteAudioADCFATFSi_fatxx_freechainOS_LoadContextFATFSi_FreeFileFATFSi_fatxx_fwordSND_SinIdxSD_SetIpBlockLengthFATFSi_get_format_parameters_ll_modFATFSi_pc_nibbleparse$Ven$$OS_ResetRequestIrqMaskWRAMSDK_STATIC_SINIT_STARTSDK_LTDAUTOLOAD.LTDMAIN.IDSDK_LTDAUTOLOAD.LTDMAIN.DATA_STARTFATFSi_pc_commit_fat_tableSD_INFO2_VALUEFATFSi_pc_isdotFATFSi_pc_free_all_usersSPI_InitSDK_STATIC_TEXT_STARTFATFSi_pc_reduceseglistPXI_InitFATFSi_pc_dskfreeSDK_LTDAUTOLOAD_STARTSVC_UncompressRL8MI_CpuFill8FATFSi_devio_write_formatFATFSi_fileDescList$Ven$$_ll_shlWRAMSDK_LTDAUTOLOAD_LTDMAIN_BSS_END_start_ModuleParamsCDCi_IsDACOnSND_SetTrackMuteSPIi_GetExceptionsdmc_slpqTPEX_SetIntervalFATFSi_rtfs_first_stat_flagFATFSi_validate_filename$Ven$$OS_DisableInterruptsWRAMAES_InitSD_SDSTATUSSDK_LTDAUTOLOAD_LTDMAIN_STARTFATFSi_WaitForRequestCARD_IsPulledOutFATFSi_pc_isadir$Ven$$RTCi_GpioSendCommandWRAMSDK_LTDAUTOLOAD_LTDMAIN_SIZERTCi_GpioSendDataCARD_InitPulledOutCallbackFATFSi_pc_release_bufFATFSi_rtfs_strcpySD_SDStatusSDK_AUTOLOAD.WRAM.DATA_STARTFATFSi_scan_all_files$Ven$$OS_GetProcModeWRAMRTCi_LockOS_LockByWordSND_InitLfoParamSDK_AUTOLOAD.WRAM.TEXT_STARTFATFSi_pc_read_partition_tableFATFSi___mem_drobj_poolFATFSi_critical_error_handlerSND_SetPlayerLocalVariableSVCi_CalcSHA1CoreOSi_SystemCallbackInSwitchThreadSND_BeginSleepOSi_CommonCallback_ll_ushrMCU_GetPwswStatus$Ven$$_ull_mulLTDMAIN$Ven$$OS_BreakIrqHandlerWRAMSND_FreeExChannelFATFSi_unicode_make_printableOSi_IrqCallbackInfoNVRAM_DeepPowerDownSDCARDi_CpuReadFifoFATFSi_pc_seglist2textFATFSi_CommandRenameDirectoryFATFSi_pc_load_file_bufferSTD_CopyLStringPMi_SetControl$Ven$$_ll_ushrWRAMfat16_check_freespace$Ven$$MIi_CpuSendFastRSVWRAMOSi_UnlockAllMutexSDK_AUTOLOAD.WRAM.TEXT_SIZESDK_LTDAUTOLOAD.LTDMAIN.SINIT_ENDMI_WaitDmaOS_InitVAlarmOSi_IrqCallbackAES_AddToCounterFATFSi_sdmcWriteAesFifoSD_DisableClockMI_InitWramManagerSD_TransEndFPGAOS_SleepsdmcFillAesFifoFATFSi_pc_gblk0_32CARDi_ProgramBackupCoreOS_DisableInterrupts_IrqAndFiqSND_StopUnlockedChannelFATFSi_sdmc_dma2_noFATFSi_pc_mpathFATFSi_rtfs_print_one_stringFATFSi_pc_log_base_2FATFSi_pc_find_fat_blkPMi_InitShutdownControlSND_SetExChannelSustainFATFSi_pc_ascii_mfileFATFSi_fatxx_pfgdwordSDCARDi_CpuWriteFifo$Ven$$OSi_SendToPxiWRAMOS_SpinWaitSysCyclesMCU_CheckIrqI2Ci_WriteRegister$Ven$$MIi_CpuClear32WRAMCARDi_InitStatusRegister$Ven$$OS_DisableInterruptsLTDMAINsdmcIsProtectedSTD_CompareNStringOS_IrqHandlerSDK_AUTOLOAD_WRAM_BSS_ENDblock_devio_fillFATFSi_pc_strchrSND_SetExChannelAttackFATFSi_sdmcSetLatencyEmulationFATFSi_sdmcSetInsertCallbackSDK_LTDAUTOLOAD.LTDMAIN.TEXT_ENDOS_EnableIrqMaskExFATFSi_process_used_mapFATFSi_pc_i_dskopenSDK_AUTOLOAD_NUMBER$Ven$$OS_EnableInterruptsRSVWRAMFATFSi_write_lost_chainsSND_StartSeqTPEX_SetPrechargeTimeFATFSi_fileRtfsIoOS_WakeupThreadDirectSND_SetupChannelNoiseCDC_WriteSpiRegistersFATFSi_rtfs_resource_initFATFSi_pc_next_blockMIi_CpuSend16sdmcInvalidateCacheAESi_PxiSendFirstFATFSi___fat_buffer_8FATFSi_fatxx_find_free_clusterFATFSi___fat_buffer_9FATFSi_pc_update_inodeSDK_LTDAUTOLOAD.LTDMAIN.DATA_SIZESDK_AUTOLOAD.WRAM.ENDFATFSi_pc_test_all_filFATFSi___fat_buffer_0FATFSi_pc_validate_drivenoFATFSi___fat_buffer_1FATFSi_rtfs_pc_format_volumeFATFSi___fat_buffer_2FATFSi___fat_buffer_3FATFSi___fat_buffer_4FATFSi___fat_buffer_5FATFSi___fat_buffer_6FATFSi___fat_buffer_7FATFSi_rtfs_po_writeFATFSi_pc_alloci$Ven$$RTCi_GpioEndWRAMTPEX_ReadBufferFATFSi_sdmcSetRemoveCallbackSDK_AUTOLOAD.WRAM.ID$Ven$$MI_CpuFill8LTDMAINSDCARDi_CpuFillFifoFATFSi_CommandFlushAllCoreFATFSi_fatxx_cl_truncate_dirMI_NDmaPipeAsync_SetUpFATFSi_defaultRtfsIofat32_check_freespaceSNDi_SetSurroundDecaySND_PauseSeq_ull_divSDCARDi_DmaWriteFifoAesSDK_LTDAUTOLOAD.RSVWRAM.SINIT_STARTNVRAM_SoftwareResetTPEX_InitializeRTC_WritePulse$Ven$$MIi_CpuCopy32WRAMOS_CancelAlarmSDK_STATIC_ETABLE_START$Ven$$MIi_CpuRecv16LTDMAINSND_StartIntervalTimer$Ven$$MIi_CpuCopy32LTDMAINFATFSi_rtfs_pc_rmdirFATFSi_CommandGetDriveResourceSD_MultiReadBlockCARDi_CommandReadStatusSDK_LTDAUTOLOAD.RSVWRAM.TEXT_ENDFATFSi_sdmcWriteFifoFATFSi_pc_memory_finodeFATFSi_file_cylindersOS_InitSDK_LTDAUTOLOAD.RSVWRAM.ENDSPI_Lock__exception_table_start__FATFSi_rtfs_pc_get_attributesSVC_HaltOS_GetRunningConsoleType$Ven$$MIi_CpuPipe32LTDMAINFATFSi_sdmc_result_dtqMIC_EnableMultipleInterruptSVC_DivRemMI_NDmaSendAsync_Dev$Ven$$RTCi_GpioSendDataWRAMSDK_LTDAUTOLOAD_LTDMAIN_ENDSDK_LTDAUTOLOAD.RSVWRAM.BSS_STARTSDK_AUTOLOAD_STARTSDK_AUTOLOAD.WRAM.DATA_SIZEFATFSi_pc_search_cslFATFSi_CommandMountDriveTPEX_SetSenseTimeFATFSi_CommandCreateFileMIC_InitMIC_DisableMultipleInterruptFATFSi_pc_truncate_dirSDCARDi_CpuReadB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@C%I!/ I.;:I? @I;:I? 4;:I?  8I     8II (II I  P8<8initScfg.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\voidP8<8"]INIT_InitializeScfg 8 8crt0.LTD.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\ARM7.TWL\src\5[ 8_start_LtdMainParams5r$8microcode_GotoMainw5,8_start_LtdModuleParamsg58_start_BuildParamsX5*D8_start_ModuleParams5Ah8microcode_ShakeHandlunsigned longvu32REGType32__file_handlesize_tfpos_tREGType32vu32  $$;( Xint^BOOL^mbstate_t8P85]_start<88k5]INITi_DoAutoload8h85]INITi_ShelterLtdBinaryh8l8J5]_start_AutoloadDoneCallbackjK5Rargvl8p8V5]NitroSpStartUpp88h5^]INITi_IsRunOnTwl885]INITi_CopySysConfig8x85]INITi_DetectMainMemorySize!x885]INITi_Copy325(dst5,src50size8 8'5]INITi_Fill32(5(dst(5,value(50size3|| main.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\longvs32fx32s32^OSHeapHandleunsigned shortMATHCRC16Contextvu16MATHChecksum8Contextwctype_tMATHChecksum16ContextGXRgbREGType16PMBatteryLevelwint_tREGType16vGXRgbaWint_tOSBootTypewchar_tu16unsigned charREGType8REGType8vu8MATHCRC8Contextvu8MINDmaDeviceMATHCRC32ContextFATFSDirectoryHandleOSIrqMaskFSCommandTypeFATFSSeekModeCARDEventFATFSCommandIDOSIntrModeFATFSMediaTypeFSEventFATFSResultPMWakeUpTriggerFATFSFileHandlePMLogicFSOverlayIDVecFx10 NVRAMConfigEx [ ncd psaveCount rcrc16 tncd_ex crc16_ex NVRAMConfigExpNVRAMConfigData version pad  owner R alarm X tp doption[ NVRAMConfigDataPNVRAMConfigOwnerInfo favoriteColor rsv  birthday pad  nickname  comment NVRAMConfigOwnerInfoNVRAMConfigDate month day NVRAMConfigDateNVRAMConfigNickname u str length rsv NVRAMConfigNickname 6NVRAMConfigComment str 4length 5rsv NVRAMConfigComment4NVRAMConfigAlarm hour minute second pad enableWeek  alarmOn rsv NVRAMConfigAlarm NVRAMConfigTpCalibData raw_x1 raw_y1 dx1 dy1 raw_x2 raw_y2 dx2 dy2 NVRAMConfigTpCalibData NVRAMConfigOption language  agbLcd  detectPullOutCardFlag  detectPullOutCtrdgFlag  autoBootFlag  rsv input_favoriteColor input_tp input_language input_rtc input_nickname timezone rtcClockAdjust wrtcOffsetNVRAMConfigOptionlong longwfx64wvs64wfx64cws64NVRAMConfigDataEx version language valid_language_bitmap HpaddingNVRAMConfigDataEx || ]TwlSpMain||n]GX_VBlankIntrn^PenablenRrval||^]OS_EnableIrq'Pprep| |B]OS_HaltI ]PrintDebugInfor||D ]InitializeFatfs || ^]InitializeAllocateSystem PmemType ^Phh|| ^]InitializeAllocateSystemCore UmemType PheapSize o Phi u Plo PheapSize { Phi  Plo ^Thh|| ]OS_GetSubPrivArenaLo|| ]OS_GetSubPrivArenaHi&||[v]MI_CpuClear8t[v Pdest[vPsize|| ]OS_GetWramSubPrivArenaLo| | ]OS_GetWramSubPrivArenaHi || ]ReadUserInfo> PallowedChannel= enableChannel0  wMac Ri  Tp Qcheck   temp offset ||Yv]MI_CpuCopy32YvYPsrcYv_PdestYvPsize| |lv]MI_CpuClear32]lvePdestlvPsize |0|Fv]MI_CpuFill32FvkSdestFvPdataFvPsize0|Z|W ^]IsValidConfigExY ipl2_type\|||s ]GetRomValidLanguageYv PlangBitu Pret||| ]CheckCorrectNCDEx qUncdsp Prom_valid_language Vcrc_flag Pcalc_crc Wi|| ]VBlankIntrS | |/os_irqHandler.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7.TWL\src\}OSi_IrqThreadQueue"}breakCtx_OSThreadQueue Mhead MtailOSThreadQueueS_OSThread context Hstate LMnext Pid Tpriority X!profiler \'queue `-link hymutex l2mutexQueue tstackTop xstackBottom |stackWarningOffset joinQueue ~specific alarmForSleep destructor !userParameter ^systemErrnoSOSThreadHOSContext cpsr r 8sp <lr @pc_plus4 Dsp_svcOSContext4 @enumOS_THREAD_STATE_WAITINGOS_THREAD_STATE_READYOS_THREAD_STATE_TERMINATED_OSThreadLink Mprev Mnext-OSThreadLinkOSMutex queue Mthread count linkOSMutex_OSMutexLink ynext yprevOSMutexLink_OSMutexQueue yhead ytail2OSMutexQueue !,OSiAlarm Ghandler !arg tag Zfire prev next Zperiod $ZstartOSAlarmM!unsigned long longZvu64ZOSTitleIdZREGType64ZREGType64vZOSTickZu64!$ | |-]OS_IrqHandler | |]OS_BreakIrqHandler@ | |]OS_IrqHandler_ThreadSwitchu ||aNos_irqTable.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ |OSi_IrqCallbackInfoIndex |OS_IRQTable2] |OS_IRQTable }OSi_IrqCallbackInfo <    4!   L!func enable _!arg OSIrqCallbackInfoR!_!k!@no_name@!! | |]OS_IrqDummy! |8|]OSi_IrqCallback$"^Pindexe!PcallbackTimask8|D|&]OSi_IrqDma0J"D|P|,]OSi_IrqDma1p"P|\|2]OSi_IrqDma2"\|h|8]OSi_IrqDma3"h|t|G]OSi_IrqTimer0"t||M]OSi_IrqTimer1 #||S]OSi_IrqTimer24#||Y]OSi_IrqTimer3\#||m]OSi_IrqVBlank#o!Pcallback||]OSi_IrqNDma0#||]OSi_IrqNDma1#||]OSi_IrqNDma2$||]OSi_IrqNDma38$b|<|mos_interrupt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\$4!$$@no_name@ %%@no_name@4%||']OS_InitIrqTablej%||<]OS_SetIrqFunction%<VintrBit<$Ufunction?$Tinfo>^Si||r]OS_SetIrqFunctionExS&rPintrBitr$Pfunctiont^Ui||]OSi_EnterNDmaCallback&PdmaNo$Pcallback%Parg||]OSi_EnterTimerCallback2'PtimerNo%Pcallback:%Parg|<|3]OS_SetIrqMask'3Tintr6Pprep5^Pime<|L|^]OS_DisableIrq'PprepL|l|>]OS_SetIrqMaskEx2(>TintrAPprep@^Pimel||Q]OS_EnableIrqMask(QTintrTPprepS^Pime||[]OS_EnableIrqMaskEx([Tintr^Pprep]^Pime||n]OS_DisableIrqMaska)nTintrqPprepp^Pime||x]OS_DisableIrqMaskEx)xTintr{Pprepz^Pime||]OS_ResetRequestIrqMask2*TintrPprep^Pime|<|]OS_ResetRequestIrqMaskEx*TintrPprep^Pime+<||zos_pxi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\L}OSi_IsResetOccurredN}OSi_IsTerminateOccurred<|H|$^]OS_IsResetOccurred+H|T|5^]OSi_IsTerminatePxiOccurred+T|`|C]OSi_SetTerminatePxiOccurred,`||U]OSi_CommonCallbacku,UPdataXPcommand||]OSi_SendToPxi,PdataUpxi_send_datat||[os_spinLock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\^P}isInitialized-OSLockWord lockFlag ownerID extension-OSLockWord.-+.-=.|6|R]OSi_SyncWithOtherProc/R^PtypeR-UsyncBufj^Tsum[^TnW-PpconfV-PpfinishU-Pptr2T-Pptr18|t|]OS_InitLock5/t||q]OS_LockByWord/qUlockIDq-Tlockpq.VctrlFuncp||]OSi_DoUnlockByWord'0PlockID.Ulockp%.TctrlFuncp^VdisableFIQ |j|]OSi_DoTryLockByWord0UlockID1.Vlockp7.TctrlFuncp^WdisableFIQlastLockFlagx||]OS_LockCard1PlockID||]OS_UnlockCardF1PlockID||]OS_TryLockCard1PlockID||]OSi_AllocateCardBus1|| ]OSi_FreeCardBus1|d|A]OS_GetLockID2d||]OS_ReleaseLockIDE2PlockID||os_printf.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\2char2||^]OS_SPrintfC32Pdst2 fmtJ|| os_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\^5T}OSi_SystemCallbackInSwitchThreadaX}OSi_RescheduleCountT5\}OSi_CurrentThreadPtrX^`}OSi_IsThreadInitialized(d}OSi_SystemStackBufferk5h}OSi_StackForDestructorh^l}OSi_ThreadIdCountQ5p}OSi_ThreadInfo[a6}OSi_IdleThreadStackNS}OSi_IdleThreadMS}OSi_LauncherThread5SS5OSThreadInfo isNeedRescheduling irqDepth 5current 5list 5switchCallback5OSThreadInfo!SSSSSSSSS2SSSSSSSS5S7@no_name@7S5SSSSSSSSSSS7S75577OSThreadResource ^num7OSThreadResource||]OSi_InsertLinkToQueue8r6Pqueuex6Pthread~6Rprev6Rprev6Tnext|6|6]OSi_RemoveSpecifiedLinkFromQueue<96Pqueue6Pthread6Tprev6Snext6Rt8|T|,5]OSi_RemoveMutexLinkFromQueue9,6Pqueue26Pnext.6RtT||t]OSi_InsertThreadToList:t6Pthreadw6Tprev6St||]OSi_RemoveThreadFromList:6Pthread6Rpre6Qt|0|]OSi_RescheduleThread:6UnextThread6TcurrentThread6VinfoT| |]OS_InitThread; ||j]OS_CreateThread;j6Uthreadk7funck%7argk+7Tstackk stackSizek$priooPenable||]OS_ExitThread<|@|]OSi_ExitThread_ArgSpecifiedb<17Uthread77Targ@|p|]OSi_ExitThread<=7PargC7PdestructorI7PcurrentThreadp||]OSi_ExitThread_Destroy!=O7TcurrentThread||]OS_SleepThread=U7Uqueue[7TcurrentThreadVenable|L|]OS_WakeupThread=a7UqueueTenableL|j|]OS_WakeupThreadDirect?>g7UthreadPenablel||5]OS_SelectThreadz> m7Pt||g^]OS_SetThreadPriority ?gs7UthreadgWpriokenablejy7Vprei7Tt||]OS_GetThreadPriorityO?7Pthread|d|]OS_Sleep?UmsecTbak_cpsr7p_threadalarmp||]OSi_SleepAlarmCallback=@7Parg7Pp_thread7Ppp_thread||7]OS_SetSwitchThreadCallback@7UcallbackPenabled7Tprev||]OSi_IdleThreadProc@||!]OS_DisableScheduler9A$Tcount#Penabled||9]OS_EnableSchedulerA<Tcount;Penabled|| os_context.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\|p|$]OS_InitContextB%-BPcontext&Qnewpc(Rnewspp||^^]OS_SaveContextB^3BPcontext||]OS_LoadContext'C9BPcontext||)os_emulator.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\P}OSi_PlatformT}OSi_EmulatorX}OSi_IsDetectedEmulator\}OSi_IsDetectedPlatformU\|OSi_RunningConsoleTypeCache`|OSi_ConsoleTypeCacheD|table| |V]OS_GetRunningConsoleTypeEaPemulator |<|]OSi_DetectEmulatorJE<||]OSi_DetectPlatformwE||']OSi_DetectDebuggerE||^]OSi_IsRunOnTwlEu|.|Gos_message.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\oF OSMessageQueue queueSend queueReceive ,GmsgArray msgCount firstIndex usedCountoFOSMessageQueue&G8GoFoFVGoFhG||!]OS_InitMessageQueueG!iFPmq!2GPmsgArray!PmsgCount|j|7^]OS_SendMessageSH7>GTmq7DGVmsg7Uflags9Wenabledx||d^]OS_ReceiveMessageHdJGUmqdPGTmsgdVflagsfenabled|.|^]OS_ReadMessageFI\GUmqbGTmsgVflagsenabled0|. |@eos_mutex.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\SSSS0|L|%]OS_InitMutex|J%IPmutexL||8]OS_LockMutexJ8IUmutex;ITcurrentThread:Ve||V]OS_UnlockMutex"KVIPmutex||d]OSi_UnlockAllMutexyKdIUthreadfJPmutex|$|^]OS_TryLockMutexK JUmutex^TlockedVsaved$|@|F3]OS_IncreaseMutexCount9LF3IPmutexH3Ptype@||K]OSi_UnlockMutexCoreLKJUmutexKVtypeO^TunlockedMe||L3]OS_DecreaseMutexCountML3IPmutexN3Ptype| |-]OSi_EnqueueTailvM-JPthread-JPmutexA"JRprev |. |_]OSi_DequeueItemM_(JPthread_.JPmutexz4JQprevy:JRnext0 |p |7os_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\0 |8 |R]OS_InitN8 |p |i]OSi_InitCommonNW| ||!|os_arena.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\^`}OSi_Initialized@enumOS_ARENA_MAINOS_ARENA_MAIN_SUBPRIVOS_ARENA_MAINEXOS_ARENA_ITCMOS_ARENA_DTCMOS_ARENA_SHAREDOS_ARENA_WRAM_MAINOS_ARENA_WRAM_SUBOS_ARENA_WRAM_SUBPRIVOS_ARENA_MAX HOSArenaResource PinfoPOSArenaResourceH Qlo $QhiPOSArenaInfo$P$P| | |]OS_InitArenaNQ | |P]OS_InitArenaHiAndLoQPOVid | |dP]OS_GetArenaHiQdOPid | |xP]OS_GetArenaLoRxOPid |4!|P]OS_GetInitArenaHirROPidPsysStackLoRirqStackLo4!|p!|P]OS_GetInitArenaLoROPidQPprivWramLoHPwramSubLop!||!|]OS_SetArenaLo/SOPidPPnewLo|!|X#|os_alloc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\Sd}OSiHeapInfo$S Cell KTprev QTnext sizeSCellSS HeapDesc size Tfree Tallocated]THeapDescSS ^currentHeap ^numHeaps OUarenaStart UUarenaEnd [UheapArrayTOSHeapInfo]T>U]T>US]T>US]T>U|!|!|^]OS_SetCurrentHeap@VOUid^TheapPenabled^PprevaUPheapInfo!| "|>WT]OS_InitAlloc'W>OVid>gUTarenaStart>mUWarenaEnd>^UmaxHeapsXsUPhdC enabledB^UiASarraySize@yUPheapInfo "|t"|^]OS_CreateHeapWOUidUTstartUVend enabledUPcellUPhd^UheapURheapInfot"|X#|]OS_CheckHeapXOWid^UheapenabledretValueVfreeTtotalUPcellUQhdUQheapInfoX#| %|os_exception.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\5,Z}OSi_UserExceptionHandler6KZ}OSi_UserExceptionHandlerArg<}OSi_OriginalHandler9QZ}OSi_DebuggerHandler2Z}OSi_ExContext2ZEZT context Hcp15 Lspsr PexinfoWZOSiExContextX#|#|r]OS_InitExceptionZ#|$|.]OSi_ExceptionHandler[$|($|l]OSi_GetAndDisplayContextK[($|$|]OSi_SetExContextv[$| %|]OSi_DisplayExContext[ %|8%|Nos_timer.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_TimerReserved %|8%|D]OSi_SetTimerReserved\D^PtimerNum8%|\&|os_tick.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_UseTick$^}OSi_NeedResetTimer!Z}OSi_TickCounter8%|%|7]OS_InitTick]%|%|[^]OS_IsTickAvailable]%|%|j]OSi_CountUpTick%^%|P&|Z]OS_GetTick^UprevZcountHcountLP&|\&|]OS_GetTickLo^\&|x)|9os_alarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_UseAlarm _}OSi_AlarmQueueOSiAlarmQueue _head _tail____OSAlarmResource ^num=`OSAlarmResource\&|&|7]OSi_SetTimera7_Talarm;VtimerCount:ZPPtick9wPPdelta&|&|f]OS_InitAlarm(a&|&|^]OS_IsAlarmAvailableVa&|'|]OS_CreateAlarma_Palarm'|'|]OSi_InsertAlarm)b_TalarmZVUfireZPPtick_Rnext_Pprev'|(|]OS_SetAlarmb_UalarmZVTtick`Whandler`argPenabled(|l(|B]OS_SetPeriodicAlarmmcB `UalarmBZVTstartBZperiodB`$handlerC`(argEPenabledl(|(|m]OS_CancelAlarmcm`UalarmpTenabledo%`Pnext(|(|]OSi_AlarmHandlerd+`arg(|x)|]OSi_ArrangeTimerd1`Thandler7`PnextZPPtickx)|,||Yos_valarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\$ }OSi_UseVAlarm(}OSi_PreviousVCount'}OSi_VFrameCount e}OSi_VAlarmQueueOSiVAlarmQueue ehead !gtaile(OSiVAlarm fhandler farg tag frame ffire fdelay gprev gnext ^period ^finish $^canceledeOSVAlarmffshortfvs16ffx16fs16eeeeeeeeefeQgeeeeeQgOSVAlarmResource ^numgOSVAlarmResourcex)|)|V]OS_InitVAlarmg)|)|^]OS_IsVAlarmAvailable+h)|*|]OSi_InsertVAlarmh'gPalarm-gQnext3gPprev*|8*|]OSi_DetachVAlarmh9gPalarm?gRnextEgQprev8*|B*|!]OS_CreateVAlarm6i!KgPalarmD*|*|s]OS_SetPeriodicVAlarmis^gUalarmsfTcountsfVdelaysdgWhandlersjg argwPcurrentVFrameuenabled*|*|]OSi_SetNextVAlarm?jpgTalarm*|*|]OS_SetVAlarmTagjvgUalarmTtag*|(+|]OS_CancelVAlarmj|gUalarmPenabled(+|x+| ]OS_CancelVAlarms`k Utag$gPnext#gPalarm"Venabledx+|x,|I]OSi_VAlarmHandlerkOTcurrentVFrameLgThandlerx,|,|]OSi_GetVFramelTvcountPenabled,|,-|Jyos_system.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\@enumOS_PROCMODE_USEROS_PROCMODE_FIQOS_PROCMODE_IRQOS_PROCMODE_SVCOS_PROCMODE_ABORTOS_PROCMODE_UNDEFOS_PROCMODE_SYS,|,|']OS_EnableInterruptsm,|,|;]OS_DisableInterruptsm,|,|O]OS_RestoreInterruptsmOPstate,|,|{]OS_DisableInterrupts_IrqAndFiq4n,|-|]OS_RestoreInterrupts_IrqAndFiqnPstate-|-|l]OS_GetProcModen-|,-|]OS_SpinWaitSysCyclesnPcycle,-|d-|ios_systemWork.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\;^ }retval;^$}initialized@OSBootInfo boot_type length rssi qbssid ssidLength *qssid .capaInfo 0;qrateSet 4beaconPeriod 6dtimPeriod 8channel :cfpPeriod <cfpMaxDuration >rsv1oOSBootInfo  basic support,-|8-|!]OS_GetBootTypeq8-|d-|8^]OSi_IsCodecTwlModeqd-||os_reset.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\5(}OSi_IsInitReset-r|OSi_LtdMainParamsrd-|-|A]OS_InitResetr-|-|]OS_ResetSystemsTn||]OSi_DoResetSystemDs|8|^]OSi_DoBootis||]OSi_ReloadTwlRomDatasos_ownerInfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\TOSOwnerInfo language favoriteColor ubirthday KunickName nickNameLength \ucomment RcommentLength6tOSOwnerInfoOSBirthday month dayuOSBirthday 62 os_ownerInfoEx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\VOSOwnerInfoEx language favoriteColor ubirthday  wnickName nickNameLength wcomment RcommentLength Tcountry Upadding vOSOwnerInfoEx 6(OSTWLSettingsData txflags uzrsv country language rtcLastSetYear wrtcOffset zagreeEulaVersion zpad1 zpad2 zpad3 0zpad4 Dzowner {parentalControl+wOSTWLSettingsData y__anon isFinishedInitialSetting isFinishedInitialSetting_Launcher isSetLanguage isAvailableWireless rsv isAgreeEULAFlagList raw isFinishedInitialSetting isFinishedInitialSetting_Launcher isSetLanguage isAvailableWireless rsv isAgreeEULAFlagListPOSTWLOwnerInfo userColor rsv pad {birthday {nickname {commentzOSTWLOwnerInfoOSTWLDate month day{OSTWLDate 6OSTWLParentalControl |flags }rsv1 ogn ratingAge secretQuestionID secretAnswerLength }rsv ~password ~secretAnswer{OSTWLParentalControl isSetParentalControl pictoChat dsDownload browser prepaidPoint photoExchange ugc rsv2@OSTWLWirelessFirmwareData data ~rsv.~OSTWLWirelessFirmwareData<.|.|Pos_entropy.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\<.|.|!]OS_GetLowEntropyData!?Ubuffer%ETmacAddress].|^/|os_terminate_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7\src\,^,}terminated,^0}sent.|@/|$]OS_TerminateL/|\/|6^]OS_EnableIrqހ6Pprep\/|^/|l]OSi_TerminateCore os_event.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\  flag queueOSEvent8os_application_jump.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ LauncherParam ҂header ^bodyLauncherParamLauncherParamHeader magicCode version bodyLength crc16҂LauncherParamHeaderLauncherParamBody v1^LauncherParamBody ZprevTitleID ZbootTitleID flags  rsvLauncherBootFlags isValid bootType  isLogoSkip  isInitialShortcutSkip  isAppLoadCompleted  isAppRelocate rsvLauncherBootFlags> ||mi_ndma.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\#؅|MIi_NDmaConfig@_MINDmaConfig intervalTimer prescaler blockWord wordCountMINDmaConfig@enumMIi_NDMA_TYPE_FILLMIi_NDMA_TYPE_COPYMIi_NDMA_TYPE_SENDMIi_NDMA_TYPE_RECVMIi_NDMA_TYPE_PIPEMIi_NDMA_TYPE_HBLANKMIi_NDMA_TYPE_HBLANK_IFMIi_NDMA_TYPE_MMCOPYMIi_NDMA_TYPE_GXCOPYMIi_NDMA_TYPE_GXCOPY_IF MIi_NDMA_TYPE_CAMERACONT Ƈ|D|L]MIi_GetControlDataֈLqPndmaTypeNPcontDataD|0|]MIi_NDmaAsync_withConfig_DevqndmaTypeWndmaNoTsrcdest data$sizeUcallback̇,arg҇Vconfig4dev8enableenabledVcontData0|H| ]MI_InitNDmaEH||P]MI_NDmaPipeAsync_SetUpPVndmaNoP؇UsrcPއTdestPPsizeP0callbackP4arg||7]MI_NDmaSendAsync_Dev7VndmaNo7Usrc7Tdest7Psize70callback74arg78dev||U]MI_NDmaRecvAsync_DeveUVndmaNoUUsrcUTdestUPsizeU0callbackU4argU8dev|T|s]MI_NDmaPipeAsync_Dev sVndmaNos Usrcs&TdestsPsizes,0callbacks24args8devT|l|^]MI_IsNDmaBusy^PndmaNol||]MI_WaitNDmaƍTndmaNo8PdmaCntpPenabled||]MI_StopNDma.TndmaNo>PregContPenabled||]MI_StopAllNDmaW| |$]MI_NDmaRestart$TndmaNo | |{]MI_SetNDmaInterval {PndmaNo{PintervalTimer{Pprescaler |,|]MI_SetNDmaBlockWorddPndmaNoPword,|8|]MI_SetNDmaWordCountPndmaNoPwordCount8|`|]MI_InitNDmaConfig ^UnDTp`||]MIi_Aes_NDmaSendUndmaNoJTsrcPsizePPcallbackV(arg\,pConfig||]MIi_Aes_NDmaRecv\UndmaNobTdestPsizehPcallbackn(argt,pConfig`/|0|>1mi_sharedWram.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\^4}lockm8}finishPtr7^<}sInitializeds@}resultPtr^@enumMI_WRAM_AMI_WRAM_BMI_WRAM_C`/|/|]MI_InitWramManager/|0|]MIi_CallbackForPxiwPdata^PsendTypeUretvalyPwramPparam0|L0|^]MIi_DoLockWramSlots͓yPwramPslotsL0|0|^]MIi_DoUnlockWramSlots%yPwramPslots0|41|dOmi_dma.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ b32 b16MIiDmaClearSrc0|0|]MI_WaitDmaTdmaNoPpPdmaCntpPenabled0|1|]MI_StopDmaTdmaNoPp PdmaCntpPenabled1|41| ]MI_StopAllDma'41|3|mmi_memory.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\41|P1|]MIi_CpuSend16–PsrcpȖQdestpRsizeP1|l1|]MIi_CpuRecv16ΖPsrcpԖQdestpRsizel1|1|X]MIi_CpuClear32^XPdataXږQdestpXRsize1|1|o]MIi_CpuCopy32oPsrcpoQdestpoRsize1|1|]MIi_CpuPipe32%srcpQdestpRsize1|2|]MIi_CpuSendFastPsrcpQdestpRsize2|2|]MI_CpuFill8PdstpQdataRsize2|3|x]MI_CpuCopy8Jx PsrcpxQdstpxRsize3|3|^]MI_CpuComp8Pmem1Pmem2Psize^Pd"\p1end(Pp2.Pp13|4|Gmi_swap.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\3|4|+]MI_SwapWord+PsetData+QdestpImi_uncompress.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ srcNum srcBitNum destBitNum destOffset destOffset0_onMIUnpackBitsParammi_stream.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ uinitStream terminateStream readByteStream ƞreadShortStream ٞreadWordStreamȝMIReadStreamCallbacks{̞ߞ4|4|ܪmi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\4|4|!]MI_Initkmi_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\MICache pagewidth valid invalid loading ^valid_total ^invalid_total ^loading_totalAMICache MICachePage next offset fbufferMICachePage MIDevice ơuserdata ̡Read WritelMIDeviceҡ^ơơ^ơơW4|4|Tpad_xyButton.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pad\ARM7\src\^D}PADi_XYButtonAvailableH}PADi_XYButtonAlarm4|x4|)^]PAD_InitXYButton,x4|4|X]PADi_XYButton_Callbackq]Ufold4|4|pxi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\4|4|)]PXI_Init/4|6|pxi_fifo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\t}FifoCtrlInitx}FifoRecvCallbackTable"(A^@enumPXI_FIFO_TAG_EXPXI_FIFO_TAG_USER_0PXI_FIFO_TAG_USER_1PXI_FIFO_TAG_SYSTEMPXI_FIFO_TAG_NVRAMPXI_FIFO_TAG_RTCPXI_FIFO_TAG_TOUCHPANELPXI_FIFO_TAG_SOUNDPXI_FIFO_TAG_PMPXI_FIFO_TAG_MIC PXI_FIFO_TAG_WM PXI_FIFO_TAG_FS PXI_FIFO_TAG_OS PXI_FIFO_TAG_CTRDG PXI_FIFO_TAG_CARDPXI_FIFO_TAG_WVRPXI_FIFO_TAG_CTRDG_ExPXI_FIFO_TAG_CTRDG_PHIPXI_FIFO_TAG_MIPXI_FIFO_TAG_AESPXI_FIFO_TAG_FATFSPXI_FIFO_TAG_CAMERAPXI_FIFO_TAG_WMWPXI_FIFO_TAG_SCFGPXI_FIFO_TAG_SNDEXPXI_FIFO_TAG_SEAPXI_MAX_FIFO_TAG (@enumPXI_PROC_ARM9PXI_PROC_ARM7 Ve rawPXIFifoMessage tag err data@enumPXI_FIFO_SUCCESSPXI_FIFO_FAIL_SEND_ERRPXI_FIFO_FAIL_SEND_FULLPXI_FIFO_FAIL_RECV_ERRPXI_FIFO_FAIL_RECV_EMPTYPXI_FIFO_NO_CALLBACK_ENTRY4|L5|(]PXI_InitFifo+Venabled*^SiL5|5|]PXI_SetFifoRecvCallback#^UfifotagߧTcallbackRenabled5|5|^]PXI_IsCallbackReady{^PfifotagPproc5|5|^]PXI_SendWordByFifo^PfifotagPdata^PerrAfifomsg5|86|]PXIi_SetToFifoNUdataPenabled86|6|*]PXIi_HandlerRecvFifoNotEmptyƫ.APtag-Pret_code,Afifomsg6|7|"std_string.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\222222222222226|6|-c]STD_CopyString-iPdestp-oPsrcp/uUretval6|*7|i^]STD_CopyLStringi{SdestpiPsrcpi^VsizUs^Ti,7|`7|c]STD_SearchStringPsrcpPstr^Tn^Pi`7|p7|;^]STD_GetStringLengthc;Pstrg^Rnp7|7|^]STD_CompareStringPstr1Pstr27|7|6^]STD_CompareNStringL6Pstr16Pstr26^Plen^Ud^Tc~^Si7|?|@std_sprintf.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\22222222227|7|t^]STD_TSNPrintftPdsttPlentfmtv^Pret7|?|^]STD_TVSNPrintf dstlenWfmtvlist^Pn_pad^Pd^PdZPPr^PdPrUv^Pd|ZPPvalQ2Vpad>Sp_buf=^Rn_buf32Qpad*^PcPp_start2Phex_char^y }sndMesgBuffer=oF@}sndMesgQueue<`}sndAlarm:S}sndThread;0}sndStack ZF|`F|v]SND_InitvUthreadPrio`F|F|]SND_StartIntervalTimerF|F|]SND_StopIntervalTimer?F|F|^]SND_SendWakeupMessageoF|F|]SNDi_LockMutexF|F|]SNDi_UnlockMutexF|F|(]SndAlarmCallbackF|G|9]SndThread0S^UdoPeriodicProcG|G|4snd_capture.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\@enumSND_CAPTURE_0SND_CAPTURE_1@enumSND_CAPTURE_FORMAT_PCM16SND_CAPTURE_FORMAT_PCM8@enumSND_CAPTURE_IN_MIXERSND_CAPTURE_IN_CHANNELSND_CAPTURE_IN_MIXER_LSND_CAPTURE_IN_MIXER_RSND_CAPTURE_IN_CHANNEL0SND_CAPTURE_IN_CHANNEL2@enumSND_CAPTURE_OUT_NORMALSND_CAPTURE_OUT_CHANNEL_MIXSND_CAPTURE_OUT_CHANNEL0_MIXSND_CAPTURE_OUT_CHANNEL2_MIXG|G|%]SND_SetupCapturet%Tcapture&Qformat'KPbuffer_addr(^Vlength(^repeat(Qin(  out*^SoffsetG|G|A^]SND_IsCaptureActiveAPcaptureG|Q|ORsnd_exchannel.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\?0}sWeakLockChannelj<|shift>4}sLockChannelj@|channel_orderjP|attack_table)TSNDExChannel myNo type env_status active_flag start_flag auto_sweep sync_flag pan_range original_key fuser_decay2 key velocity init_pan user_pan fuser_decay fuser_pitch env_decay sweep_counter sweep_length attack sustain decay release "prio #pan $volume &timer (lfo 2fsweep_pitch 4length 8jwave D __anon D7data Dduty H=callback L7callback_data P\nextLink)SNDExChannel SNDLfo param delay_counter counterSNDLfoSNDLfoParam target speed depth range delaySNDLfoParam SNDWaveParam format loopflag rate timer loopstart looplenjSNDWaveParam 7data dutyC\b7)SNDExChannelCallbackStatusSND_EX_CHANNEL_CALLBACK_DROPSND_EX_CHANNEL_CALLBACK_FINISH)))j)))))))))C)))))))G|(H|\]SND_ExChannelInit_^Rch^#Pch_p(H|dI|w]SND_UpdateExChannelz^UchyTch_pdI|K|]SND_ExChannelMain^doPeriodicProcGVvolumeFPtimerUpanpitchWdecay^chTch_pL|M|X]SND_SetExChannelRelease;XTch_pX^Prelease@M|FM|h]SND_ReleaseExChannel~hPch_pHM|PM|v^]SND_IsExChannelActivevPch_pPM|N|\]SND_AllocExChannelPchBitMask^prio^PstrongRequest callback& callbackData^PchNo,Uch2_p^Si2Tch_pN|N|]SND_FreeExChannel8Pch_pN| O|]SND_StopUnlockedChannelzVchBitMask^UchNoPmask>Tch_p O|O|]SND_LockChannel WchBitMaskflags^UchNoVmaskDTch_pO|O|L]SND_UnlockChanneldLPchBitMaskLPflagsO|O|a]SND_GetLockedChannelaPflagsO|0P|w]SND_InvalidateWave wJVstartwPWendzUchyVPch_p0P|BP|]SND_InitLfoParam^\PlfoDP|P|]SND_UpdateLfobPlfoQoffsetP|P|]SND_GetLfoValuehTlfoP|P|]CalcRelease(^RreleaseP|Q|]StartExChannelznPch_pPlengthQ|b|Fusnd_seq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\`^8}sMmlPrintEnable]O<}seqCacheSNDSeqCache base endp bufferOSNDSeqCache$SNDPlayer active_flag prepared_flag pause_flag pad_ myNo pad2_ pad3_ prio volume fextFader Ztracks tempo tempo_ratio tempo_counter pad__ kbankSNDPlayerq<SNDBankData fileHeader blockHeader 9waveArcLink 8instCount <xinstOffsetqSNDBankDataSNDBinaryFileHeader signature byteOrder version fileSize headerSize dataBlocksSNDBinaryFileHeader2SNDBinaryBlockHeader kind sizeSNDBinaryBlockHeader JSNDWaveArcLink waveArc PnextJSNDWaveArcLink<SNDWaveArc fileHeader blockHeader PtopLink Vreserved 8waveCount <gwaveOffsetSNDWaveArcJq@SNDTrack active_flag note_wait mute_flag tie_flag note_finish_wait porta_flag cmp_flag channel_mask_flag pan_range prgNo volume volume2 pitch_bend bend_range pan ext_pan fextFader fext_pitch attack decay sustain release prio transpose porta_key porta_time fsweep_pitch mod channel_mask wait $base (cur ,$call_stack 85loop_count ;call_stack_depth <Fchannel_listSNDTrack )q@enumSND_SEQ_MUTE_OFFSND_SEQ_MUTE_NO_STOPSND_SEQ_MUTE_RELEASESND_SEQ_MUTE_STOP@enumSEQ_ARG_U8SEQ_ARG_S16SEQ_ARG_VMIDISEQ_ARG_RANDOMSEQ_ARG_VARIABLEf)))))fQ|\Q|]SND_SeqInit^TtrackNo^VplayerNoPplayer_p\Q|4R|]SND_SeqMainl^doPeriodicProcplayerStatus^VplayerNoTplayer_p4R|TS|-]SND_PrepareSeqf-^playerNo-WseqBase-seqOffset-Ubank_p4UtrackBitMask3Pcommand2^PtrackID1^VtrackNo/Tplayer_pTS|S|]ReadByteUtrack_pS|S|]SND_StartPreparedSeq^PplayerNoS|S|]SND_StartSeqi^TplayerNoLPseqBasePseqOffsetRPbank_pS|T|]SND_StopSeq^TplayerNoXPplayer_pT|PT|]SND_PauseSeqS^PplayerNo^Pflag^UtrackNo^Ptrack_pdPplayer_pPT|T|]SND_SkipSeq^PplayerNoVtickUskipCount^UtrackNojPtrack_ppTplayer_pT|U|']SND_SetTrackMute'^PplayerNo'UtrackBitMask'vWmute+^TtrackNo*Ptrack_p)Pplayer_pU|XU|I]SND_SetTrackAllocatableChannelzI^PplayerNoIUtrackBitMaskIPchBitMaskM^TtrackNoLPtrack_pKPplayer_pXU|U|l]SND_InvalidateSeq(lWstartlendq^UtrackNop Ptrack_po^TplayerNonPplayer_pU|U|]SND_InvalidateBankUstartVend^TplayerNo$Pplayer_pU|V|]SNDi_SetPlayerParamB^PplayerNoPoffsetPdata^Psize*Pplayer_pV|V|]SNDi_SetTrackParam!^PplayerNoUtrackBitMaskWoffsetdata^Tsize^VtrackNo0Ptrack_p6Pplayer_pV|V|/]InitCacheX/<PptrV|V|V]Read16VBUtrack_pXPretV|V|`]Read24`HTtrack_pbUretV|pW|]ReadArgNUtrack_pTVplayer_pZPargTypefUmaxfTminPrandPvarPtrPvarNoPvarpW|X|]InitTrackUtrack_pX|X|]StartTrackiPtrack_pPseqBasePseqOffsetX|LX|=]ReleaseTrackChannelAll=Ttrack_p=Pplayer_p=^Urelease?Tch_pLX|jX|^]FreeTrackChannelAllI^Ttrack_p`Uch_plX|X|]GetPlayerTrackPplayer_p^PtrackNoPtrackIDX|X|]ClosePlayerTrack% Uplayer_p^TtrackNoPtrack_pX|X|]FinishPlayerzTplayer_p^UtrackNoX|&Y|]ChannelCallbackUdrop_pbPstatus$TuserData*Qch_p0Ptrack_p(Y|Z|0]UpdateTrackChannel06Utrack_p0<Qplayer_p0^doRelease8Spitch7Rpan6Qdecay23Pdecay2BTch_pZ|`a|^]PlayerSeqMainHplayer_p^ doNoteOn^ trackNo^$active_flagNTtrack_p`a|a|<T]GetVariablePtr<ZPplayer_p<^PvarNoa|a|]^]AllocTrack-`^PtrackID_`Ptrack_pa|b|{]SetTrackMute{fTtrack_p{lPplayer_p{vPmutesnd_midiplayer.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\ SNDMidiPlayer bank track  main_volume  prio  pad4SNDMidiPlayerq SNDMidiTrack channels mod fsweep_pitch prgNo pitchbend porta_time volume pan expression transpose prio bendrange porta_flag porta_key attack decay sustain release rpnLSB rpnMSB nrpnLSB nrpnMSB rpn_flag pad1 pad2SNDMidiTrackSNDMidiChannel chp key pad1 pad2SNDMidiChannel) b|c|lsnd_bank.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\q6 SNDInstData type padding_ param6SNDInstData SNDInstParam Kwave original_key attack decay sustain release panSNDInstParambSNDKeySplit key instOffsetbSNDKeySplit6SNDDrumSet min max 5instOffsetSNDDrumSet6SNDInstPos prgNo indexFSNDInstPos SNDWaveData jparam samplesSNDWaveData)q6 b|b|^]SND_ReadInstData*Ubank^WprgNo^Vkey0Tinst6\RkeySplit5^Pindex%PdrumSetPinstOffsetb|*c|I]SND_GetWaveDataAddressmIUwaveArcI^TindexLPoffsetKTwave,c|c|t^]SND_NoteOnPtUch_pu^keyu^velocityuVlengthu banku Tinsty^Presultx^WreleasewPwave_datac|d|snd_work.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\B)T}SNDi_SharedWorkFX}SNDi_Work/SNDSharedWork finishCommandTag playerStatus channelStatus captureStatus padding player `tglobalVariable/SNDSharedWork@-$ cvariable tickCounter f fSNDWork channel @player track $alarmSNDWork@)@5@SNDAlarm enable id count padding setting alarm5SNDAlarm Ztick ZperiodSNDDriverInfo work  chCtrl  workAddress lockedChannels  paddingSNDDriverInfo@ SNDChannelInfo ^activeFlag ^lockFlag volume pan pad_ i envStatus SNDChannelInfoSNDEnvStatusSND_ENV_ATTACKSND_ENV_DECAYSND_ENV_SUSTAINSND_ENV_RELEASE SNDPlayerInfo ^activeFlag ^pauseFlag trackBitMask tempo volume pad_ pad2_ SNDPlayerInfoSNDTrackInfo prgNo volume volume2 pitchBend bendRange pan transpose pad_ chCount channel SNDTrackInfoc|d|]SND_SetPlayerLocalVariable ^PplayerNo^PvarNofPvard|,d|]SND_SetPlayerGlobalVariabler ^PvarNofPvar,d|d|]SND_UpdateSharedWork ^VchNoUcaptureStatusTchannelStatusd|f|snd_alarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\5555d|d|U]SND_AlarmInitW^UalarmNod|d|`]SND_SetupAlarm`^PalarmNo`ZVUtick`Zperiod`^idbTalarmd|e|u]SND_StartAlarmu^UalarmNozUargyTalarmxZVWperiodwZ ticke|e|]SND_StopAlarmg^PalarmNoTalarme|f|]AlarmHandlerUargTalarmPmsgf|j|snd_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\HoF}sCommandMesgQueueG}sCommandMesgBuffer SNDCommand next !id argSNDCommandSNDCommandIDSND_COMMAND_START_SEQSND_COMMAND_STOP_SEQSND_COMMAND_PREPARE_SEQSND_COMMAND_START_PREPARED_SEQSND_COMMAND_PAUSE_SEQSND_COMMAND_SKIP_SEQSND_COMMAND_PLAYER_PARAMSND_COMMAND_TRACK_PARAMSND_COMMAND_MUTE_TRACKSND_COMMAND_ALLOCATABLE_CHANNEL SND_COMMAND_PLAYER_LOCAL_VAR SND_COMMAND_PLAYER_GLOBAL_VAR SND_COMMAND_START_TIMER SND_COMMAND_STOP_TIMER SND_COMMAND_SETUP_CHANNEL_PCMSND_COMMAND_SETUP_CHANNEL_PSGSND_COMMAND_SETUP_CHANNEL_NOISESND_COMMAND_SETUP_CAPTURESND_COMMAND_SETUP_ALARMSND_COMMAND_CHANNEL_TIMERSND_COMMAND_CHANNEL_VOLUMESND_COMMAND_CHANNEL_PANSND_COMMAND_SURROUND_DECAYSND_COMMAND_MASTER_VOLUMESND_COMMAND_MASTER_PANSND_COMMAND_OUTPUT_SELECTORSND_COMMAND_LOCK_CHANNELSND_COMMAND_UNLOCK_CHANNELSND_COMMAND_STOP_UNLOCKED_CHANNELSND_COMMAND_SHARED_WORKSND_COMMAND_INVALIDATE_SEQSND_COMMAND_INVALIDATE_BANKSND_COMMAND_INVALIDATE_WAVE SND_COMMAND_READ_DRIVER_INFO!f|0f|n]SND_CommandInit0f|j|]SND_CommandProc9]PM_Initr @SiXn|o|^]PM_AnalyzeCommand ^PdataeTi`Tcommando|o|]PM_ExecuteProcesso!9 UentryPresultUparameterTprocNumberPeo|p|]PMi_ReturnResult!PcommandPresult^UerrTdata  p|Jp|Spm_send.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\ p|Jp|2]PMi_SendPxiCommand"2Pcommand2Pdata4Upxi_send_dataLp|Bq|iqpm_pmic.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\Lp|p|>]PMi_SetRegister#>Preg>Udatap|p|]SPI_SendWait$Pdatap|q|Z]PMi_GetRegister\$ZPregq|"q|y]PMi_SetControl$yTsw{Pdata$q|Bq|]PMi_ResetControl$TswPdatamDq|t|7pm_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\%t|PMi_LEDStatus!>&d|PMi_AmpGainLevelTable@enumPM_LED_NONEPM_LED_ONPM_LED_BLINK_LOWPM_LED_BLINK_HIGHDq|s|8]PMi_SwitchUtilityProc'8PprocNumber8Tparameter:^Qn^PdsGain^PdsGainPtwlGainRns|t|H]MCU_ReadRegisterb'HTregJPitrm t|Nt|0^]MCU_WriteRegister'0Ureg0Tdata2PitrmPt|tt|t]PMi_SetLED(t%Tstatustt|t|]PMi_SetSoundPowerB(^Pboolt|t|]PMi_DoShutdownk(rt|v|pm_sleep.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\)')}PMi_PreDmaCntt|u|4]PMi_PreSleepForDma)`8)PndmaCntp<>)PdmaCntp6Tiu|v|]PMi_DoSleep*UtriggerkeyPatternWbacklightPb1^Trcnt_reg_restorercnt_reg_backup pmic_reg_backupprepIntrMask2prepIntrMaskprepIntrMode)v|w|pm_selfBlink.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\@}PMi_BlinkCounterC+}PMi_BlinkPatternNo-x|PMi_BlinkPatternData@enumPM_LED_PATTERN_NONEPM_LED_PATTERN_ONPM_LED_PATTERN_BLINK_LOWPM_LED_PATTERN_BLINK_HIGHPM_LED_PATTERN_BLINK1PM_LED_PATTERN_BLINK2PM_LED_PATTERN_BLINK3PM_LED_PATTERN_BLINK4PM_LED_PATTERN_BLINK5PM_LED_PATTERN_BLINK6 PM_LED_PATTERN_BLINK8 PM_LED_PATTERN_BLINK10 PM_LED_PATTERN_PATTERN1 PM_LED_PATTERN_PATTERN2 PM_LED_PATTERN_PATTERN3PM_LED_PATTERN_WIRELESS,.   Zpattern patternSize patternResolution-PMiBlinkPatternData,.v|w|N]PM_SelfBlinkProc.Q%PnextStatusPF.Upw|w|]PM_SetLEDPattern.+Ppatternw|w|+]PM_GetLEDPattern/z|p|pm_shutdown.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\6^X|PMiMCUBatteryEmptyCallbackCalled5^\|PMiMCUPwswCallbackCalled7^`|PMiInTerminate||<]PMi_DummyHandler[0|d|M]PMi_InitShutdownControl0OUenabledw|w| ]MCU_GetBatteryLevel0d||z]PMi_MCUPwswCallback1||]PMi_MCUResetCallback/1||]PMi_MCUShutdownCallbacka1||]PMi_MCUBatteryLowCallback1||]PMi_MCUBatteryEmptyCallback1||]PMi_DoResetHardware1||]PMi_DoExit2|"|C]PM_FlipHeartBeat\2GPval$|p|Y]PM_SetMcuForTerminate2dgt_md5.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\XMATHMD5Context 4__anon 4__anon a b c d 4state Zlength 4__anon  5buffer32 5buffer8'3MATHMD5Context 4__anon a b c d 4state a b c d@ 5buffer32 5buffer8@@?MATHiHMACFuncs dlength blength 5context 6hash_buf 6HashReset *6HashSetSource s6HashGetDigest.5MATHiHMACFuncs 6@no_name@$606@no_name@g6@no_name@m6@no_name@y6@no_name@6@no_name@6Ldgt_sha1.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\`MATHSHA1Context 7h 7block Tpool Xblocks_low \blocks_highH7MATHSHA1Context@?~crc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\MATHCRC8Table 8table8MATHCRC8TableMATHCRC16Table 9table8MATHCRC16TableMATHCRC32Table m9table/9MATHCRC32Table?net_sha256.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\lMATHSHA256Context :h Nl $Nh (:data h^num:MATHSHA256Context @?w|y|scfg_proc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\;}SCFGi_MessageBufferoF}SCFGi_MessageQueue"S$}SCFGi_Thread#;}SCFGi_Stack;Zw|Lx|6]SCFG_Init:<Lx|x|R]SCFGi_CommonCallback<RPpxiDatax|x|s]SCFGi_SendPxiData=sPcommandsPordinalsPdatauUpxiDatax|y|]SCFGi_Execj=PregValue<message^UindexPy|||1tp_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\}valid_cnt}invalid_cntS>}tpwTPWork >command >status $range (rangeMin ,v?vAlarm ?vCountS>TPWork TPStatusTP_STATUS_READYTP_STATUS_AUTO_STARTTP_STATUS_AUTO_SAMPLINGTP_STATUS_AUTO_WAIT_ENDe?SPITpData @e raw @bytes @halfs?SPITpData x  y  touch validity dummy2y|y|2]TP_Init@4Siy|y|]SPI_DummyWait Ay|z|l]TP_AnalyzeCommandsAlPdataTcommandqTiz|@{|]TP_AutoAdjustRangeA?PtpdataPdensity@{|||"]TP_ExecuteProcessmB"@UentrykPvCountfTiIdensityG?temp8Pe||||]TpVAlarmHandlerB@Uarg?temp||4|Qtp_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\7}last_touch_flgSPITpValiditySPI_TP_VALIDITY_VALIDSPI_TP_VALIDITY_INVALID_XSPI_TP_VALIDITY_INVALID_YSPI_TP_VALIDITY_INVALID_XY@enumTP_DETECT_AXIS_XTP_DETECT_AXIS_Y?||}|G]TPi_DetectTouchD}|}|]SPI_DummyWaitD}|~|~C]TPi_DetectPosEDdatarangeDPaxisQDWdensitySmaxRange~CvalidityPcommandWD tempQkRjTi~|4|]TP_ExecSamplingFhDTdataUrangenDVdensity%Uidensity_ydensity_xWtemp_touchtemp_posA4|$|jqmic_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\#WG}micw<MICWork XHcommand iHstatus $type &admode (Ibuf ,index 0size 4timerValue 6timerPrescaler 8temp16 :temporaryWGMICWork MICStatusMIC_STATUS_READYMIC_STATUS_AUTO_STARTMIC_STATUS_AUTO_SAMPLINGMIC_STATUS_AUTO_ENDMIC_STATUS_END_WAIT2WG4|d|7]MIC_InitFI9Sid|(|R]MIC_AnalyzeCommandIRPdataPehPwu32gTcommandWTi(||^]MicSetTimerValueJPvalue||B]MIC_ExecuteProcessJBIUentryPePeaPtempRPe|| I]MICi_GetSysWorkJ|$|]MIC_TimerHandlerJB$|܆|ڑmic_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\&}offset8,f}offset12*}sam12+}counter12%}counter8$}sam8$||9]MIC_ExecSampling8LYPadjustedKSaverage;Utemp||]SPI_DummyWaitReceiveL|܆|l]MIC_ExecSampling120MPadjusted~fSaveragenUtempg܆||hmic_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\MICIntrInfo handler sp delayIF dummyMMICIntrInfoMICIntrPrio ieBit tableIndex>NMICIntrPrioN܆||p]MIC_SetIrqFunctionOpPintrBitpNPfunctionrUi||]MIC_EnableMultipleInterrupt;O||]MIC_DisableMultipleInterruptrO||]MIC_GetDelayIFOfs_file.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\FSArgumentForSuspendFSArgumentForUnmountFSArgumentForActivateFSArgumentForIdleFSArgumentForMountFSArgumentForCloseFileFSArgumentForFlushFileFSArgumentForCloseDirectoryFSArgumentForResumeC fs_overlay.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\FSOverlaySource cRarc ~novt9 ~novt7 ndigest_key_ptr digest_key_lenQFSOverlaySourceiR\FSArchive Tname Tnext Tlist queue flag command Uresult Uuserdata $a_vtbl (k__anon (lreserved2 (l__anon (base ,fat 0fat_size 4fnt 8fnt_size <fat_bak @fnt_bak DUload_mem H nread_func L/nwrite_func PTnreserved3 Tenproc Xproc_flagiRFSArchive Tptr pack2iRTHFSFile Tnext Uuserdata Tarc stat Uargument Uerror Xqueue .X__anon ^Xreserved1 oXprop 0Z__anon 03Zreserved2 0DZargTFSFileFSResultFS_RESULT_SUCCESSFS_RESULT_FAILUREFS_RESULT_BUSYFS_RESULT_CANCELEDFS_RESULT_CANCELLEDFS_RESULT_UNSUPPORTEDFS_RESULT_ERRORFS_RESULT_INVALID_PARAMETERFS_RESULT_NO_MORE_RESOURCEFS_RESULT_ALREADY_DONEFS_RESULT_PERMISSION_DENIED FS_RESULT_MEDIA_FATAL FS_RESULT_NO_ENTRY FS_RESULT_MEDIA_NOTHING FS_RESULT_MEDIA_UNKNOWN FS_RESULT_BAD_FORMATFS_RESULT_MAXFS_RESULT_PROC_ASYNCFS_RESULT_PROC_DEFAULTFS_RESULT_PROC_UNKNOWN ^Xreserved1 oXpropFSROMFATProperty Xfile BYdiroXFSROMFATPropertyFSROMFATFileProperty own_id top bottom posXFSROMFATFilePropertyFSROMFATDirProperty Ypos parentBYFSROMFATDirProperty FSDirPos Tarc own_id index posYFSDirPos 3Zreserved2 DZargFSROMFATCommandInfo [readfile [writefile \seekdir P\readdir ]findpath ^getpath ^openfilefast _openfiledirect K_closefileDZFSROMFATCommandInfo  Udst len_org lenH[FSReadFileInfo  Usrc len_org len[FSWriteFileInfo  Ypos[FSSeekDirInfo d\p_entry ^skip_string\FSReadDirInfo\ ]__anon 1]file_id Ydir_id is_directory name_len v]namej\FSDirEntry  1]file_id Ydir_idFSFileID Tarc file_id1]FSFileID2 Ypos ]path ^find_directory ]result]FSFindPathInfo2 &^file ,^dir1]Y  ^buf buf_len total_len dir_id2^FSGetPathInfo 1]id^FSOpenFileFastInfo  top bottom index^FSOpenFileDirectInfo reserved._FSCloseFileInfog_FSArchiveInterface cReadFile :cWriteFile _cSeekDirectory cReadDirectory teFindPath eGetPath eOpenFileFast eOpenFileDirect fCloseFile $3fActivate (FfIdle ,YfSuspend 0lfResume 4fOpenFile 8fSeekFile <!gGetFileLength @@gGetFilePosition D_gMount HrgUnmount LgGetArchiveCaps PgCreateFile TgDeleteFile XgRenameFile \ hGetPathInfo `hSetPathInfo diCreateDirectory h-iDeleteDirectory lLiRenameDirectory pwiGetArchiveResource tUunused_29 xjFlushFile | kSetFileLength (kOpenDirectory SkCloseDirectory lkSetSeekCache kreservedg_FSArchiveInterfacecUTTU4c@cUTTU4cecUTTcUTTccpFSDirectoryEntryInfo dshortname shortname_length dlongname longname_length attributes datime 8dmtime Pdctime hfilesize lidcFSDirectoryEntryInfo22FSDateTime year month day hour minute seconddFSDateTimezeUT]4c^eUTT^]4ceUTTeUTT4c fUTT9fTLfT_fTrfTfUTT]fUTTff^FSSeekFileModeFS_SEEK_SETFS_SEEK_CURFS_SEEK_END'gUTT4cFgUTT4cegTxgTgUT4cgUT]gUT]gUT]]hUT]2h8hTFSPathInfo attributes dctime dmtime 4datime Lfilesize Pid8hFSFileInfo8hFSPathInfohUT]2hiUT]3iUT]RiUT]]}iUTii0FSArchiveResource ZtotalSize ZavailableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClustersiFSArchiveResourcejUTTkUTT.kUTT]YkUTTrkUTTUts4 lreserved2 l__anon base fat fat_size fnt fnt_size fat_bak fnt_bak Uload_mem nread_func $/nwrite_func (Tnreserved3 ,enproc 0proc_flag434 base fat fat_size fnt fnt_size fat_bak fnt_bak Uload_mem nread_func $/nwrite_func (Tnreserved3 ,enproc 0proc_flagnUTU5nUTUknUTCARDRomRegion offset length~nCARDRomRegion,FSOverlayInfo tpaddingrCARDEventListener ЁCARDAccessLevelCARDiOwner(es^@no_name@t*tCARDiCommon Kucmd flag priority lock_owner ^lock_ref zlock_queue zlock_target {thread l{task ;|task_q ^command |padding*tCARDiCommonQu`CARDiCommandArg uresult vtype id src dst len xspecQuCARDiCommandArgCARDResultCARD_RESULT_SUCCESSCARD_RESULT_FAILURECARD_RESULT_INVALID_PARAMCARD_RESULT_UNSUPPORTEDCARD_RESULT_TIMEOUTCARD_RESULT_ERRORCARD_RESULT_NO_RESPONSECARD_RESULT_CANCELEDCARDBackupTypeCARD_BACKUP_TYPE_EEPROM_4KBITS CARD_BACKUP_TYPE_EEPROM_64KBITS CARD_BACKUP_TYPE_EEPROM_512KBITSCARD_BACKUP_TYPE_EEPROM_1MBITSCARD_BACKUP_TYPE_FLASH_2MBITSCARD_BACKUP_TYPE_FLASH_4MBITSCARD_BACKUP_TYPE_FLASH_8MBITSCARD_BACKUP_TYPE_FLASH_16MBITSCARD_BACKUP_TYPE_FLASH_64MBITSCARD_BACKUP_TYPE_FRAM_256KBITSCARD_BACKUP_TYPE_NOT_USEH total_size sect_size subsect_size page_size addr_width program_page write_page write_page_total erase_chip $erase_chip_total (erase_sector ,erase_sector_total 0erase_subsector 4erase_subsector_total 8erase_page <initial_status =zpadding1 @caps Dzpadding2@enumCARD_TARGET_NONECARD_TARGET_ROMCARD_TARGET_BACKUPCARD_TARGET_RW J{context [{stackS}{CARDTask |next priority  |userdata |function 5|callback}{CARDTask}{|@no_name@/|}{|L|CARDTaskQueue |list |workers quit dummyL|CARDTaskQueue}{`CARDRomHeader game_name game_code maker_code product_id device_type device_size .reserved_A game_version property smain_rom_offset $smain_entry_address (smain_ram_address ,main_size 0ssub_rom_offset 4ssub_entry_address 8ssub_ram_address <sub_size @~nfnt H~nfat P~nmain_ovt X~nsub_ovt `?rom_param_A hbanner_offset lsecure_crc nProm_param_B psmain_autoload_done tssub_autoload_done xarom_param_C rom_size header_size main_module_param_offset sub_module_param_offset normal_area_rom_offset twl_ltd_area_rom_offset rreserved_B logo_data \logo_crc ^header_crc|CARDRomHeaderNTR|CARDRomHeader 2  ,+xCARDRomHeaderTWL |ntr `„debugger_reserved ӄconfig1 access_control reserved_0x1B8 main_ltd_rom_offset %reserved_0x1C4 smain_ltd_ram_address main_ltd_size sub_ltd_rom_offset 6reserved_0x1D4 ssub_ltd_ram_address sub_ltd_size ~ndigest_area_ntr ~ndigest_area_ltd ~ndigest_tabel1 ~ndigest_tabel2 digest_table1_size digest_table2_sectors Gconfig2 Xmain_static_digest isub_static_digest (zdigest_tabel2_digest <banner_digest Pmain_ltd_static_digest dsub_ltd_static_digestCARDRomHeaderTWL 43 game_card_on game_card_nitro_mode photo_access_read photo_access_write sdmc_access_read sdmc_access_write backup_access_read backup_access_write ||<]CARD_Init>$tPp|ȇ|]CARD_SetThreadPriorityaUpriorTretPbak_psrȇ|Ї| |]CARD_GetRomHeaderЇ|؇|']CARD_GetOwnRomHeaderTWLE؇| | card_common.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\*t}cardi_common*t*t؇||]CARDi_InitResourceLockˈ}Pp| |]CARDi_InitCommandPp/card_hook.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\ CARDHookContext next userdata callbackCARDHookContext" |(|K*card_task.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\L|@no_name@}{}{ފފL|}{%}{}{L|}{}{L| ||%]CARDi_InitTaskQueue%؊Pqueue |6|J]CARDi_InitTask,JPtaskJPpriorityJPuserdataKPfunctionK callback8||a]CARDi_ProcessTaskaTqueueaUtaska^Pblockinga^VchangePriorityxWpriogPppfVbak_cpsr||+]CARDi_ReceiveTasks1Uqueue^VblockingWbak_cpsr7Tretval|(|]CARDi_TaskWorkerProcedure=TargCPtaskIPqueueOcard_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\CARDDmaInterface ԎRecv StopCARDDmaInterfaceڎchannelsrc dstlenchannel (|D|Hcard_spi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\pl|argm|argn|buf1^|need_command^}status_checked@}cardi_param rest_comm src dst ^cmpCARDiParam@no_name@QuQuQuQuQuQu(||]CARDi_CommandEndUforce_waitTtimeout^Trest|̉|]CARDi_CommandReadStatus<dst̉||^]CARDi_WaitPrevCommandl||3]CARDi_CommArray 3Psrc3Qdst3Ulen3funcE dummy_read5#Wp||]CARDi_WaitBusyforIRCNPtick| |i]CARDi_CommReadCorei)Pp |L|z]CARDi_CommWriteCoreޓz/Pp|tmpL||]CARDi_CommVerifyCore5Pp||]CARDi_WriteEnableJ||]CARDi_SendSpiAddressingCommand֔PaddrPmodeaddr_cmdTwidth|L|]CARDi_InitStatusRegisterTstatL||]CARDi_ReadBackupCoreUsrc;VdstTlen||]CARDi_ProgramBackupCore&WdstAsrcUlen(Tsize$page"GVcmd||H]CARDi_WriteBackupCoreǖHWdstHMsrcHUlenRTsizeNpageLSVcmd||r]CARDi_VerifyBackupCore/rVdstrYWsrcrUlen|L|]CARDi_EraseBackupSectorCoreVdstUlenWsector_TcmdL||]CARDi_EraseBackupSubSectorCore6VdstUlenWsectoreTcmd||]CARDi_EraseChipCorewkTcmd|D|]CARDi_SetWriteProtectCoreVstatqarg^Uretry_countTcmdD|T|Pjcard_rom.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\K}cardi_rom_baseN}CARDiReadRomFunction^userdata%buffer+offsetlengthD||l]CARDi_SetRomOplPcommandlPoffsetoQcmd2nVcmd1||^]CARDi_IsNormalMode1Poh|@|]CARDi_ReadRomIDCore1Top@|H|]CARDi_ReadRomIDnPretH|T|5]CARDi_InitRom T|\|card_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\^ |isFirst }CARDi_ARM7Mutex*t*tT|||.]CARDi_LockMutexForARM7|||R]CARDi_DoTaskFromARM9]UidTpTp|‘|]CARDi_DoneTaskFromARM9/đ|\|]CARDi_OnFifoRecvAPtagPdata^Perr^UrequestedvTp\||Χcard_sp_pullOut.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\%4}CARDiSlotResetCount&^8}detectPullOut^<}skipCheck|nextCount ^@}isCardPullOut^|isFirstCheck^D}isInitializedPH}alarm,\||6]CARD_InitPulledOutCallback|,|T]CARDi_TryTerminateARM7`PlockID]Wcpsr<|\|]CARDi_CallbackForPulledOut9Pdata\||^]CARD_IsPulledOutd||^]CARD_CompareCardIDPcardIDiplCardIDVlastInterruptsTlockID^Pretval||^]CARD_IsCardIreqLoI^Pretval||]CARD_CheckPullOut_Polling}(||%i2c_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\I^d|slowRateG^h|isInitialized/p|I2CiDeviceAddrTableFl|mutex:Ϣp|I2CiSlowRateTable@enumI2C_SLAVE_CAMERA_MICRON_INI2C_SLAVE_CAMERA_MICRON_OUTI2C_SLAVE_CAMERA_SHARP_INI2C_SLAVE_CAMERA_SHARP_OUTI2C_SLAVE_MICRO_CONTROLLERI2C_SLAVE_DEBUG_LEDI2C_SLAVE_DEBUGGERI2C_SLAVE_NUM@enumI2C_WRITEI2C_READ||]I2C_Init(|| ]I2C_LockK||.]I2C_Unlockp|L|^]I2Ci_WriteRegisterVidWregUdata^TrL||^]I2Ci_SendStartPid||^]I2Ci_GetResultH||^]I2Ci_SendMiddleTdata||t]I2Ci_WaitEx|$|z]I2Ci_StopExz٣Prw$|t|]I2Ci_ReadRegisterDUidVreg^Trt||^]I2Ci_ReceiveStartTid||]I2Ci_GetDataL||rcdc_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\:t}isSARADCOnBk>u}sMicBiasBk;v}isDACOnBk=w}isUnmuteSpBk9x}isAudioADCOnBk<y}isUnmuteHpBk{ x|mute_wait_append_time_max?X|}sCdcSysClockBk` ||mute_wait_append_time_max^|Hpf10HzSamplingrate32k_|Hpf10HzSamplingrate48kVm|sIirFilterAddressHalf`Ѫ|DefaultIirParamBS|sIirFilterAddress@d}sIirFilterBackup_CDCSysClockParameterCDC_SYS_CLOCK_PARAMETER_FOR_SAMPLING_RATE_32730CDC_SYS_CLOCK_PARAMETER_FOR_SAMPLING_RATE_47610CDC_SYS_CLOCK_PARAMETER_OFF_CDCIirFilterParamHalf n0 n1 d1CDCIirFilterParamHalf~_IirFilterAddress page reg~IirFilterAddress _CDCIirFilterParam n0 n1 n2 d1 d2ѪCDCIirFilterParam~dѪ _CDCIirFilterTargetCDC_IIR_FILTER_ADC_1CDC_IIR_FILTER_ADC_2CDC_IIR_FILTER_ADC_3CDC_IIR_FILTER_ADC_4CDC_IIR_FILTER_ADC_5CDC_IIR_FILTER_DAC_LEFT_1CDC_IIR_FILTER_DAC_LEFT_2CDC_IIR_FILTER_DAC_LEFT_3CDC_IIR_FILTER_DAC_LEFT_4CDC_IIR_FILTER_DAC_LEFT_5 CDC_IIR_FILTER_DAC_RIGHT_1 CDC_IIR_FILTER_DAC_RIGHT_2 CDC_IIR_FILTER_DAC_RIGHT_3 CDC_IIR_FILTER_DAC_RIGHT_4 CDC_IIR_FILTER_DAC_RIGHT_5CDC_IIR_FILTER_DAC_BOTH_1CDC_IIR_FILTER_DAC_BOTH_2CDC_IIR_FILTER_DAC_BOTH_3CDC_IIR_FILTER_DAC_BOTH_4CDC_IIR_FILTER_DAC_BOTH_5ѪѪ_CDCIirFilterTargetHalfCDC_IIR_FILTER_ADC_HALFCDC_IIR_FILTER_DAC_HALF_LEFTCDC_IIR_FILTER_DAC_HALF_RIGHTCDC_IIR_FILTER_DAC_HALF_BOTH||]CDC_InitLibۮ|֔|]CDCi_IsDACOnؔ|Е|I]CDC_SetSystemClockDJXPparamЕ||X]CDC_GetSystemClockPNDAC|@|]CDC_PowerUpDAC@||]CDC_PowerUpDAC_WaitWithSpin||e]CDC_SetMicBias"e^Pis_on|̖|z^]CDC_GetMicBias`|^Pvalue̖||]CDC_PowerUpAudioADC|(|]CDC_PowerDownAudioADC(|8|]CDC_UnmuteAudioADC8|H|]CDC_MuteAudioADCH|X|]CDC_SetPGABWPtarget_gainX|p|]CDC_GetPGAB Ptempp|ؘ|q]CDC_Stopq^UflagDACq^TflagAudioADCq^WflagSarADCؘ||]CDC_Restartp^UflagDAC^VflagAudioADC^PflagSarADC|l|]CDC_BeginSleepl|ܜ|B]CDC_EndSleepܜ||]CDC_StartShutterSound|P|]CDCi_StartForceOutSoundD^TFlagIirInitializedP|X|!]CDC_EndShutterSoundrX|t|>]CDCi_EndForceOutSoundij@^TFlagIirInitializedt||]CDC_EnableInternalDischargePathPtemp|<|]CDC_SwitchOutputDeviceYTdevice<|ԡ|p]CDC_SetIirFilterpuUtargetpTpParams^VflagAudioADCr^WflagDACԡ||]CDC_SetIirFilterCoreOuUtargetPpParamѪparam|| ]CDC_SetIirFilterHalfCoreµ Ttarget PpParam param|8|] ]CDC_WaitPowerDownDACd reg_ Ui8|f|x ]CDC_WaitPowerDownADCh regz Uih|| ]CDCi_InitializeIirFilterBuffer Pi|| ^]CDCi_IsIirFilterInitialized Ri]|t|2 cdc_twlmode_access.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\6}cdcCurrentPage5}cdcMutex| |O]CDC_InitMutex |2|]CDC_SetSpiParamsVregUsetBitsTmaskBitsPtmp4|P|]CDC_SetSpiParamsExPpageUregTsetBitsVmaskBitsP||]CDC_WriteSpiRegisternUregTdata||]SPI_SendWaitPdata||]CDC_WriteSpiRegisterExPpageUregTdata||]CDC_ReadSpiRegistergUregPdata|$|]SPI_DummyWaitReceive$|8|]CDC_ReadSpiRegisterExPpageTregPvalue8||]CDC_WriteSpiRegistersyUregܷTbufpVsize^Pi||4]CDC_WriteSpiRegistersEx5Ppage5Ureg5Tbufp5Vsize| |D]CDC_ReadSpiRegistersoETregEUbufpEVsizeG^Ti |<|e]CDC_ReadSpiRegistersExfPpagefUregfTbufpfVsize<|H|x]CDC_InitCurrentPageH|t|]CDC_ChangePageZTpage_not|L|H+ sndex_request.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\:}sndexTempDSPMixRate>}sndexIirTargetE}sndexVolD^}sndexSetAlarm2^}sndexReqInitialized;^ }sndexIsPlayShutter6п}sndexReqMsgQArray7^}sndexLock@}sndexSpiLockId?Ѫ}sndexIirParam5oF(}sndexReqMsgQCH}sndexVolAlarm3St}sndexReqThread4}sndexReqThreadStackSNDEXSamplingRateSNDEX_SAMPLING_RATE_32730SNDEX_SAMPLING_RATE_47610t| |X]SNDEX_InitYUpriority[Te |H|]SNDEX_GetSamplingRateH|ԧ|]SDNEXi_InitializeSMIXUtempԧ|,|]PxiCallbackdUdata^Perr,|h|A]ReplyResultBPcommandBPresultBPparamDUdatah|P|j]RequestThreadPheadphonePsmixIWdevice Wparam_volRsmixWi2s freq$eRmuteWvolumeqPparampTcommandoQreqP|z|H]MCU_ReadRegister_HTregJPitrm||||^]MCU_SetVolume|Uvolume||]MCUVolumeSwtichCallback|L|]SetVolumeHandlerxL|@|N tpex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\2S>L||]TPEX_Initialize"TlockId|@|F]TPEX_ExecuteProcessvGUentryGTwork]densityMPeI?temp2@| |n tpex_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\@enumTP_CONVERSION_CONTROL_HOSTTP_CONVERSION_CONTROL_SELF@enumTP_CONVERSION_MODE_NONETP_CONVERSION_MODE_XYTP_CONVERSION_MODE_XYZTP_CONVERSION_MODE_X TP_CONVERSION_MODE_YTP_CONVERSION_MODE_ZTP_CONVERSION_MODE_AUX3TP_CONVERSION_MODE_AUX2TP_CONVERSION_MODE_AUX1 TP_CONVERSION_MODE_AUTO_AUX$TP_CONVERSION_MODE_AUX123,TP_CONVERSION_MODE_XP_XM4TP_CONVERSION_MODE_YP_YM8TP_CONVERSION_MODE_YP_XM<@enumTP_CONVERSION_PIN_INTERRUPTTP_CONVERSION_PIN_DATA_AVAILABLETP_CONVERSION_PIN_INTERRUPT_DATA_AVAILABLETP_CONVERSION_PIN_NEW_BUFFER_MODE@enumTP_INTERVAL_NONETP_AUX_INTERVAL_1_12MTP_AUX_INTERVAL_3_36M TP_AUX_INTERVAL_5_59M TP_AUX_INTERVAL_7_83M TP_AUX_INTERVAL_10_01M TP_AUX_INTERVAL_12_30M TP_AUX_INTERVAL_14_54MTP_AUX_INTERVAL_16_78MTP_INTERVAL_8MSTP_INTERVAL_1MSTP_INTERVAL_2MSTP_INTERVAL_3MSTP_INTERVAL_4MSTP_INTERVAL_5MSTP_INTERVAL_6MSTP_INTERVAL_7MS@enumTP_NEW_BUFFER_CONVERSION_MODE_CONTINUOUSTP_NEW_BUFFER_CONVERSION_MODE_SINGLESHOT@@enumTP_RESOLUTION_12TP_RESOLUTION_8TP_RESOLUTION_10_TpStabilizationTimeTP_STABILIZATION_TIME_0_25USTP_STABILIZATION_TIME_1USTP_STABILIZATION_TIME_3USTP_STABILIZATION_TIME_10USTP_STABILIZATION_TIME_30USTP_STABILIZATION_TIME_100USTP_STABILIZATION_TIME_300USTP_STABILIZATION_TIME_1MS_TpPrechargeTimeTP_PRECHARGE_TIME_0_25USTP_PRECHARGE_TIME_1USTP_PRECHARGE_TIME_3USTP_PRECHARGE_TIME_10USTP_PRECHARGE_TIME_30USTP_PRECHARGE_TIME_100USTP_PRECHARGE_TIME_300USTP_PRECHARGE_TIME_1MS_TpSenseTimeTP_SENSE_TIME_1USTP_SENSE_TIME_2USTP_SENSE_TIME_3USTP_SENSE_TIME_10USTP_SENSE_TIME_30USTP_SENSE_TIME_100USTP_SENSE_TIME_300USTP_SENSE_TIME_1MS@enumTP_DEBOUNCE_0USTP_DEBOUNCE_8USTP_DEBOUNCE_16USTP_DEBOUNCE_32USTP_DEBOUNCE_64USTP_DEBOUNCE_128USTP_DEBOUNCE_256USTP_DEBOUNCE_512US?   @|\|%]TPEX_SetConversionMode&Tcontrol&jSmode&Ppin\|p|@]TPEX_SetIntervalARintervalp||Z]TPEX_SetTouchPanelDataDepthM[Pdepth]Ptmp||r]TPEX_EnableNewBufferMode||]TPEX_DisableNewBufferMode|̯|]TPEX_SetNewBufferModeRmode̯||]TPEX_SetResolution8Rres||]TPEX_SetStabilizationTime;Rtime||]TPEX_SetPrechargeTime`Rtime|,|]TPEX_SetSenseTimeaRtime,|D|]TPEX_SetDebounceTimeG;RtimeD| |^]TPEX_ReadBufferUdatarangedensity}^Vsame_count|^TySum{^QxSumz^Wjz^PilPyRangekPxRangefQmaxRange) yBuf((xBuf'/2buf&^Pj&^Qi || micex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\WG2WGWG |,|)]MICEX_AnalyzeCommand-MTw,Ucommand,|L|^]MICEXi_IsCodecAutoSamplingL||]MICEX_ExecuteProcessMSTentryPtemp||]MicexIntrHandler0Pdata8"Pdata16YUwTiWtemp|d|G^]MicexUpdateStatusOnBufferFullJ_Pwd||^]MicexConvSamplingSpanUspaneTdestPrate|Ⱥ|) micex_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\~j}micexIntrInfoF|micexIntrPrioMICEXIntrInfo handler sp delayIF delayIF2jMICEXIntrInfo-MICEXIntrPrio ieBit ie2Bit ieTableIndex ie2TableIndexMICEXIntrPrio|T|]MICEX_EnableMultipleInterruptUhandlerTeT||]MICEX_DisableMultipleInterrupt"Te|ܷ|]MICEX_GetDelayIFMܷ|Ⱥ|]MICEX_IrqHandlerx||x mcu_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\-|MCUiPwswStatus/^|MCUiEnableHeartBeat$^|MCUiIsInitialized'|MCUiMessage+|MCUiIrqTable&oF|MCUiMessageQ(S|MCUiThread)|MCUiStackMCUPwswStatusMCU_PWSW_UNKNOWNMCU_PWSW_IN_PROGRESSMCU_PWSW_RESETMCU_PWSW_POWER_OFFMCU_PWSW_MAX Z?|x|D]MCU_InitIrqUDTpriorityIPbitsHPenabledx||o]MCU_SetIrqFunctionoPintrBitoPfunctionq^Ui||]MCU_CallIrqFunctionUintrBit^Ti||]MCU_CheckIrq^UcallHandlerTintrBitVenabled|$|]MCU_GetPwswStatusPblock$|P|]MCUi_UpdatePwswStatusPbitsP|t|]MCUi_Handler/t||]MCUi_GetIrqReason[|t| ]MCUi_Thread,UintrBit&msg"Tcountt||b]MCUi_HeartBeatHandler||r]MCU_DisableHeartBeat|| mcu_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\|verInfo||/]MCU_GetVerInfo=sdio_bus.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\SD_FUNCTION_FLAGSSLOT_VOLTAGE_MASKSDHCD_RESPONSE_CHECK_MODEFUNC_ENABLE_DISABLE_FLAGSUCHARSDCONFIG_WP_VALUEHCD_EVENTUINT8SDIO_IRQ_MODE_FLAGSCT_VERSION_CODEA_UCHARSD_DEVICE_FLAGSA_UINT8_BDCONTEXT RequestList SignalList RequestListCritSection (HcdList 0]HcdListSem PDeviceList X]DeviceListSem xFunctionList ]FunctionListSem ^RequestListSize ^SignalSemListSize ^CurrentRequestAllocations ^CurrentSignalAllocations ^MaxRequestAllocations ^MaxSignalAllocations ^RequestRetries ^CardReadyPollingRetry ^PowerSettleDelay ^CMD13PollingMultiplier DefaultOperClock DefaultBusMode DefaultOperBlockLen DefaultOperBlockCount CDPollingInterval InitMask ^CDTimerQueued CardDetectHelper jpCardDetectMsgQueue HcdInUseField ConfigFlags ^MaxHcdRecursionBDCONTEXT_SDLIST pPrev pNextSDLIST_OS_CRITICALSECTION MutexIDOS_CRITICALSECTIONSD_BUSCLOCK_RATEA_UINT32ATOMIC_FLAGSULONGUINT32FUNC_ENABLE_TIMEOUTSDREQUEST_FLAGSDMA_ADDRESSA_VOIDZA_UINT64^A_INT^SYSTEM_STATUS^SDPOWER_STATE^THREAD_RETURN^A_BOOL^SDIO_STATUS^INTINT32A_INT32 _OS_SEMAPHORE oFmsgQueueID]OS_SEMAPHORESD_BUSMODE_FLAGSSDCONFIG_COMMANDA_UINT16UINT16USHORTCARD_INFO_FLAGSSD_SLOT_CURRENT_OSKERNEL_HELPER STaskID tskStack stackSize taskPri ^ShutDown WakeSignal ApContext GpHelperFunc OSKERNEL_HELPER _OS_SIGNAL oFmsgQueueIDOS_SIGNALM^@no_name@d p,_SDMESSAGE_QUEUE MessageList MessageCritSection FreeMessageList (^MaxMessageLengthpSDMESSAGE_QUEUEUINTA_UINT_SDHCD Version SDList pName Attributes MaxBytesPerBlock MaxBlocksPerTrans MaxSlotCurrent SlotNumber MaxClockRate SlotVoltageCaps !SlotVoltagePreferred $pContext (pRequest ,pConfigure 0]ConfigureOpsSem PHcdCritSection hRequestQueue tpCurrentRequest xCardProperties SDIOIrqHelper pPseudoDev PendingHelperIrqs PendingIrqAcks IrqsEnabled IrqProcState pDevice SlotCurrentAllocated HcdFlags CompletedRequestQueue )pDmaDescription pModule ^Recursion Reserved1 Reserved2*SDHCD22TEXT2INT82A_CHAR^pHcd* ^pHcd-pConfig3*9 _SDCONFIG Cmd pData ^DataLength9SDCONFIG _SDREQUESTQUEUE Queue ^BusySDREQUESTQUEUEX_SDREQUEST SDList Argument Flags InternalFlags Command Response &BlockCount (BlockLen *DescriptorCount ,pDataBuffer 0DataRemaining 4pHcdContext 8pCompletion <(pCompleteContext @^Status D.pFunction H^RetryCount LpBdRsv1 PpBdRsv2 TpBdRsv3SDREQUEST @no_name@"4d_SDFUNCTION Version SDList pName MaxDevices NumDevices pIds pProbe pRemove $5pSuspend (dpResume ,pWake 0pContext 4Driver 8DeviceList @CleanupReqSig `Flags4SDFUNCTION2 _SD_PNP_INFO SDIO_ManufacturerCode SDIO_ManufacturerID SDIO_FunctionNo SDIO_FunctionClass SDMMC_ManfacturerID SDMMC_OEMApplicationID CardFlagsSD_PNP_INFO^pFunctionpDevice4X_SDDEVICE SDList FuncListLink pRequest pConfigure AllocRequest ?FreeRequest npIrqFunction $pIrqAsyncFunction (IrqContext ,IrqAsyncContext 0pFunction 4pHcd 8DeviceInfo DpId PDevice TSlotCurrentAlloc VFlags WVersionSDDEVICE^pDevreq^pDevconfig9!3pDev9EpDevbpReqhtpContextpContext4* _SDDEVICE_INFO %AsSDIOInfo AsSDMMCInfoSDDEVICE_INFO _SDIO_DEVICE_INFO FunctionCISPtr FunctionCSAPtr FunctionMaxBlockSize%SDIO_DEVICE_INFO_SDMMC_INFO UnusedSDMMC_INFO pFunction)pDevice/4;^pFunction^state^4j^pFunction4^pFunctionstate^enable^40_CARD_PROPERTIES IOFnCount SDIORevision SD_MMC_Revision SDIO_ManufacturerCode SDIO_ManufacturerID CommonCISPtr RCA SDIOCaps CardCSD Flags $OperBusClock (BusMode *OperBlockLenLimit ,OperBlockCountLimit .CardState /CardVoltageCARD_PROPERTIES_SDHCD_IRQ_PROC_STATESDHCD_IDLESDHCD_IRQ_PENDINGSDHCD_IRQ_HELPER#/_SDDMA_DESCRIPTION Flags MaxDescriptors MaxBytesPerDescriptor Mask Alignment/SDDMA_DESCRIPTION(_SIGNAL_ITEM SDList SignalSIGNAL_ITEMsdio_bus_events.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_SDIO_INT_CTRL_DATA ^SlotIRQEnable IRQDetectModeSDCONFIG_SDIO_INT_CTRL_DATA_HCD_EVENT_MESSAGE Event pHcdHCD_EVENT_MESSAGE*ysdio_bus_misc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_POWER_CTRL_DATA ^SlotPowerEnable SlotPowerVoltageMaskSDCONFIG_POWER_CTRL_DATA _SDCONFIG_BUS_MODE_DATA ClockRate BusModeFlags ActualClockRate SDCONFIG_BUS_MODE_DATA_SDCONFIG_INIT_CLOCKS_DATA NumberOfClocksSDCONFIG_INIT_CLOCKS_DATA_SDCONFIG_FUNC_ENABLE_DISABLE_DATA EnableFlags TimeOut pOpComplete pOpCompleteContextSDCONFIG_FUNC_ENABLE_DISABLE_DATAContextstatus^_SDCONFIG_FUNC_SLOT_CURRENT_DATA SlotCurrentSDCONFIG_FUNC_SLOT_CURRENT_DATA?sdio_bus_os.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\twl\ id ^heap cardDetectTskPri irqTskPri dpcTskPri SDIO_INIT_SETTINGS@enumOS_ARENA_MAINOS_ARENA_MAIN_SUBPRIVOS_ARENA_MAINEXOS_ARENA_ITCMOS_ARENA_DTCMOS_ARENA_SHAREDOS_ARENA_WRAM_MAINOS_ARENA_WRAM_SUBOS_ARENA_WRAM_SUBPRIVOS_ARENA_MAX sdio_hcd.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\hcd\TWL_hcd\_SDHCD_DRIVER_CONTEXT *Hcd )Device ^CardInserted ^KeepClockOn ^SD4Bit  Dpc DpcFlags^SDHCD_DRIVER_CONTEXT_SDHCD_DEVICE cBlob)SDHCD_DEVICEBsdio_lib_c.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\sdio_lib\_SDMESSAGE_BLOCK SDList ^MessageLength MessageStart'SDMESSAGE_BLOCKȺ||x nvram_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\g(}nvramw NVRAMWork commandgNVRAMWork 2Ⱥ||1]NVRAM_Init3Si||G]NVRAM_AnalyzeCommandGSdataaVsize`Waddr_Pbuf^Pwu32]UcommandLRi|z|]NVRAM_ExecuteProcessTentryPe|||^]NvramCheckReadyToRead= tempStatus||^]NvramCheckReadyToWrite tempStatus||^]NvramIsAvailableMemAddr Paddr|d|. nvram_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\|4| ]NVRAM_WriteEnable 4|L|]SPI_SendWaitF PdataL|x|0]NVRAM_WriteDisables x||@]NVRAM_ReadStatusRegister @w Pbuf|`|o]NVRAM_ReadDataBytesF oPaddressoQsizeo} UbufrTiq adr`|x|]SPI_DummyWaitn x|(|]NVRAM_ReadDataBytesAtHigherSpeed PaddressQsize UbufTi adr(||]NVRAM_PageWrite PaddressQsize UbufTi adr||]NVRAM_PageProgramPaddressQsize UbufTi adr||`]NVRAM_PageErase]`Paddress|X|~]NVRAM_SectorErase~PaddressX||]NVRAM_DeepPowerDown||]NVRAM_ReleaseFromDeepPowerDown||]NVRAM_ChipErase1|8|]NVRAM_ReadSiliconIdr Pbuf8|d| ]NVRAM_SoftwareResetKd|P|*O control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\/H}rtcInitialized2L}rtcMutex0d}rtcWorkRTCWork oFmsgQ msgArray 0Sthread stack ^busy command padding Spolling pollingQ pollingStack pollingAlarmRTCWorkZZRTCPxiResultRTC_PXI_RESULT_SUCCESSRTC_PXI_RESULT_INVALID_COMMANDRTC_PXI_RESULT_ILLEGAL_STATUSRTC_PXI_RESULT_BUSYRTC_PXI_RESULT_FATAL_ERRORRTC_PXI_RESULT_MAXRTCRawStatus2 intr_mode  dummy0  intr2_mode  test dummy1RTCRawStatus2RTCRawStatus1 reset format dummy0  intr1  intr2  bld  poc dummy1RRTCRawStatus1d|<|W]RTC_InitWpriorityYPenabled<||^]RTCi_Lock||]RTCi_Unlock||^]RTC_IsAvailablePxiCommand)Pcommand||]RtcPxiCallbackPdata^PerrTcommand||L]RtcReturnResultLPcommandLPresult||`]RtcThreaddmsg||`]RtcAlarmIntrdTintr_numcstat2bRstat1|P|1]RtcBCD2HEX1Pbcd5Rw4Ui3QhexP||@o instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\RTCRawAlarm week dummy0 we hour afternoon he minute  me dummy2RTCRawAlarmRTCRawData t a words halfs bytesRTCRawData 8date  timeRTCRawDate year month dummy0 day  dummy1 week dummy28RTCRawDateRTCRawTime hour afternoon dummy0 minute dummy1 second  dummy2  RTCRawTime Rstatus1 status2 t__anon pulse alarm adjust xfree pulse alarm adjust xfreeRTCRawPulse pulse dummyRTCRawPulseRTCRawAdjust adjust dummyRTCRawAdjustRTCRawFree free dummyxRTCRawFree8  RRxxqRTCRawCounter __anon count dummy ,bytesqRTCRawCounter count dummyCRTCRawFout __anon fout dummy0 __anon fout2 fout1 dummy1CRTCRawFout fout dummy0 fout2 fout1 dummy1CG  year month dummy0 ye me day dummy1 de dummy2hRTCRawAlarmExG G G P||+]RTC_Reset -Rstat||A]RTC_SetHourFormat$!AUformatDalarmCRstat1||]RTC_ReadDateTimec!Tdata||]RTC_WriteDateTime!Tdata||]RTC_ReadDate!Tdate|"|]RTC_ReadTime" Ttime$|N|]RTC_WriteTimeU"TtimeP||^]RTC_ReadPulse"Upulsestat2||^]RTC_WritePulse"Upulsestat2|$|^]RTC_ReadAlarm1M##Ualarmstat2$|n|5^]RTC_WriteAlarm1#5)Ualarm7stat2p||Q^]RTC_ReadAlarm2#Q/UalarmSstat2||l^]RTC_WriteAlarm2H$l5Ualarmnstat2||]RTC_ReadStatus1$;Tstat|B|]RTC_WriteStatus1$ATstatD|b|]RTC_ReadStatus2%GTstatd||]RTC_WriteStatus2B%MTstat||]RTC_ReadAdjust%STadjust||]RTC_WriteAdjust%YTadjust||]RTC_ReadFree%_Tfree|&|]RTC_WriteFree8&eTfree||]RTC_ReadCountery&kTcounter|&|)]RTC_ReadFout&)=Tfout(|j|=]RTC_WriteFout&=\Tfoutl||Q]RTC_ReadAlarmEx12'QbTalarmex||c]RTC_WriteAlarmEx1u'c[ Talarmex||u]RTC_ReadAlarmEx2'ua Talarmex||]RTC_WriteAlarmEx2'g Talarmex(||]RtcChangeAlarmFormat24to12D(m Palarm||]RtcChangeAlarmFormat12to24(s Palarm||]RtcGpioTransfer)UinstWparamy TbufVsize||Ր gpio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\||&]RTCi_GpioStart)|H|Q]RTCi_GpioEnd)H||w]RTCi_GpioSendCommandV*xcommandxparameter|H|]RTCi_GpioSendData*)pDatasizeH||]RTCi_GpioReceiveData+)pDatasize߯ apistat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^PCFD+0ertfs_stat ^st_dev ^st_ino st_mode ^st_nlink ^st_rdev st_size -st_atime -st_mtime -st_ctime $st_blksize (st_blocks ,fattribute+ERTFS_STATdwordBLOCKTCLUSTERTYPEdatestr date time-DATESTRwordbytek-,pc_file N.pobj flag fptr fptr_cluster fptr_block ^needs_flush ^is_free ^at_eof F?fcluster_cachek-PC_FILET. drobj .pdrive /;finode >blkinfo ^isroot ^is_free @?pblkbuffT.DROBJ.tddrive ^mount_valid ^mount_abort ^drive_opencounter volume_serialno 4volume_label ^bytespcluster $byte_into_cl_mask (^fasize ,rootblock 0firstclblock 4^driveno 8maxfindex <fatblock @^secproot D^fat_is_dirty Hbootaddr L4oemname Vbytspsector Xsecpalloc \^log2_secpalloc `secreserved bnumfats dnumroot hnumsecs lmediadesc psecpfat tsecptrk vnumhead xnumhide |free_contig_base free_contig_pointer known_free_clusters infosec partition_base partition_size ^partition_type 4pathname_buffer  5filename_buffer ^begin_user_area register_file_address ^interrupt_number drive_flags ^partition_number ^pcmcia_slot_number ^pcmcia_controller_number pcmcia_cfg_opt_value ^controller_number ^logical_unit_number 5dev_table_drive_io o5dev_table_perform_device_ioctl access_semaphore 5device_name (5fatcontext h8pbuffcntxt l#;pfscntxt p);fad.DDRIVE    !5^driveno^sectorbufferi5countreadin^u5^driveno^opcode^arg5PO@fatbuffcntxt stat_primary_cache_hits stat_secondary_cache_hits stat_secondary_cache_loads stat_secondary_cache_swaps 7puncommitted_blocks 8pcommitted_blocks 8pfree_blocks 8pfat_buffers ^num_blocks $^num_free (^low_water ,^hash_size 0hash_mask 48mapped_blocks 88mapped_data <8fat_blk_hash_tbl5FATBUFFCNTXT7fatbuff ]8pnext c8pprev i8pnext2 ^fat_block_state fat_blockno o8fat_data7FATBUFF77777788780blkbuffcntxt stat_cache_hits stat_cache_misses  :ppopulated_blocks ;pfree_blocks ^num_blocks ^num_free ^scratch_alloc_count ^low_water ^num_alloc_failures $^hash_size (hash_mask ,;blk_hash_tbl8BLKBUFFCNTXT&:blkbuff :pnext :pprev :pnext2 ^block_state ^use_count :pdrive blockno ;data&:BLKBUFF&:&:&:.&:;&:5;dfinode G=fname X=fext fattribute i=__anon =resarea =optional_fields fclusterhi ftime fdate fcluster fsize alloced_size $^opencount (^openflags ,#>pfile_buffer 0^file_buffer_dirty 4)>my_drive 8my_block <^my_index @/>pnext D5>pprev H^is_free L;>s5;FINODE =resarea =optional_fields reserved crtime_ms crtime crdate acdate&:.5;5;segdesc ^nsegs ^segindex >segblock ncksum >fill;>SEGDESC  dirblk my_frstblock my_block ^my_index>DIRBLK&: fcluster_buf start_index buf_size ?bufF?FCLUSTER_CACHE+T.5;+L'^]FATFSi_rtfs_pc_fstat<@'^Tfd'+Upstat)e-PpfileLb^]FATFSi_rtfs_pc_stat@b?Tnameb?Upstatf^Uret_vale^Wdrivenod?Tpobj]FATFSi_pc_finode_stat'A?Ppi?Ppstatt $C rtlowl.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Tpcblk0 jump 0Doemname bytspsector secpalloc secreserved numfats numroot numsecs mediadesc secpfat secptrk numhead numhide numhide2 $numsecs2 (secpfat2 ,physdrv -xtbootsig 0volid 4ADvollabel @flags Bfs_version Drootbegin Hinfosec Jbackup Lfree_alloc Pnext_alloc   ..&:jDDptable Dents @signaturejDPTABLE@Dptable_entry boot s_head s_cyl p_typ e_head e_cyl r_sec p_sizeDPTABLE_ENTRYA&:.&:..........(^]FATFSi_pc_log_base_2,F(Pn*^Qlog@^]FATFSi_pc_i_dskopenF@^UdrivenoaAQp2aAPp1E^Vpartition_statusD^Pret_valCAbl0BRDTpdrP^]FATFSi_pc_read_partition_tableG^TdrivenoXDUpdr^Tret_valPi^DbufdDWppartP^]FATFSi_pc_gblk0HWdrivenoEUpbl0ETbEVbufޅ^]FATFSi_pc_clzeroHEVpdrivePclusterUcurrblTiEWpbuffE]FATFSi_pc_drno_to_drive_structI^TdrivenoEUpdrH$E]FATFSi_pc_drno2droI$^Pdriveno'EUpretval&EPpdrHM^]FATFSi_pc_dskfreeIM^UdrivenoOETpdr|]FATFSi_pc_sec2cluster J|EPpdrive|PblocknoΆ]FATFSi_pc_sec2indexJERpdrivePblocknoPanswer܆]FATFSi_pc_cl2sectorKEPpdrivePclusterPtPblockno$]FATFSi_pc_chain_lengthKEPpdrivePbyte_lengthPchain_lengthPltempm$Ж apickdsk.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\LFATFSi_glPFATFSi_crossed_file_core$chk_global ^be_verbose ^fix_problems ^write_chains sOdrive_structure n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters $n_file_clusters (n_hidden_clusters ,n_dir_clusters 0Ocrossed_file_freelist 4Ocrossed_points n_crossed_points ^Plost_chain_list n_lost_chains n_lost_clusters oPbm_used "Pgl_file_name "Pgl_file_path $^recursion_depth $n_bad_lfns $cl_start $cl_end $^on_first_passLCHK_GLOBAL.CLTYPEOcrossed_file Ofile_name OpnextOCROSSED_FILE  OP1crossing_point cluster XPplistPCROSSING_POINTO1    gO1P0chkdisk_stats n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters n_file_clusters n_hidden_clusters n_dir_clusters n_crossed_points $n_lost_chains (n_lost_clusters ,n_bad_lfnsPCHKDISK_STATSLLO  k-  T.T.T....  T.T.T.O$<^]FATFSi_rtfs_pc_check_diskTPVdrive_idPUpstat^Wverbose^fix_problems^(write_chains^ret_val=Rstr_slash^Pi^Pdrive_numberLLu]FATFSi_print_chkdsk_statisticssTuNRTpglwUltempL̋]FATFSi_print_chkdsk_crossed_filesTTRWpgl^Un_printedZRVpcross^Ti̋H^]FATFSi_allocate_chkdsk_coreFUUiH|^]FATFSi_write_lost_chainsUUicurrent_chk_file|P'^]FATFSi_build_chk_fileV'Wbad_chain_no'Ucurrent_file_no'`Rret_file_no/fRcs_filename.wR"filename,RPpfile+^fd*Ptemp)Tremainder\^]FATFSi_scan_all_files@WRUdir_nameRldir_nameRVentryRPdirectory$^]FATFSi_process_used_mapIXRUpobjRfilename$^found_an_intersection#^is_hidden"^Wis_dir!Pt1 Ptrue_sizeVn_clustersTcluster48^]FATFSi_check_lost_clustersXRUpdrnxtTclusterH^]FATFSi_add_cluster_to_lost_listfYRWpdrQcluster^Ufound^RiTfirst_cluster_in_chaint"]FATFSi_count_lost_clustersY"RUpdr%Qcluster$^Tit4G^]FATFSi_scan_crossed_fileseZGRUdir_nameKRldir_nameJRVentryIRTdirectory4^]FATFSi_process_crossed_file[RVpobjRfilenameRUpcross^WiTclusterl^]FATFSi_add_cluster_to_crosseda[Pcluster^Sil]FATFSi_chain_size[PclusterUn_clustersЖ5]FATFSi_get_bit\5SPbitmap5PindexVЖpF apiwrite.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.k-.k-k-.k-.Ж*^]FATFSi_rtfs_po_write]_*^Tfd*\in_buff*^Wcount-,crdate=^p_errno<^ret_val;^extending_file:^0end_of_chain9Pblock_to_write8 alloced_size7^Pn_left6^Pn_written5^Tn_bytes44ltemp3Pn_clusters28next_cluster1Tn_w_to_write1$n_to_write0Pn_blocks_left/Pbyte_offset_in_block.Pblock_in_cluster-\Vpdrive,\Upfile^]FATFSi_rtfs_po_truncate`^Tfd,offsetrange_checkPnew_chain_lenold_chain_lenclusters_to_release^Wp_errnoQclno last_cluster_in_chainfirst_cluster_to_release^Vret_val\Updrive\Tpfile d^]FATFSi__po_flushaad\Upfilej^Tret_valh\Ppdrg^Udriveno^]FATFSi_rtfs_po_flusha^Ufd^Udriveno^Tret_val\Ppfilep^]FATFSi_rtfs_pc_diskflushjb\Tpath"^Uret_val!\Tpdrive ^VdrivenoJpܡ< apicnfig.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\wk,FATFSi_prtfs_cfg;q|FATFSi___fat_primary_cache_5Rq|FATFSi___fat_primary_index_4cq|FATFSi___fat_primary_cache_1zq|FATFSi___fat_primary_cache_6q|FATFSi___fat_primary_cache_9q|FATFSi___fat_primary_cache_7q|FATFSi___fat_primary_index_1q|FATFSi___fat_primary_cache_4q|FATFSi___fat_primary_index_9q|FATFSi___fat_primary_cache_8r|FATFSi___fat_hash_table_6&r|FATFSi___fat_primary_index_87r|FATFSi___fat_primary_index_0Hr|FATFSi___fat_primary_cache_3_r|FATFSi___fat_hash_table_5vr|FATFSi___fat_primary_index_5r|FATFSi___fat_primary_index_6r |FATFSi___fat_hash_table_0r|FATFSi___fat_hash_table_1r|FATFSi___fat_primary_index_3r$|FATFSi___fat_hash_table_3r,|FATFSi___fat_hash_table_4s4|FATFSi___fat_primary_index_7s<|FATFSi___fat_primary_cache_0-sD|FATFSi___fat_hash_table_7DsL|FATFSi___fat_hash_table_8[sT|FATFSi___fat_hash_table_9rs\|FATFSi___fat_hash_table_2s||FATFSi___fat_primary_index_2s|FATFSi___fat_primary_cache_2s|FATFSi___mem_block_hash_tables|FATFSi___rtfs_user_tables,RtfsMyMutexBuf7tx|FATFSi___mem_file_poolyk-FATFSi_rtfs_cfg_coreHt0|FATFSi___fat_buffer_5YtX|FATFSi___fat_buffer_4jt|FATFSi___fat_buffer_3{t|FATFSi___fat_buffer_1t}FATFSi___fat_buffer_0t}FATFSi___fat_buffer_9t }FATFSi___fat_buffer_8tH }FATFSi___fat_buffer_7tp}FATFSi___fat_buffer_6t}FATFSi___mem_drobj_poolt}FATFSi___fat_buffer_2u,}FATFSi___mem_finode_poolu@}FATFSi___mem_block_pool%uj}FATFSi___mem_drives_structuresklrtfs_cfg ^cfg_NDRIVES ^cfg_NBLKBUFFS ^cfg_BLK_HASHTBLE_SIZE ^cfg_NUSERFILES ^cfg_NDROBJS ^cfg_NFINODES ^cfg_NUM_USERS |ocfg_FAT_BUFFER_SIZE ocfg_FAT_HASHTBL_SIZE omem_drives_structures omem_block_pool omem_block_hash_table omem_file_pool omem_drobj_pool omem_finode_pool ofat_buffers lofat_hash_table ofat_primary_cache <pfat_primary_index 0prtfs_user_table 8buffcntxt  qinoroot qmem_finode_freelist qmem_drobj_freelist qdrno_to_dr_map Lide_semaphore Pfloppy_semaphore Tfloppy_signal Xcritical_semaphore \^default_drive_id `useindex d5qscratch_pdrive h^drive_opencounterkRTFS_CFGh^h^.&:o&:k-T.5;ho7hoo7h pph*p6p|rtfs_system_user task_handle ^rtfs_errno rtfs_driver_errno ^dfltdrv ^dfltdrv_set plcwd6pRTFS_SYSTEM_USERhq5;5;T.h/q..Lqtqqqqq r r7Yrpr7r7r7r7r7's>s7Us7ls7 s7  s@s&:|6psrtfs_my_mutex mtx ^validsRTFS_MY_MUTEXk- (7(7(7(7(7(7(7(7(7`T.275;20*&:+.p^]FATFSi_rtfs_pc_ertfs_configruܡ6u]FATFSi_rtfs_my_alloc_mutexu^Ui),] rttermin.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\! b]FATFSi_rtfs_print_string_1wb^Pstringidb^Tflags g]FATFSi_rtfs_print_string_2ywg^Pstringidg]vUpstr2g^Tflags :m]FATFSi_rtfs_print_long_1wmPlm^Tflagsocvbuffer<p]FATFSi_rtfs_print_one_stringFxtvPpstr^Tflagspzv]FATFSi_pc_ltoaxVnumvUdestvPpvWolddest^PdigitvbufferPG} rtutbyte.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\֢y]FATFSi_pc_strchrzyPstringPchآ^]FATFSi__illegal_alias_char_zTch "^]FATFSi_rtfs_strcpyz"yPtarg"yPsrc$^Ploop_cnt J]FATFSi_copybuff-{JySvtoJyPvfromJ^PsizeBc]FATFSi_pc_cppad{cyUtocyTfromc^VsizeDPn]FATFSi_rtfs_memset{nyPpvnPbn^PnoyPpPX rtutil.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^P'^]FATFSi_pc_path_to_driveno}'|Tpath*^Pdrivenumber?^]FATFSi_pc_parse_raw_drive}?|PpathA^PdnoK|]FATFSi_pc_parsedrivea~K|VdrivenoK|UpathN^TdnoM|Ppv|]FATFSi_pc_mpath~v|Utov|Wpathv|Vfilenamez|cy|Tpx|retval^]FATFSi_pc_search_csle|Pset}Pstring}Sp^]FATFSi_name_is_reserved }Tfilename2]FATFSi_to_DWORD}PfromPtPres4@ ]FATFSi_to_WORD_ }Pfrom Pnres@H]FATFSi_fr_WORD}PtoPfromHX&]FATFSi_fr_DWORD&$}Pto&PfromfX4 apifilio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.T.T.k-.k-.k-.k-k-.k-k-.k-k-k-T..T.k-...k-k-&:k-&:k-&:XԧN^]FATFSi_rtfs_po_open/NTnameNUflagNmode`Ppdrive_^ p_errno^VltempZclusters_to_releaseY^open_for_writeX^drivenoW,fileextVPfilenameUāVpathTʁTpobjSЁparent_objRPclusterQցWpfileԧU^]FATFSi_rtfs_po_readU^TfdU܁in_buffU^Wcount^^,end_of_chain]^ret_val]^p_errno\Pn_clusters\0next_cluster[Vn_w_to_read[ n_to_read[Pn_left[Pltemp[Pn_read[Pblock_to_read[Vn_bytesZQbyte_offset_in_blockXTpdriveWPpfile _]FATFSi_rtfs_po_lseek_^Tfd_Voffset_^WorigincPret_valbUpdriveaPpfile d^]FATFSi_po_ulseekt^TfdWoffsetpnew_offset^origin^Pret_valTpdrivePpfiled^]FATFSi__po_ulseeke WpfileToffsetnew_offset^Porigin^p_errno^ end_of_chainQalloced_sizeret_val$next_cluster first_clusterPn_clustersn_clusters_to_seekPltemp2Pltemp^Ulog2_bytespcluster^l_at_eofpdrivePfile_pointer4]FATFSi__po_lseek-PpfilePoffset^PoriginPu_offsetnew_offset^Pu_originPret_val^]FATFSi_rtfs_po_close^Vfd"^Vdriveno!^Pret_valܮn$]FATFSi_pc_fd2filen^Tfdn^Uflagsq*Updrivep0Tpfileܮ@^]FATFSi_pc_allocfileh^Ui6Tpfile@t]FATFSi_pc_freefile<UpfileBTpobjt4^]FATFSi_pc_enum_filehHpdrive^Vchore^Wdirty_count^UiNpobjTTpfile4@]FATFSi_pc_free_all_filZPpdrive@X^]FATFSi_pc_flush_all_fil`PpdriveXd^]FATFSi_pc_test_all_fil>fPpdrivedΰ/^]FATFSi__synch_file_ptrs/lTpfile1PclnoаLS^]FATFSi_pc_flush_file_bufferSrWpfileZUsave_drive_filioUxTpfile_bufferLz^]FATFSi_pc_load_file_bufferz~UpfilezVnew_blocknoVsave_drive_filio|Tpfile_buffer4^]FATFSi_pc_sync_file_bufferfPpfilePstart_blockPnblocks^PdoflushPpfile_buffer4P rtdevio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\...........4^]FATFSi_check_drive_name_mount͐ Pname^driveno7^]FATFSi_check_drive_number_mount7^Udriveno,Q]FATFSi_release_drive_mount|Q^TdrivenoSPpdr,l\^]FATFSi_release_drive_mount_write\^Tdriveno^Ppdrl^]FATFSi_check_drive_number_present`^VdrivenoUpdr^Pmedia_status^]FATFSi_check_media_entry^Pdriveno"PpdrB^]FATFSi_check_media_io(Ppdr^PrawD2^]FATFSi_check_media.Updr^Vok_to_automount^Wraw_access_requested^call_crit_err^Tcrit_err_media_status^Pmedia_status4V^]FATFSi_card_failed_handlerL4Tpdr^Pret_valX^]FATFSi_devio_read^drivenoUblockno:buf n_to_read^(raw@Tpdr\^]FATFSi_devio_write_format^WdrivenoUblocknoFbufn_to_write^ rawLTpdr\ܶ^]FATFSi_devio_writeW^drivenoUblocknoRbuf n_to_write^(rawXTpdrܶP>^]devio_fill>^Vdriveno>Ublockno>^buf>n_to_write>^Wraw@dTpdr  rtvfat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\T. lfninode lfnorder lfname1 lfnattribute lfnres lfncksum lfname2 lfncluster lfname3LFNINODE    &:5; dosinode fname ʙfext fattribute ۙresarea fclusterhi ftime fdate fcluster fsizeDOSINODE>&:T.T. .>&:.;>&:.;>&:^.;>&:;>;>;>T.T.T.5;T.T.>&:T.&G^]FATFSi_pc_findinGTpobjGfilenameG^WactionUPpTlastsegorderS;>sRPlfn_nodeQ4sfnPɘ lfnOϘscratchN^PdowildcardM^PmatchfoundL՘PpfiKۘUpiJVpdIrbufP:)^]FATFSi_pc_insert_inode>)Upobj) pmom)Wattr)Tinitcluster)filename5^n_segs4^end_of_dir3Wcksum2 (vffileext20vffilename1-,crdate0,pdrive/Vcluster.^Wi-2pi,8Tpd+> pbuff<D]FATFSi_pc_nibbleparseJUfilenamePTpathVPt\Pp]FATFSi_pc_cksumbPtestQiUsumȹ]FATFSi_pcdel2lfikhPlfi^Pnsegsȹ ^]FATFSi_pc_deleteseglist+ npdrive tUs^Pntodo_2^Vntodo_1^Pntodo_0zPlfiVrbufa]FATFSi_text2lfiaTlfnaVlfia^nsegsancksumaPordereUpfid^Wend_of_lfnc^nʼ^]FATFSi_pc_seglist2diskޢpdriveUslfnPpsegtext^Pntodo_2^Vntodo_1^Pntodo_0PlfiVrbufš]FATFSi_lfi2textȚUlfnΚTcurrent_lfn_lengthԚlfi^nsegsښVpfi^Wn̼!]FATFSi_pc_seglist2text!pdrive!Us!lfn'^current_lfn_length&^Sntodo_2&^Vntodo_1&^Pntodo_0%Tp$Plfi#Vrbufh]FATFSi_pc_zeroseglistˤh Psq]FATFSi_pc_addtoseglist;qPsqPmy_blockq^Pmy_index<]FATFSi_pc_reduceseglist~Ps<^]FATFSi_pc_parsepathWtopath"Vfilename(path.Tpfilespace4Ppto:Tp@pcolonFpslashLPpfile^ keep_slash^i(,4^]FATFSi_pc_patcmp_vfat4RUin_pat4XTname4^Wdowildcard8^Vres7^star6oPpn26uPpp26{Ppn6Ppp6PpatĿ{^]FATFSi_pc_patcmp_vfat_8_3 {Vpat{Uname{^Wdowildcard~^Pret_valĿ^]FATFSi_pc_maliasUfnameVfextWinput_filedest ascii_alias›&alias^aliasuniqueӛPpobj^Ttry^]FATFSi_pc_allspaceJٛPp^Pi^]FATFSi__illegal_lfn_charTch^]FATFSi_pc_isdotΩߛPfnameD^]FATFSi_pc_isdotdotPfnameDT^]FATFSi_pc_delete_lfn_infoXQpobjT`]FATFSi_pc_zero_lfn_infoPpdir`^]FATFSi_pc_get_lfn_filenamePpobjPpath]FATFSi_scan_for_bad_lfnsTpmom^delete_bad_lfn"Vbad_lfn_count!lastsegorder ;>s Ulfn_nodePpiWpdrbuf!Tpobj0 apifilmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.T.T.^]FATFSi_rtfs_pc_unlinkname^Up_errno^drivenofileextĬPfilenameʬ pathЬPpdrive^Vret_val֬Wparent_objܬTpobj;P rtdrobj.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\T..T.T.T.&:.T.T.T.T.T.T.T.T.5;>.T.T.T.>T.T.T..&:T.T..T.5;-5;T..5;T.>T.T..5;.5;.5;T.T.5;5;.T..5;5;T.5;T.T.T.\@]FATFSi_pc_get_cwdܰ@TpdriveCPpobjBUpcwd\t]FATFSi_pc_fndnodeɱtWpath~scratch| fileext{̮UfilenamezҮPpdrivey^drivenoxخVpchildwޮpmomvTpobj2]FATFSi_pc_get_inodexUpobjQpmomVfilenameWfileext^action^Tstarting4(P]FATFSi_pc_get_mom0PVpdotdotYPclnoXPpfiVVpdTPsectornoS UpdriveR&Tpmom(~,]FATFSi_pc_mkchild2Vpmom8Upd>PpobjD]FATFSi_pc_mknode;J pmomPfilenameVfileextattributesVincluster\,null_strm0dot_str attr~Updrive$pbuff-4crdatePcltempWcluster5;8lfinode(pdinodes^Tret_valTpobj^]FATFSi_pc_rmnodeUpobjTpdrivePcluster,^]FATFSi_pc_update_inodeAUpobj^Vset_archive^Wset_date-crdate^Ti,~]FATFSi_pc_init_inodeUpdirPfilenameWfileextVattrclustersizeTcrdateD]FATFSi_pc_ino2dosXDUpbuffDƯTpdir0u̯]FATFSi_pc_get_rootѷuүUpdriveyدPpfixޯTpobjwPpd0t]FATFSi_pc_firstblock'TpobjPclnot^]FATFSi_pc_next_block|TpobjPnxt]FATFSi_pc_l_next_blockUpdriveTcurblockPclusterl5]FATFSi_pc_markin5Upfi5Vpdrive5Wsectorno5^indexl\]FATFSi_pc_scani\Tpdrive\Vsectorno\^Windex^Upfi~]FATFSi_pc_allocobj, Upobj &]FATFSi_pc_allocih,Pp H]FATFSi_pc_free_all_drobjԺ2Vpdrive8Upobj^TiH]FATFSi_pc_free_all_i,>pdriveDUpfi]FATFSi_pc_freeiiJUpfi0 ]FATFSi_pc_freeobj PTpobj07]FATFSi_pc_dos2inode7VUpdir7\Tpbuffl^]FATFSi_pc_isavol>lbPpobj^]FATFSi_pc_isadir}hPpobj^]FATFSi_pc_isrootnPpobjuv apifrmat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^^Hdev_geometry ^dev_geometry_heads dev_geometry_cylinders ^dev_geometry_secptrack dev_geometry_lbas ^fmt_parms_valid [fmtDEV_GEOMETRY4fmtparms ǿoemname secpalloc secreserved numfats secpfat numhide numroot mediadesc secptrk numhead numcyl "physical_drive_no $binary_volume_label (ؿtext_volume_label[FMTPARMS   ...^^^<]FATFSi_pc_calculate_chsPtotalaVcylindersgWheadsmsecptrackUsThSc<p^]FATFSi_rtfs_pc_get_media_parmsnpsTpathpyUpgeometrytPpdrr^Pdriveno(^]FATFSi_rtfs_pc_format_mediaTpathWpgeometryPpdr^Pdriveno((^]FATFSi_rtfs_pc_format_volumeoUpathTpgeometry^partition_status^ nibs_per_entry secpfat^$secpalloc^(root_entriesn_cylspartition_size^driveno[,fmt^Wraw_mode_io Updr(]FATFSi_pc_fat_size|WnreservedPcluster_sizen_fat_copiesVroot_sectorsvolume_sizeUnibs_per_entryTentries_per_blockPtotal_clusters]FATFSi_get_format_parametersJPnblocksPpsectors_per_allocPpnum_root_entries^Snum_root_entries^Psectors_per_alloc(< csstrtab.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\_}(FATFSi_string_tablertfs_string_table ^string_id wstring_valueRTFS_STRING_TABLEH]FATFSi_rtfs_strtab_stringPptable^Pstring_id(]FATFSi_rtfs_strtab_user_stringT^Pstring_id(P rtfat16.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.A[&:(^]FATFSi_pc_init_drv_fat_info16UpdrPpbl01Pdiv31Tmax_index3*Pmax_indexPY^]FATFSi_pc_mkfs16Y^drivenoYUpfmtY^use_rawPltotnibblese^Wret_valdblocknocjcPib^PfausizeaPldata_area`Plnclusters]Vltotsecs\  buf[TbP& rtfat32.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.A.T..T..T..T.[&:.5;.5;A.&:..P^]FATFSi_pc_init_drv_fat_infoUpdrTpbl09Pmax_index4U]FATFSi_pc_get_parent_cluster/UPpdriveUPpobj4db]FATFSi_pc_alloc_dirbUpdrivebTpmomdPclusterdPclbasedn]FATFSi_pc_grow_dir1nUpdrivenTpobjpPclusterpPtmpcl]FATFSi_pc_truncate_dirUpdrivePpobjTclusterPtmpclL^]FATFSi_pc_mkfs32^drivenoUpfmt^Vuse_raw^ret_valblocknoPkRjWiPldata_areaPlnclustersWltotsecs bufTbL`{]FATFSi_pc_finode_clusterF{Ppdr{Pfinode`n]FATFSi_pc_pfinode_cluster PpdrPfinodePvaluep^]FATFSi_pc_gblk0_32VdrivenoUpbl0Tb8^]FATFSi_pc_validate_partition_typeoPp_type8^]FATFSi_fat_flushinfo%Updr+Pbuf1Vpf^]FATFSi_fatxx_pfpdwordT7PpdrUindex=TpvalueCPppage^]FATFSi_fatxx_pfgdwordIPpdrUindexOTvalueUPppaget apigfrst.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Hdstat fname fext lfname filename fattribute ftime fdate $fsize (^driveno ,^drive_opencounter 0pname 0pext 4&path @7pobj D=pmomxDSTAT     x.t]FATFSi_rtfs_pc_gdoneCUstatobjIPpdrive t8 csunicod.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u1FATFSi_print_buffer&:&:   t"]FATFSi_pc_unicode_byte2upper"Pto"Pfrom$Rc5^]FATFSi_unicode_ascii_index<5Rp5Tbase8^Pindex7cH^]FATFSi_unicode_compareHPp1HPp2]^]FATFSi_unicode_compare_nc ]Rp1]Up2`cp2_cp1u^]FATFSi_unicode_cmp_to_ascii_chariuPpuPc|]FATFSi_unicode_assign_ascii_char|Pp|Pc]FATFSi_map_ascii_to_unicode>Punicode_toPascii_fromPpD]FATFSi_map_unicode_to_asciiPtoPfromDl]FATFSi_pc_ascii_strn2upper# PtoPfrom^PnSc^Til]FATFSi_pc_ascii_str2upperPtoPfromRc^]FATFSi_rtfs_cs_strcmp%Us1+Ts2Pw2Pw1(^]FATFSi_rtfs_cs_strcpyp1Ptarg7Psrc^Tloop_count(@^]FATFSi_rtfs_cs_strlen=Pstring^Rlen@^]FATFSi_validate_filenameyCUnameIascii_bufferZuni_bufferkTpuqVpa^WlenH ^]FATFSi_pc_cs_maliasg walias }input_file ^try&^Vret_val%Wascii_alias$ ascii_input_file#Uscratch1"TscratchHR]FATFSi_lfn_chr_to_unicodePtoPfrT^]FATFSi_unicode_chr_to_lfnPtoPfr`]FATFSi_pc_cs_mfileUtoPfilenamePexttemp_to^]FATFSi_pc_ascii_fileparseUfilenameVfileextTp^Pi,]FATFSi_pc_ascii_mfilePtoPfilenamePextSretval^Ui Pp-^]FATFSi_pc_ascii_malias-alias-Uinput_file-^Wtry0fileext0/ filename/^Ps/^i/^Qn^]FATFSi_pc_valid_ascii_sfn0@Wfilename^badchar^Vext_start^Uperiod_count^Tlen8F]FATFSi_unicode_make_printableLPpPc^Pi8? rtfatxx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^1FATFSi_fatxx_d(fat_driver fatop_alloc_chain fatop_clnext  fatop_clrelease_dir Hfatop_faxx fatop_flushfat fatop_freechain fatop_cl_truncate_dir (fatop_get_chain fatop_pfaxxterm $fatop_pfaxx^FAT_DRIVERpdrpstart_clustern_clustersdolink^.pdrclno.&^pdrBclno.N^pdrwclnopvalue}.^driveno^^pdrclustermin_to_freemax_to_free.pdr"clusterl_cluster..pdrstart_clusterpnext_clustern_clustersend_of_chain.^^pdrclno.^pdrclnovalue...^........align1 uwrdbuf fill..align2 wrdbuf2 fill.^.........8H]FATFSi_fatxx_alloc_chainHUpdrHpstart_clusterHn_clustersH^dolinkP^is_errorORlast_clusterNvalueMWn_contigLTclnoK first_new_clusterJVstart_cluster]FATFSi_fatxx_find_free_cluster[WpdrUstartptTendpt Vis_errorvaluePi]FATFSi_fatxx_clallocUpdrVclhint^is_errorTclno9]FATFSi_fatxx_clgroww9Updr9Vclno=Trange_check<Pnextcluster;PnxtTr^]FATFSi_fatxx_clrelease_dirrUpdrrTclnot^Pcurrent_errnoT^]FATFSi_fatxx_flushfatG^Pdriveno#Ppdr*^]FATFSi_fatxx_freechain!)UpdrTclustermin_clusters_to_freemax_clusters_to_freeVclusters_freednextcluster,]FATFSi_fatxx_cl_truncate_dir/UpdrTclusterWl_cluster^current_errnoVrange_checkQnextcluster?^]FATFSi_fatxx_pfaxxtermA?5Ppdr?Pclno~W^]FATFSi_fatxx_pfaxxW;UpdrWVclnoWTvalue]Pt]Voffset]Windex\Au]FATFSi_fatxx_clnextYTpdrPclnonxt"^]FATFSi_fatxx_faxx""Updr"Pclno"Wpvalue-u2)Au$result$Toffset$VindexR]FATFSi_fatxx_get_chain-pdrUstart_clusterVpnext_clustern_clusters Wend_of_chainPvalueTn_contigPnext_clusterPclnoT]FATFSi_fatxx_pfswapPpdrPindex^Pfor_writePblock_offset_in_fat^]FATFSi_fatxx_fworddPpdrUindex$Tpvalue^VputtingPoffset*Pppage( ^]FATFSi_init_fat 0Ppdr(h^]FATFSi_faxx_check_free_space&6Updr VfreecountnxtTih-^]FATFSi_init_fat32e-<Tpdr4^]FATFSi_init_fat164BTpdr;^]FATFSi_init_fat12;HTpdrRJ^]fat32_check_freespaceJNVpdreTltempOUfreecountNTPpdwM^TiLPpage_baseTs^]fat16_check_freespace4sZVpdrSltempxTfreecountw`Rpwv^UiuUpage_basee apiinfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\T.)^]FATFSi_rtfs_pc_set_default_driveW)Tdrive+^Pdrive_not^]FATFSi_rtfs_pc_get_attributesVpathUp_return^Wdriveno^Tret_valPpobjt!^]FATFSi_pc_getdfltdrvno*' apiinit.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\1FATFSi_current_pdr^1FATFSi_enabled_drivers...0^]FATFSi_rtfs_init"Updr^Tj0^]FATFSi_auto_format_disk(Ppdr.Udrivenamegeometry]FATFSi_drno_to_stringU4Tpname^Pdrno portkern.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\--h]FATFSi_rtfs_port_alloc_mutex=]FATFSi_rtfs_port_claim_mutexPhandle]FATFSi_rtfs_port_release_mutexPhandle]FATFSi_rtfs_port_get_taskid]FATFSi_rtfs_port_puts?l]FATFSi_pc_getsysdateUpddataTsecPminutePhourPdayPmonthPyear6]RtcBCD2HEXq6Pbcd:Rw9Ui8Qhex-apifastmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ alias_buffer ^alias_buffer_size ^alias_buffer_count alias_buffer_dataALIAS_BUFFERt\ apimkdir.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.T.T.T.t^]FATFSi_rtfs_pc_rmdirGname^Up_errnoMTpdrive^drivenoSfileextdPfilenamej path^ret_valpVpchildvWpobj|parent_objt apirealt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\..k-.fileseginfo block nblocksrFILESEGINFOfreelistinfo cluster nclustersFREELISTINFOt(^]FATFSi_rtfs_pc_cluster_size(HUdrive,NPpdrive+^Tret_val*^Pdriveno^]FATFSi_rtfs_po_extend_file^Tfdn_bytesTnew_bytes start_cluster^PmethodZUpdr`Tpfileclusters_in_chainrange_check new_file_sizeQnew_alloced_sizeWalloced_sizeiVlast_cluster_in_chainfirst_cluster$largest_chain(n_clusters,ltemp0n_allocedQclno^4ret_val]FATFSi_pc_find_contig_clustersmfpdrWstartptlpchainmin_clusters^Pmethodendpt largest_chainlargest_sizeUFATFSi_chain_sizechain_startbest_sizeTbest_chain valuePi_prblock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\&:.7&:&:8&:.8&:&:&:&:8&:.8&:.&:8&:8&:8&:&:&:.&:8&:.8&:&:&:&:.&:8&:&:&:.775.77557g7s577575757577777,^]FATFSi_block_devio_write ,Ppblk3^]FATFSi_fat_devio_write3Ppdrive3Spblk3^PfatnumberHU]FATFSi_pc_release_bufU#TpblkHy]FATFSi_pc_discard_buf3 y)Upblk{/Tpbuffcntxt5]FATFSi_pc_read_blk ;UpdriveVblocknoAWpbuffcntxtGTpblkM]FATFSi_pc_scratch_blk SUpblk` ]FATFSi_pc_free_scratch_blk^  YUpblk_Ppbuffcntxt`(e]FATFSi_pc_init_blk (kUpdrive(Wblockno+qVpbuffcntxt*wTpblkc]FATFSi_pc_free_all_blkn c}Updriveg^deletingfTpblkeVpbuffcntxt^]FATFSi_pc_write_blk Ppblk]FATFSi_pc_add_blk PpbuffcntxtPpinblk]FATFSi_pc_release_blk} PpbuffcntxtPpinblkTpblkX]FATFSi_pc_find_blk PpdrivePblocknoSpblkRpbuffcntxtX]FATFSi_pc_allocate_blkpdriveUpbuffcntxt^Rloop_guard^Wpopulated_but_uncommitedQpblkscanPpfoundblkTpuncommitedblkPpfreeblk1]FATFSi_pc_flush_chain_blk1Updrive1Vcluster5Tpblk4blockno3^Wi*T^]FATFSi_pc_initialize_block_poolTUpbuffcntxtT^VnblkbuffsUpmem_block_poolU^Wblk_hashtble_sizeU  pblock_hash_tableYpblkW^Ti,w^]FATFSi_pc_flush_fat_blocks.wVpdrive|Pbz%Qplastz+Upblky1Tpfatbuffcntxt7]FATFSi_pc_map_fat_block=pdriveVblocknousage_flagsPbCQpblkscanIPpblkOTpfatbuffcntxt^Phash_index8^]FATFSi_pc_initialize_fat_block_pool-UPpfatbuffcntxt^Pfat_buffer_size[Ppfat_buffers^Pfat_hashtbl_sizeapfat_hash_tablem pfat_primary_cacheypfat_primary_index8]FATFSi_pc_free_all_fat_blocksUpfatbuffcntxtVpblk^Ti]FATFSi_pc_find_fat_blkPpfatbuffcntxtPblocknoPpblk]FATFSi_pc_commit_fat_blkPpfatbuffcntxtPpblk\]FATFSi_pc_commit_fat_tableUpfatbuffcntxtPpblk^TiVb\]FATFSi_pc_sort_committed_blocksPpfatbuffcntxtTpblk_source_scanWpsortSpsorted_listRpprevQpblkw.rtkernfn.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\pFATFSi_med_st^6p..5;T.T.T.T.5;5;&:5;^]FATFSi_rtfs_resource_init3"]FATFSi_rtfs_get_system_user%Wt$^Tj$^Ri0i]FATFSi_pc_free_all_usersi^Pdrivenok^Ti0D^]FATFSi_rtfs_set_errno9^TerrorDR^]FATFSi_rtfs_get_errnoiTt]FATFSi_pc_report_error^Terror_numbert^]FATFSi_critical_error_handlera^Pdriveno^Umedia_status^Tneeds_flushVpdrinbuf'^]FATFSi_pc_nuserfiles 8^]FATFSi_pc_validate_driveno8^Pdriveno Y^]FATFSi_pc_memory_initw^Updrive]Ppfi\Ppobj[^Pl[^Rj[^Ti`]FATFSi_pc_memory_drobjUpobjTpreturn`]FATFSi_pc_memory_finodeKUpinodeTpfile_bufferPpreturnQdrdefault.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\.]FATFSi_i_no_print/D(^]FATFSi_defaultRtfsIo(Pblock(Tbuffer(Pcount(^readingD>^]FATFSi_defaultRtfsCtrlH>^Pdriveno>^Uopcode>VpargsAgc@Ppdr$ 0qdrfile.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\)1FATFSi_file_heads+1FATFSi_file_cylinders*1FATFSi_file_secptrack'1FATFSi_file_capacity(1FATFSi_file_adjusted_capacity"1FATFSi_fileDescListh^.$G^]FATFSi_fileRtfsIoG^WdrivenoGQblockGbufferGUcountG^ readingJdmyI^ViI^result( p^]FATFSi_fileRtfsCtrlp^Tdrivenop^Uopcodeppargsudmyufile_sizes gcrPpdr(  /^]FATFSi_fileRtfsAttach /^PfileDesc/^Pdriveno2.pdr1^Presult  attach.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^ԑFATFSi_rtfs_first_attach!ؑFATFSi_rtfs_first_stat_flagh^.2..  C^]FATFSi_rtfs_attach!C^VdrivenoC"!UpdrC(!dev_nameE.!Ttarget_pdr  ^]FATFSi_rtfs_detach"^Vdriveno4!Ttarget_pdr L(rtfs_twl_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\&:&:x.x.T.x5;T.T.T.T..k-k-.k-.k-..T.T.T.T..T.T.T.T..&:T.-T..  5^]pc_fill_blk$5"Ppblk5^Pblocknum  O^]block_devio_fillF%O"PpblkO^Sblocknum D^]FATFSi_rtfs_pc_gfirst_exA&"Ustatobj"scf"name^ get_lfname"Ppdrive^Wdriveno"fileext"Pfilename#mompathD^]FATFSi_rtfs_pc_gnext_ex& #Ustatobj#Vscf^get_lfname#Ppdrive#Pnextobj%]pc_upstat_exp'%##Ustatobj%)#Wscf%^get_lfname(/#Tpi'5#pobj,S;#]pc_get_inode_ex5(SA#UpobjSG#QpmomSM#VfilenameSS#WfileextS^actionS^get_lfnameU^Tstarting, ^]FATFSi_rtfs_pc_cache_clusters(^UfdY#bufbuf_sizestart_#Vpdrivee#Upfile^Tret_val l^]rtfs_get_next_cluster_cache)k#PpfilePfile_pointerq#PclnoPnext_of_end_indexTstart_indexScluster_indexw#Ppdrive^Qresultl@^]rtfsi_pc_cache_clustersV,@}#Vpfile@Ufile_pointer@#Wbuf@buf_size@#Pstart_indexmPnew_indexMnow_indexMPindex_numL0next_clusterLfirst_clusterKPn_clusters_to_eofKPn_clustersKn_clusters_to_seekJ^PindexI^PiH^4end_of_chainG^ log2_bytespclusterF$bytespclusterE#Pfat16_bufD#Pfat32_bufC#(pdriveB^,ret_val"^]FATFSi_twfs_po_open,#PnamePflagPmode#Ppfile^Ufd$\^]FATFSi_twfs_pc_get_fatbitsD-#Ppdrive^Tret_val\L^]FATFSi_rtfs_pc_mv_ex.#old_name#new_name^Up_errno#PpdrivePcluster^ ret_val#new_parent_obj#Vnew_obj^new_driveno# fileext#Pfilename#path#old_parent_obj#Told_obj^$old_drivenoLTG^]FATFSi_rtfs_pc_mkdir_ex/G#nameQ^Up_errnoP$TpdriveO^drivenoN^Wret_valM$fileextL$PfilenameK$ pathJ#$Vparent_objI)$pobjT4/$]pc_mknode_exy15$Wpmom;$ filenameA$fileextattributesUinclusterG$(null_strX$,dot_stri$Tpdriveo$pbuff-0crdatePcltemp cluster5;4lfinodeu$$pdinodes^Vret_val{$Vpobj4}^]FATFSi_twfs_pc_set_properties52}$Tpath}Uattributes}$Vst_mtime^driveno^Wret_val$Tpobj^]twfs_ismountedname2$Pname^Tret_val^drivenoL^]twfs_ismounteddrive3^Wdriveno^Vret_val$PpdrL>rtfs_twl_vfat_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\T.&:5;>&:LJ^]pc_findin_ex5J3TpobjJ3filenameJ^WactionJ^Pget_lfnameX3PpWlastsegorderV;>sU3Plfn_nodeT34sfnS3 lfnR3scratchQ^PdowildcardP^PmatchfoundO3PpfiN3UpiM4VpdL4rbuf>8 sdmc_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\N^Lfirst_select76D2FATFSi_func_SDCARD_Out66H2FATFSi_func_SDCARD_In66@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_PORT_CARDSDMC_PORT_NANDD 9SD_CID 9SD_CSD %9SD_OCR $69SD_SCR ,SD_RCA .fSDCARD_MMCFlag 0fSDCARD_SDHCFlag 2fSDCARD_SDFlag 4G9SDCARD_ErrStatus 8SDCARD_Status <SD_CLK_CTRL_VALUE >SD_OPTION_VALUE @fOutFlag Bport_no7SDPortContext@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTG96888::: ;  ;buf bufsize offset ^fill ;func ;info operation Z7port;SDCARDMsg;'< b_flags result resid;SdmcResultInfo'<'<'<'< Val <PSel L Hh]FATFSi_sdmcGetErrCodeg=hZ7Pporth:Preh:Pdek:SSDPortTargetContextX^]FATFSi_sdmcIsFatalErr>Z7Pport^Pfatal_flag:QSDPortTargetContext6PdeG9PreX^]FATFSi_sdmcIsAbortErr>Z7Pport:PSDPortTargetContextG9Pre-G9]FATFSi_sdmcSetInsertCallback>-:PcallbackAG9]FATFSi_sdmcSetRemoveCallback?A:PcallbackUG9]FATFSi_sdmcGoIdle?UPportsU:Pfunc1U;Pfunc2X;init_msgW;SdMsgHx]sdmcPostSleep @{<<recv_datz;SdMsgHG9]FATFSi_sdmcWriteAesFifo@B<PbufPbufsizePoffsetZ7PportH<(infoN<recv_dat;SdMsg=G9]sdmcFillAesFifoA=T<Pbuf=Pbufsize=Poffset=Z7Pport=Z<(info@`<recv_dat?;SdMsggG9]FATFSi_sdmcWriteFifoJBgf<PbufgPbufsizegPoffsetgZ7Pportgl<(infojr<recv_dati;SdMsgXG9]sdmcFillFifoCx<PbufPbufsizePoffsetZ7Pport~<(info<recv_dat;SdMsgX G9]FATFSi_sdmcSelect`CUselect<SDCARD_PSel 8 >G9]FATFSi_sdmcSetLatencyEmulationC>PenableA<recv_dat@;SdMsgx8 !sdmc_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\EDT}SdmcCache  Eport ^valid offset =EbufDSdmcCacheInfo@enumSDMC_PORT_CARDSDMC_PORT_NAND@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECT'<'<FTEbufGbufsizeoffset;8 H ^]sdmcInitCacheYGH ` m]sdmcInvalidateCacheGmEPport`  ^]sdmcIsHitCache4HNEUbufTbufsizePoffsetEPportPcache_offset_end  TE]sdmcCacheReadAesFifoHFPbufPbufsizePoffsetEPportF(infoFrecv_dat;SdMsg TE]SDCARDi_CacheAccessXJ>FUAccessFunc>Vlimit>%GTSdMsgA+Goriginal_buf@TEPapi_result!!9?sdmc_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\L2SD_port_en_numbers`}SD_INFO1_VALUEPFATFSi_sdmc_dma_nod}SD_INFO2_MASK_VALUEh}SD_INFO_ERROR_VALUEl}SD_INFO1_MASK_VALUEp}SD_INFO2_VALUERFATFSi_sdmc_dma2_no^P2FATFSi_thread_flag^T2SDCARD_UseAesFlagX2FATFSi_ulSDCARD_Size^\2sdmc_abort_requestQ`2FATFSi_sdmc_dtq_array)Qd2sdmc_slpq_arrayu^h2FATFSi_sdmc_tsk_createdt}FATFSi_ulSDCARD_SectorCount@Qx}FATFSi_pSDCARD_BufferAddrFQl2FATFSi_sdmc_result_dtq_array]QTSDNandContexttp2sdmc_srand|}FATFSi_ulSDCARD_RestSectorCount}SDCARD_SectorSize= t2timeout_ms^x2SDCARD_EndFlagRXSDPortCurrentContext|2sdmcRandEnable!S2SDCurrentAccess 0S2FATFSi_aesCounterDefaultS2FATFSi_sdmc_intrq_arrayoF2sdmc_slpqoF2FATFSi_sdmc_intrqoF2FATFSi_sdmc_dtqoF3FATFSi_sdmc_result_dtq03FATFSi_sdmc_alm,U\3FATFSi_sdmc_current_spec;U3SD_SDSTATUS83SDPort1Context84SDPort0ContextSX4FATFSi_sdmc_intr_tskS4FATFSi_sdmc_tskLU5FATFSi_sd_intr_stack]UUFATFSi_sd_stack#Q:QWQ8@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECT8  operation offset lenRSDAccessAESCounter ySbytes Swords0SAESCounterS4 csd_ver2_flag memory_capacity protected_capacity card_capacity adjusted_memory_capacity heads secptrack cylinders SC BU RDE SS $RSC (FATBITS *SF ,SSA 0NOMSSdmcSpec@ Z Z88@enumSDMC_USE_DMA_4SDMC_USE_DMA_5SDMC_USE_DMA_6SDMC_USE_DMA_7SDMC_NOUSE_DMA@enumSDMC_PORT_CARDSDMC_PORT_NAND8;VcQbufVbufsizeoffset;!4"]FATFSi_sdmcInitAesCounter,WnUmdUbuffer\""5]FATFSi_sdmcSetAesCounterW5Usector70Scounter""L]FATFSi_sdmcStartAesWLUsectorLTcount""]sdmcInitContext(XUTsd_context"#cQ]sdmcCheckPortContextXUUbuf_adrcQTresult##?]i_sdmcEnableXA^Plast_irq##A^]OS_DisableIrqXAPprep#p%cQ]FATFSi_sdmcInitYUPdma_noUPdma2_no^Plast_irqcQPapi_result%T&cQ]FATFSi_sdmcResetYPirq_core_flagl&T'cQ]i_sdmcInitZUportsT',#cQ]SDCARD_LayerInit[Z&^Vretry%cQPresult0,`-5]FATFSi_i_sdmcCalcSizeZ8Wmult_val8Vread_block_len_val7UulCSize`-.cQ]SDCARDi_ReadAesFifop[V bufbufsizeoffset TposcQVresult(//tcQ]SDCARDi_ReadFifo[tVVbuftUbufsizet offsetvcQPresult/$0cQ]SDCARDi_Readi\VPbufPbufsizePoffsetcQPresult  cQ]SDCARDi_ReadCore\$VWbufUbufsizeVoffset^last_irq$00#]SDCARD_TimerStart@]#Utim+^Plast_irq00A]SDCARD_TimerStop]I^Plast_irq01]FATFSi_i_sdmcErrProcess]cQUErrBackupTStatusBackupusRSP012_^]sdmcIsProtectedp^_*VPportcaVRSDTargetContextaTcsd_wp23cQ]SDCARDi_WriteAesFifo_gV bufbufsizeoffsetTposcQVresult3 5"cQ]SDCARDi_WriteFifo_"mVWbuf"Ubufsize" offset$cQPresult 5@5scQ]SDCARDi_Write`ssVPbufsPbufsizesPoffsetucQPresult cQ]SDCARDi_WriteCore`yVbufTbufsizeUoffset^Vk^last_irq@57 ]SDCARD_Threada cQPapi_result Vcurrent_dat VTSdMsg79 cQ]SDCARDi_Access}b VAccessFunc limit VUSdMsg cQPerr_status Prrms ^ s_retry ^Wretry pos Plen offset Vptr last_r1status  r1status cQ$last_result cQTresult |Bjsdmc_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\L usd_last_info1[ cuSDCARDi_TransferM ^uSDCARD_EndByDmaFlag ^uic|D| ]SDCARDi_CpuRecvFast`d c srcp cQdestp RsizeD|| ]SDCARDi_CpuSendFastd cPsrcp cQdestp Rsize99 ]SD_OrFPGA(e cUreg Tvalue ^Pb_irq9 :D^]OS_DisableIrqdeDPprep :,: ]SD_AndFPGAe cUreg Tvalue ^Pb_irq   ]SD_SetFPGA$f cUreg Tvalue ^Pb_irq,:L: ]SD_GetFPGAf cTdest cUreg ^Pb_irqL:t: ]SD_ClrFPGAf cUreg Tvalue Pread_value ^Pb_irqt:: ]SDCARD_SetAbort;g ^Pb_irq:: ]SDCARD_ResetAbort|g ^Pb_irq:@;- ]SDCARD_irq_Handlerg@;`;S ]NDMA_irq_Handlerg`;;m ]SDCARD_Timer_irqEhm cUarg Ptimeout_spec now_rest; < ]SDCARD_Abortlh <l< ]SDCARD_TerminateForceh ^Tstop_com_flagl<< ]SDCARD_ReadyToEndh< = ]SDCARDi_CpuReadFifoAes7i ^Uk ^Ti=|=$ ]SDCARDi_DmaReadFifoAesi' ^Uk& ^Ti=$>5 ]SDCARDi_CpuWriteFifoAesi8 ^Uk7 ^Ti$>>K ]SDCARDi_DmaWriteFifoAes/jN ^UkM ^Ti>>a ]SDCARDi_CpuReadFifo]j?T?i ]SDCARDi_CpuReadBufj`??t ]SDCARDi_CpuWriteFifoj? @} ]SDCARDi_CpuFillFifoj @h@ ]SDCARDi_CpuWriteBufkt@@ ]SDCARDi_CpuReadBufSingleHk@@ ]SDCARDi_Nothingrk@A ]SDCARDi_FPGA_irqk$A B ]SYSFPGA_irqk Uinfo1l  ]SDCARD_Intr_Threadclj ^Pb_irq ctmp Usd_current_info1 Usd_info1 B0BD^]OS_EnableIrqlDPprep0BB ^]SDCARDi_RemoveProcl Tinfo1 ^Pforce_flagBB ^]SDCARDi_InsertProcTm Tinfo1 ^Pforce_flag B< sdif.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\'fuSDCARD_V2Flag&uSD_port_number@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTBCK]SD_InitIPoK^UbWriteRegC4Cc]SD_EnableInfop4CC]SD_CommandVpUucCommandCD]SD_AppCommand~pDPD]SD_SetPullUpp^PconnectPDD]SD_AppOpCondpD|EM]SD_SendOpCond q|EEp]SD_SendIfCond3qEXF]SD_SendRelativeAddraqXFF]SD_SelectCardqFF]SD_DeSelectCardqFG]SD_SetIpBlockLengthqRulBlockLengthGdG]SD_SetBlockLengthHrulBlockLengthdGH,]SD_SendCIDr,^Uall_send_cidHHS]SD_SendCSDrHHu]SD_SendStatusrH0I]SD_SendSCRr0II]SD_SDStatus!s < ]SD_MultiReadBlockfsulOffsetI J]SD_ClockDivSetsPusTranSpeedPusTranTime J0JB]SD_EnableAutoClocks0J@JP]SD_EnableClockt@JTJ^]SD_DisableClockCtTJ Ks]SD_SelectBitWidthtsfPb4bit KtK]MMCP_WriteBusWidtht^Pb4bittKL]SD_StopTransmissionu^Ui8nTErrBackupLdLK]SD_TransEndFPGAGudLMe]SD_CheckStatusueUcheck_mask_hieTcheck_mask_loe^VbReadMM]SD_SwapByte voPdataPusDATAM@M]SD_EnableSeccntavUFATFSi_ulSDCARD_SectorCount@M`M]SD_SetErrvTErrorPirq_core_flag`MM]SD_ClrErr wTErrorPirq_core_flagMM]SD_TransReadyFPGA7w  *]SD_TransCommandzw*UucCommandMMN^]SD_CheckFPGARegwNPregNPvalue  ]SD_MultiWriteBlockxulOffsetMLTȸdrsdmc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\uinitialize_flagGOyuFATFSi_func_usr_sdmc_out+usdmc_total_sectorsF^uFATFSi_sdmc_drive_noUy@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECT..MDN^]FATFSi_sdmcRtfsIo{^PdrivenoTblock[yPbufferPcount^reading'<SdResultPresultDNdS^]FATFSi_sdmcRtfsCtrl\|^driveno^UopcodeaypargsgyVresultgczTpdrdSSwgy]i_sdmcIdleCard|wzUinitialize_flagygyPresultSS]FATFSi_i_sdmcRemovedIntr|SS]i_sdmcRemovedIntrCore/}zPpdrSLT^]FATFSi_sdmcRtfsAttach}^Tdriveno.pdr^PresultjLTP]Bdrnand.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\A^uFATFSi_nand_drive_noSuNAND_FAT_PARTITION_COUNTTuNAND_RAW_SECTORSVuNAND_FAT1_SECTORSWuNAND_FAT2_SECTORSXuNAND_FAT3_SECTORSUuNAND_FAT0_SECTORSC^uFATFSi_nand_calculated_fat_paramsBuNandFatSpec]8 device_capacity adjusted_device_capacity memory_capacity adjusted_memory_capacity volume_cylinders heads secptrack cylinders SC BU RDE padding SS $RSC (FATBITS *SF ,SSA 0NOM 4begin_sectFATSpec.LTP]^]FATFSi_nandRtfsCtrl ^driveno^TopcodekpargsgcqVpdrP]H`sdmc_flags.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ivsdmc_nand_flagjvsdmc_nand_flag_bakkvsdmc_spi_lockidlvsdmc_nvram_adrm^vsdmc_log_initializedP]]x^]i_sdmcGetNvramAdrxeToffset],^^]sdmcInitNandLog݃8^`^^]sdmcGetNandLogFatal `^x^]sdmcSetNandLogFatal9x^^?^]i_sdmcCheckReadyNvram?Uwait_msC^TresultBiAstatusReg^4_l^]sdmcFlushNandLogd__^]i_sdmcGetNvram(kVparam_`]i_sdmcSetParityxQparityPi`H`^]i_sdmcCheckParityʅQparityPi)H`Ladrnand_aes.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\%^vFATFSi_nandaes_drive_noH``?^]FATFSi_nandAesRtfsIoj?^Pdriveno?Tblock?Pbuffer?Pcount?^readingB'<SdResultAPresult`Lad^]FATFSi_nandAesRtfsAttachd^Tdrivenod^Upartition_nog.pdrf^PresultLac=fatfs_resource.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\*ˆvFATFSiHandleManager2ӈ2FATFSHandleManager qfile_table `ddirectory_table 2^filesInUse 2^directoriesInUseӈFATFSHandleManager` FATFSFile id drive busy ^fd  modeFATFSFileOSMountPermissionOS_MOUNT_USR_XOS_MOUNT_USR_WOS_MOUNT_USR_R2uPFATFSDirectory id drive busy valid shortonly xstatus LscfuFATFSDirectory ӈӈӈuӈuuӈuuӈLaa9]FATFSi_InitHandleManagerHPQbaseHSbase@Bbuffer?Tunique=^Qia(bcS]FATFSi_ConvertHandleToFileӌcPhandleiPactualhYPmanagere_Sretval(bxb}e]FATFSi_AllocFileM^SikRmanagerQcpsrqTretvalxbb]FATFSi_FreeFilewPfile}Pmanagerbb^]FATFSi_GetCurrentFileHandles؍b c]FATFSi_ConvertHandleToDirectoryhPhandlePactualPmanagerSretval cpc]FATFSi_AllocDirectory^SiRmanagerWcpsrTretvalpcc]FATFSi_FreeDirectory?PdirPmanagercc^]FATFSi_GetCurrentDirectoryHandles{Lc-_fatfs_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\y^FATFSiOnceAccessedSDCard wtable ^ĩindexv^ȩFATFSiNowOnHeavyCommandmӒFATFSiSpecialDrivesqJ̩FATFSiLetterToHandle8[FATFSiComanndFunctionTable table ȓ4workٓ@ FATFSiUnicodePathBuffer}TOSMountInfo drive device target partitionIndex resource userPermission rsv_A rsv_B archiveName ’path}OSMountInfo2@2? FATFSiSpecialDriveInfo ^index DfileFATFSiSpecialDriveInfohl r ^rtfsErr fatfsErr l5222222uu@enumFATFS_OPTYPE_CREATIONFATFS_OPTYPE_DELETIONFATFS_OPTYPE_RENAMINGFATFS_OPTYPE_GETTERFATFS_OPTYPE_SETTERFATFS_OPTYPE_FILECTRLFATFS_OPTYPE_DIRCTRL@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTPFATFSCommandHeader command result flags їnextPFATFSCommandHeaderP2A2@22P {(FATFSCommandMountDrive Pheader media ^partition name{FATFSCommandMountDrive2 : FATFSCommandUnmountDrive Pheader name:FATFSCommandUnmountDrive2 ә$FATFSCommandFormatDrive Pheader Oname formatMediaәFATFSCommandFormatDrive2 \FATFSCommandCheckDisk Pheader =name verbose $fix_problems (write_chains ,NinfoFATFSCommandCheckDisk20FATFSDiskInfo n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters n_file_clusters n_hidden_clusters n_dir_clusters n_crossed_points $n_lost_chains (n_lost_clusters ,n_bad_lfnsNFATFSDiskInfo.ޜ4FATFSDriveResource ZtotalSize ZavailableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClusters 0fatBitsޜFATFSDriveResource lTFATFSCommandGetDriveResource Pheader name resourcelFATFSCommandGetDriveResource24ޜ 4 FATFSCommandSetDefaultDrive Pheader name4FATFSCommandSetDefaultDrive20+͟0FATFSFileInfoW shortname longname padding length dos_atime $dos_mtime (dos_ctime ,attributes͟FATFSFileInfoW2 ٠pFATFSCommandGetFileInfoW Pheader epath <vpadding @͟info٠FATFSCommandGetFileInfoW,pFATFSCommandSetFileInfoW Pheader %path <6padding @͟infoFATFSCommandSetFileInfoW,2_TFATFSCommandCreateFileW Pheader ^trunc permit $path P padding_FATFSCommandCreateFileW2,C@FATFSCommandDeleteFileW Pheader path <̣paddingCFATFSCommandDeleteFileW,hFATFSCommandRenameFileW Pheader mpath <~newpathFATFSCommandRenameFileW,,PFATFSCommandCreateDirectoryW Pheader 7permit Hpath LYpaddingFATFSCommandCreateDirectoryW2,|@FATFSCommandDeleteDirectoryW Pheader path <padding|FATFSCommandDeleteDirectoryW,8hFATFSCommandRenameDirectoryW Pheader path <˦newpath8FATFSCommandRenameDirectoryW,,0+2 TFATFSCommandOpenFileW Pheader handle mode $path Pǧpadding FATFSCommandOpenFileW2,FATFSCommandCloseFile Pheader handleFATFSCommandCloseFilek-iFATFSCommandReadFile Pheader handle buffer ^lengthiFATFSCommandReadFile0+k-FATFSCommandWriteFile Pheader handle buffer ^lengthFATFSCommandWriteFileFATFSCommandSetSeekCache Pheader handle buf buf_sizeFATFSCommandSetSeekCache0+kFATFSCommandSeekFile Pheader handle ^offset originkFATFSCommandSeekFileFATFSCommandFlushFile Pheader handleFATFSCommandFlushFile0+FATFSCommandGetFileLength Pheader handle lengthFATFSCommandGetFileLength.0+.FATFSCommandSetFileLength Pheader handle length.FATFSCommandSetFileLengthuìTFATFSCommandOpenDirectoryW Pheader handle gmode $xpath PpaddingìFATFSCommandOpenDirectoryW2,uFATFSCommandCloseDirectory Pheader handleFATFSCommandCloseDirectoryu)DFATFSCommandReadDirectoryW Pheader handle ͟info)FATFSCommandReadDirectoryW}ɮFATFSCommandFlushAll PheaderɮFATFSCommandFlushAll}&FATFSCommandUnmountAll Pheader&FATFSCommandUnmountAll0+" }}د,FATFSCommandMountSpecial Pheader Zparam ^slot earcnameدFATFSCommandMountSpecial2 FATFSCommandSetNdmaParameters Pheader ndmaNo blockWord intervalTimer prescalerFATFSCommandSetNdmaParameters} e4FATFSCommandFormatSpecial Pheader path &padding ,ZdataeFATFSCommandFormatSpecial2!FATFSCommandSetLatencyEmulation Pheader enable!FATFSCommandSetLatencyEmulation222R(uܲFATFSCommandSearchWildcard Pheader directory prefix suffix #γbuffer ߳paddingܲFATFSCommandSearchWildcard 2220+@2}2222222 2 c d^]FATFSi_UnpackAsciiToUnicodePdstPsrc^Plen^Pi dRd^]FATFSi_CompareNIStringSs1 Qs2^Rn^Pc2^Vc1^Ui^PdiffTdd^]FATFSi_IsShareArchiveNameUarcnamede]FATFSi_GetLauncherInfoTable9 Sac8 Pw7 Pr+ Pw* Pr$^Vie f~]FATFSi_AbortHeavyCommandʶTbak f|f]FATFSi_CheckHeavyCommandBegin,UdriveTlengthff]FATFSi_CheckHeavyCommandEndwUdrivef|g]FATFSi_EnumPublicArchivesUdst%Parcname^Wi^Tbootlen^bootdriveFoundgg^]FATFSi_IsMediaProtectedTdrive$+path^Pprotectedgh?^]FATFSi_IsValidDrive(?Wdrive? Upermit?<TresultL PtargetPermitA^VretvalhDh^]FATFSi_IsMediaFatalkTdriveDh|hhB]FATFSi_GetValidFileHandlehPhandlei VpermitjHUresultlNTfile|hhT]FATFSi_GetValidDirectoryHandle}Phandle VpermitZUresult`Tdirhpi^]FATFSi_VerifyCommandResultk^VexprTdrivefUtype2result^Ti8sd_statɕsd_error^VerrorPretvalpil]FATFSi_ResolveIPLPathO>UdstDTsrc permit^ignorePermissionJheader^Pindex^Pdstpos^Psrcpos^Plen2ח(src2^,rooti^Pindex`ݗtmpC^0n@Pbase3 PspecialPermission2special^ParcnameLen8arcname4drivelmy^]FATFSi_CompareUnicodeStringzPsrczPpatternmJm+^]FATFSi_CopyLUnicodeString),"Pdst,(Psrc,^Plen.^SiLmm.]FATFSi_NormalizePath4Vpath:Wpdrive Rpermit@Uheader^RiFPdstVdrivemme]FATFSi_RegisterDriveFile<e^PdriveeLPfilemnv]FATFSi_UnregisterDriveFilev^Pdrivenn]FATFSi_CommandMountDrive{RUarg XPfile^Pattach_result^Tletter^Vpartition^PnamedtmparcdriveuPpacketno*]FATFSi_CommandUnmountDrive+*Targ4^Uletter/Pname.#tmparc-drive,4Ppacket ooR]FATFSi_CommandFormatDriveRUarg[ geometryVPnameUtmparcT͙Ppacketoo]FATFSi_CommandCheckDiskK`UargfPnameltmparc}Ppacketop]FATFSi_CommandGetDriveResource9̜VargZPPbytesPerClusterҜPpdrive؜UresourceOPnameUtmparcdrivefPpacketpp]FATFSi_CommandSetDefaultDriveTargPnametmparc.Ppacketpq]FATFSi_CommandGetFileInfomVargstatǟTinfo͠PpathdriveӠPpacketq@r$]FATFSi_CommandSetFileInfoe$Uarg9^PmodifyMtime8-st_mtime7Pmask3^Presult-attributes(Wpath'drive&Ppacket@rrT]FATFSi_CommandCreateFileETGVarg`^Tfd_Upermit_flags^Taccess_flags]MRpermitXSpathWdriveVYPpacketrs]FATFSi_CommandDeleteFile1Uarg7Ppathdrive=Ppackets\s]FATFSi_CommandRenameFileaݣUargPnewpathPpathdrivePpacket\ss]FATFSi_CommandCreateDirectoryUargPpathdrivePpacketss]FATFSi_CommandDeleteDirectoryqjUargpPpathdrivevPpackets t]FATFSi_CommandRenameDirectory Uarg&Pnewpath,Ppathdrive2Ppacket t@u]FATFSi_CommandOpenFileܦWargSstatCUfileVaccess_flagsPpathdrive TpermitPmodePpacket@uuw]FATFSi_CommandCloseFilegwاUargzާTfileyPpacketu|v]FATFSi_CommandReadFilerKUargPlimit^Plen^readedTposQsrc^Palign4^ drivenoWpc]VfilecPpacket|vw]FATFSi_CommandWriteFileUargPlimit^Plen^writtenPrestPcurrentstatVposdst^Palign4^ driveno pcTfilePpacketwx8]FATFSi_CommandSetSeekCacheA8Uarg<Pfile;Ppacket:^PresultxxV]FATFSi_CommandSeekFileVHUargkPcurrenthPpositiongWlengthaNstat`VoffsetY_TfileXePpacketxx]FATFSi_CommandFlushFileTargPfilePpacketxy]FATFSi_CommandGetFileLength eTargkstat|UfilePpacketyFz]FATFSi_CommandSetFileLengthUargcurWorg Pp posVdstsrcstat"Tfile(PpacketHz,{* ]FATFSi_CommandOpenDirectory* Uarg; ^Vopendir4 Tdir/ Wpath. drive- ^Pshortonly, Ppacket,{l{d ]FATFSi_CommandCloseDirectory3d Uargg Tdirf Ppacketl{X| ]FATFSi_CommandReadDirectory Uarg Tdir #PpacketX|| ^]FATFSi_CommandFlushAllCore ^Tdrive path|Z} ]FATFSi_CommandFlushAll Uarg ^Pdrive ^Pdrive ^Pdrive ^Pdrive ^Pdrive_num ^Ti Vtable îPpacket\}|~< ]FATFSi_CommandUnmountAll< Vargz ^Udrivek ^drive\ ^driveM ^drive@ ^Pdrive_num@ ^Ui? Ttable>  Ppacket|~h ]FATFSi_CommandMountSpecial uTargP {next Dthread Jcommand result PreservedFATFSResultBufferSP,x,FATFSRequestContext +wait_q <done_list Bbuffer_mutex $Sbuffer_normal (Ybuffer_emergencyxFATFSRequestContextPPPPPP2FATFSCommandInitialize Pheader nunicode2sjis_array tsjis2unicode_array zarclistFATFSCommandInitialize2̉]FATFSi_InitRequest]FATFSi_SendToPXIpPargHv]FATFSi_AllocateCommandBufferNUcommand|PheaderXxU]FATFSi_FreeCommandBufferUPbufferx]FATFSi_NotifyRequestCompletionDxTargQqqRp^PfoundPheaderzUbak_cpsrX]FATFSi_WaitForRequestUargPppVbak_cpsr^TbusyPtargeth]FATFSi_SyncInitialization4UarclistPargCfatfs_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\*FATFSiThread  FATFSThreadContext xtask_list ~thread stackFATFSThreadContextPS PPP:]FATFSi_AppendRequest@:Utarget:^TisARM9=Qpp<Vbak_cpsrV]FATFSi_CommandThread^Wbak_cpsrYTsync9_headerX^Vsync7]FATFSi_PostRequestParg]FATFSi_PXICallback7Pdata]FATFSi_InitThread{Ppriorityfatfs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\,FATFSFileInfo shortname longname #padding length dos_atime dos_mtime $dos_ctime (attributes%FATFSFileInfo2222{2 o]FATFSi_CopyUnicodeStringoPdstoPsrco^Plenq^TiP"^]FATFS_MountDrivee"4name"Vmedia"Wpartition%:Targ$^Pretval`^]FATFS_CloseFileUfile@Targ^PretvalI]FATFS_OpenFileWBIFUpathILVmodeLRPargKUretval6 aes_lo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\x8HspCallbackyULsCallbackParamiDMA_CONFIG>argOa AESNonce bytes wordsaAESNonce   0SAESMacLengthAES_MAC_LENGTH_4AES_MAC_LENGTH_6AES_MAC_LENGTH_8AES_MAC_LENGTH_10AES_MAC_LENGTH_12AES_MAC_LENGTH_14AES_MAC_LENGTH_16AES_MAC_LENGTH_MAXAESMac bytes wordsAESMacAESKey jbytes {words AESKeyId AESKey AESKeySeed  AESKeySlotAES_KEY_SLOT_AAES_KEY_SLOT_BAES_KEY_SLOT_CAES_KEY_SLOT_D  AESModeAES_MODE_CCM_DECRYPTAES_MODE_CCM_ENCRYPTAES_MODE_CTRAES_MODE_CTR_ENCRYPTAES_MODE_CTR_DECRYPT>]AES_Reset]AESi_InterruptHandler#]AES_SetNonce`[PpNonce]AES_SetCounterPpCounter\]AES_SetMacPlengthPpMacPreg\t#]AES_SetKeyC;#PpKeytM]AES_SetKeySeedAyMPpKey`]AES_LoadKey`PslotgPregԕ]AES_WaitKeyԕ]AES_DmaSenduPdmaNoPsrcPsizePcallbackarg]AES_DmaRecvPdmaNo#PdstPsize)Pcallback/arg$0]AES_Send6Pdata0<]AES_RecvY<T^]AES_IsIFifoFullT,]AES_Run%,5Pmode,PaBlockNum,PpBlockNum,Pcallback,arg?Pregf]AES_WaitHz^]AES_IsVerificationSuccess|aes_hi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ZPsMacSize[TsFractionSizeTXsDmaNoForSendU\sDmaNoForRecvX`sSrcSizeYdsDstSizeksNextSlot\spSrc]hspDst_lsFraction^0S|sCounteri0SsRandCountergsMutexcoFsThreadQbSsThreaddxsThreadQBuffere,xsThreadStack&?8ThreadOpOP_PXI_SET_KEYOP_PXI_INIT_RANDOP_PXI_RANDOP_PXI_CTROP_PXI_CCM_ENCRYPTOP_PXI_CCM_DECRYPTOP_PXI_FOR_JPEGOP_PXI_CALC_MAC OP_CB_DMA_SEND_FINISHED OP_CB_AES_FINISHED OP_CB_AES_CTR_CONTINUE OP_CB_AES_CCM_ENC_FINISHEDOP_CB_AES_CCM_DEC_FINISHED0SAESResultAES_RESULT_NONEAES_RESULT_SUCCESSAES_RESULT_VERIFICATION_FAILEDAES_RESULT_INVALIDAES_RESULT_BUSYAES_RESULT_ON_DSAES_RESULT_UNKNOWNAES_RESULT_MAX$AESPxiData skey src srcASize srcPSize macLength dstAESPxiDataAESPxiKey key 0Scounter anonceRomAccessControl common_client_key hw_aes_slot_B hw_aes_slot_C sd_card_access nand_access game_card_on shared2_file hw_aes_slot_B_SignJPEGForLauncher game_card_nitro_mode hw_aes_slot_A_SSLClientCert hw_aes_slot_B_SignJPEGForUser photo_access_read photo_access_write sdmc_access_read sdmc_access_write backup_access_read backup_access_write common_client_key_for_debugger_sysmenuRomAccessControl(]SetupDefaultFraction^=PpDataPdataSize^Ui(^]StepSubKeyCPp`| ]ExclusiveOrAesBlock IPa OPb^Ui|U]CallbackSendMessage4UUParg0n]AesRunko[UsrcpQsrcASizeqPsrcPCSizeraWdsts5 aesModetg$finishMsg{pBlockNumzaBlockNumyTdmaRecvSizexPdmaSendSizewPdstSizevPsrcSize0Ę]CtrRunVpCounterUsrcPsrcSizeWdstĘ0^]IsValidAddressB0Pptr0Plength2PaddrR]AesThread5Tresult)^Ui(pwvr_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\ state aid / macAdrs rssi capaInfo authSeed supRateSet rsv lastSeqCtrl frameCount lifeTime maxLifeTime WlStaElementWmInit dmaNo indPrio_low indPrio_high reqPrio_low reqPrio_high wlPrio_low wlPrio_high@ WmInit4 workingMemAdrs  stack stacksize priority 1 sendMsgQueuep 1 recvMsgQueuep dmaChannel dmaMaxSize heapType $7 heapFunc , camAdrs 0camSize WlInitoF _ os ext Oid ^heapHandle alloc  free   WMCallback apiid errcode wlCmdID wlResult WMCallbackWMSPWork oFtoWLmsgQ toWLmsg (oFfromWLmsgQ HfromWLmsg XoFconfirmQ xconfirm oFrequestQ request (requestStack (,indicateStack (fifoExclusive @dmaNo DOarenaId H^heapHandle L=wm7buf P]+status Tc+rssiHistory trssiIndex xindPrio_high |wlPrio_high reqPrio_high indPrio_low wlPrio_low reqPrio_low wmInitializedVWMSPWorkCWMArm7Buf status *+reserved_a  fifo7to9 ;+reserved_b $connectPInfo L+requestBufCWMarm7BufCWMArm7BufWMStatus state BusyApiid ^apiBusy ^scan_continue ^mp_flag ^dcf_flag ^ks_flag ^dcf_sendFlag ^VSyncFlag ^wlVersion (macVersion *rfVersion ,obbpVersion 0mp_parentSize 2mp_childSize 4mp_parentMaxSize 6mp_childMaxSize 8mp_sendSize :mp_recvSize <mp_maxSendSize >mp_maxRecvSize @mp_parentVCount Bmp_childVCount Dmp_parentInterval Fmp_childInterval HZmp_parentIntervalTick PZmp_childIntervalTick Xmp_minFreq Zmp_freq \mp_maxFreq ^mp_vsyncOrderedFlag `mp_vsyncFlag bfmp_count dfmp_limitCount fmp_resumeFlag hmp_prevPollBitmap jmp_prevWmHeader lmp_prevTxop nmp_prevDataLength pmp_recvBufSel rmp_recvBufSize tmp_recvBuf | mp_sendBuf mp_sendBufSize mp_ackTime mp_waitAckFlag mp_readyBitmap mp_newFrameFlag reserved_b mp_sentDataFlag mp_bufferEmptyFlag mp_isPolledFlag mp_minPollBmpMode mp_singlePacketMode reserved_c mp_defaultRetryCount mp_ignoreFatalErrorMode mp_ignoreSizePrecheckMode mp_pingFlag mp_pingCounter dcf_destAdr dcf_sendData dcf_sendSize dcf_recvBufSel dcf_recvBuf dcf_recvBufSize curr_tgid linkLevel minRssi rssiCounter beaconIndicateFlag wepKeyId pwrMgtMode miscFlags VSyncBitmap valarm_queuedFlag v_tsf v_tsf_bak v_remain valarm_counter f"reserved_e w"MacAddress mode "pparam (q$childMacAddress child_bitmap $pInfoBuf aid (parentMacAddress scan_channel  )reserved_f wepMode ^wep_flag )wepKey rate preamble tmptt retryLimit enableChannel allowedChannel ,)portSeqNo N)sendQueueData *sendQueueFreeList *sendQueue *readyQueue sendQueueMutex 4^sendQueueInUse 8+mp_lastRecvTick Zmp_lifeTimeTick mp_current_minFreq mp_current_freq mp_current_maxFreq mp_current_minPollBmpMode mp_current_singlePacketMode mp_current_defaultRetryCount mp_current_ignoreFatalErrorMode +reserved_gWMStatusWMstatus6WMMpRecvBuf  rsv1 length # rsv2 ackTimeStamp timeStamp rate_rssi 4 rsv3 E rsv4 V destAdrs g srcAdrs $x rsv5 *seqCtrl ,txop .bitmap 0wmHeader 2 dataWMmpRecvBufWMMpRecvBuf  0WMDcfRecvBuf frameID !rsv1 length "rsv2 rate_rssi "rsv3 ""destAdrs 3"srcAdrs $D"rsv4 ,U"data WMDcfRecvBuf WMdcfRecvBuf@WMParentParam userGameInfo userGameInfoLength padding ggid tgid entryFlag maxEntry multiBootFlag KS_Flag CS_Flag beaconPeriod >$rsv1 "O$rsv2 2channel 4parentMaxSize 6childMaxSize 8`$rsv"WMpparam"WMParentParamZ$$WMBssDesc length rssi #&bssid ssidLength 4&ssid ,capaInfo .E&rateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @t&gameInfo$WMbssDesc$WMBssDesc  basic supportWMGameInfo magicNumber ver platform ggid tgid userGameInfoLength '__anon gameNameCount_attribute attribute parentMaxSize childMaxSize 8(__anon o(userGameInfo (old_typet&WMGameInfot&WMgameInfo gameNameCount_attribute attributep o(userGameInfo (old_typep7p (userName (gameName (padd1X+P'=)x*  next port destBitmap restBitmap sentBitmap sendingBitmap padding size seqNo retryCount  data *callback  arg_)WMPortSendQueueData*  head tail*WMPortSendQueue**Z ]WVR_Shutdown+8||wmsp_system.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMIndCallback apiid errcode state reason6,WMindCallback6,WMIndCallback WMMpRecvData length rate_rssi aid noResponse wmHeader y-cdata,WMmpRecvData,WMMpRecvDataWMMpRecvHeader bitmap errBitmap count length txCount C.data-WMmpRecvHeader-WMMpRecvHeader , 0wlRsv @0header R0staMacAdrs retryLimit enableChannel rsv mode rate wepMode "wepKeyId $c0wepKey tbeaconType vprobeRes xbeaconLostTh zactiveZoneTime |0ssidMask preambleType authAlgoT.WlParamSetAllReq  code length0WlCmdHeaderPt0   @0header resultCode0WlParamSetCfm8||@]WMSP_GetAllowedChannel1@PbitFieldgUiETcenterDSminCRmaxBPtempwmsp_indicate.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ m2wlRsv @0header ~2buf2WlCmdReq @ 2wlRsv @0header 4ack2WlMaMpAckInd 0 44rsv1 length txKeySts rsv3 timeStamp rate rssi E4rsv4 V4rsv5 g4destAdrs x4srcAdrs $4rsv6 *seqCtrl ,tmptt .bitmap2WlRxMpAckFrame;wmsp_wl_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ @0header resultCode95WlMlmeResetCfm 5wlRsv @0header mib5WlMlmeResetReq  @0header resultCode5WlMlmePowerManagementCfm5WlMlmePowerMgtCfm 6wlRsv @0header pwrMgtMode wakeUp recieveDtimsP6WlMlmePowerManagementReqP6WlMlmePowerMgtReq N @0header resultCode foundMap bssDescCount 7bssDescList 7WlMlmeScanCfmD;9D length rssi K9bssid ssidLength \9ssid ,capaInfo .m9rateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @9__anon @9gameInfo @9otherElement7WlBssDesc  basic support_element 9gameInfo 9otherElementT :wlRsv @0header  ;bssid ssidLength ;ssid 8scanType :.;channelList JmaxChannelTime LbssidMaskCount N?;bssidMask9WlMlmeScanReq   @0header resultCode statusCode ;peerMacAdrsP;WlMlmeJoinCfmX V<wlRsv @0header timeOut rsv ;9bssDesc;WlMlmeJoinReq  @0header resultCode statusCode =peerMacAdrs algorithmg<WlMlmeAuthenticateCfmg<WlMlmeAuthCfm =wlRsv @0header =peerMacAdrs algorithm timeOut#=WlMlmeAuthenticateReq#=WlMlmeAuthReq   @0header resultCode h>peerMacAdrs=WlMlmeDeAuthCfm=WlMlmeDeAuthenticateCfm ?wlRsv @0header ?peerMacAdrs reasonCodey>WlMlmeDeAuthReqy>WlMlmeDeAuthenticateReq   @0header resultCode statusCode aid.?WlMlmeAssCfm.?WlMlmeAssociateCfm Z@wlRsv @0header k@peerMacAdrs listenInterval timeOut?WlMlmeAssReq?WlMlmeAssociateReq   @0header resultCode statusCode aid|@WlMlmeReAssociateCfm|@WlMlmeReAssCfm AwlRsv @0header AnewApMacAdrs listenInterval timeOutAWlMlmeReAssociateReqAWlMlmeReAssReq  @0header resultCodeAWlMlmeDisAssociateCfmAWlMlmeDisAssCfm BwlRsv @0header BpeerMacAdrs reasonCode8BWlMlmeDisAssociateReq8BWlMlmeDisAssReq  @0header resultCodeBWlMlmeStartCfm@ ODwlRsv @0header ssidLength `Dssid 2beaconPeriod 4dtimPeriod 6channel 8basicRateSet :supportRateSet <gameInfoLength >qDgameInfo3CWlMlmeStartReq  ( @0header resultCode reserved EccaBusyInfoDWlMlmeMeasChanCfmDWlMlmeMeasureChannelCfm ( FwlRsv @0header rsv ccaMode edThreshold measureTime FchannelList+EWlMlmeMeasChanReq+EWlMlmeMeasureChannelReq  @0header resultCode txStatus"FWlMaDataCfm0 frameId Grsv1 length status rsvm1 rsvm2 rate rssi rsvm3 Grsv4 GdestAdrs GsrcAdrs $Grsv5 ,Gdatap}FWlTxFrame@ PHwlRsv @0header GframeGWlMaDataReq  @0header resultCodeaHWlMaKeyDataCfm ,IwlRsv @0header length wmHeader GkeyDatapHWlMaKeyDataReq  @0header resultCode=IWlMaMpCfm$ }JwlRsv @0header resume retryLimit txop pollBitmap tmptt currTsf dataLength wmHeader GdatapIWlMaMpReq  @0header resultCodeJWlMaClearDataCfmJWlMaClrDataCfm YKwlRsv @0header flagJWlMaClearDataReqJWlMaClrDataReq  KwlRsv @0header KstaMacAdrsjKWlParamSetMacAdrsReqjKWlParamSetMacAddressReq  oLwlRsv @0header retryLimit LWlParamSetRetryLimitReq  LwlRsv @0header enableChannelLWlParamSetEnableChannelReq  SMwlRsv @0header modeLWlParamSetModeReq  MwlRsv @0header ratedMWlParamSetRateReq  +NwlRsv @0header wepModeMWlParamSetWepModeReq  NwlRsv @0header wepKeyIdjwlVersion macVersion OjbbpVersion rfVersion{iWlDevGetVerInfoCfm{iWlDevGetVersionCfm @0header resultCode rsv1 /kcounter`jWlDevGetWirelessCounterCfm`jWlDevGetInfoCfm ?ktx krx dWmmultiPolljWlCounter  success failed retry ackErr unicast multicast wep beaconD rts fragment unicast multicast wep beacon fcsErr duplicateErr mpDuplicateErr $icvErr (fcErr ,lengthErr 0plcpErr 4bufOvfErr 8pathErr <rateErr @fcsOkP txMp txKey txNull rxMp rxMpAck mkeyResponseErr< @0header resultCode statemWlDevGetStateCfmmWlDevGetStationStateCfm @0header resultCodefnWlDevTestSignalCfm IowlRsv @0header control signal rate channelnWlDevTestSignalReq  @0header resultCodeZoWlDevTestRxCfm pwlRsv @0header control channeloWlDevTestRxReq   @0header resultCode spbuf pWlCmdCfmreq_StartParent.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\0WMStartParentCallback apiid errcode wlCmdID wlResult state \rmacAddress aid reason mrssid ,parentSize .childSize#qWMstartParentCallback#qWMStartParentCallbackreq_StartScan.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartScanCallback apiid errcode wlCmdID wlResult state ptmacAddress channel linkLevel ssidLength tssid 6gameInfoLength 8t&gameInfosWMStartScanCallbacksWMstartScanCallback WMStartScanReq apiid channel >uscanBuf maxChannelTime DubssidtWMStartScanReqtWMstartScanReq$pWMStartScanExCallback apiid errcode wlCmdID wlResult state channelList vreserved bssDescCount vbssDesc PvlinkLevelUuWMStartScanExCallbackUuWMstartScanExCallback@>u <WMStartScanExReq apiid channelList >uscanBuf scanBufSize maxChannelTime wbssid scanType ssidLength xssid 6ssidMatchLength 8xrsvvWMStartScanExReqvWMstartScanExReq req_StartConnect.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartConnectCallback apiid errcode wlCmdID wlResult state aid reason wlStatus zmacAddress parentSize childSizexWMstartConnectCallbackxWMStartConnectCallback(WMStartConnectReq apiid reserved zpInfo zssid ^powerSave $reserved2 &authModezWMStartConnectReqzWMstartConnectReq$[req_Disconnect.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMDisconnectCallback apiid errcode wlCmdID wlResult tryBitmap disconnectedBitmap{WMDisconnectCallbackreq_StartMP.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\$WMStartMPCallback apiid errcode state `~reserved q~recvBuf timeStamp rate_rssi w~destAdrs ~srcAdrs seqNum tmptt pollbmp "reserved2}WMStartMPCallback}WMstartMPCallbackWMMPTmpParam mask minFrequency frequency maxFrequency defaultRetryCount minPollBmpMode singlePacketMode ignoreFatalErrorMode reserved~WMMPTmpParamWMMPParam mask minFrequency frequency maxFrequency parentSize childSize parentInterval childInterval parentVCount childVCount defaultRetryCount minPollBmpMode singlePacketMode ignoreFatalErrorMode ignoreSizePrecheckModeWMMPParam@WMStartMPReq apiid rsv1 FrecvBuf recvBufSize FsendBuf sendBufSize param 0~tmpParamuWMStartMPReqreq_SetMPData.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\(WMPortSendCallback apiid errcode wlCmdID wlResult state port destBitmap restBitmap sentBitmap rsv data __anon size length seqNo callback arg $maxSendDataSize &maxRecvDataSizeWMPortSendCallback size lengthareq_StartDCF.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStartDCFCallback apiid errcode state Greserved XrecvBufWMStartDCFCallbackWMstartDCFCallback Zreq_StartTestMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartTestModeCallback apiid errcode RFadr5 RFadr6 PllLockCheck RFMDflagWMStartTestModeCallback<req_MeasureChannel.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMMeasureChannelCallback apiid errcode wlCmdID wlResult channel ccaBusyRatio^WMmeasureChannelCallback^WMMeasureChannelCallback WMMeasureChannelReq apiid ccaMode edThreshold channel measureTime>WMMeasureChannelReq>WMmeasureChannelReqvreq_GetWirelessCounter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMGetWirelessCounterCallback apiid errcode wlCmdID wlResult TX_Success TX_Failed TX_Retry TX_AckError TX_Unicast TX_Multicast TX_WEP $TX_Beacon (RX_RTS ,RX_Fragment 0RX_Unicast 4RX_Multicast 8RX_WEP <RX_Beacon @RX_FCSError DRX_DuplicateError HRX_MPDuplicateError LRX_ICVError PRX_FrameCtrlError TRX_LengthError XRX_PLCPError \RX_BufferOverflowError `RX_PathError dRX_RateError hRX_FCSOK lTX_MP pTX_KeyData tTX_NullKey xRX_MP |RX_MPACK eMPKeyResponseErrorWMgetWirelessCounterCallbackWMGetWirelessCounterCallback<vwmsp_port.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\DWMPortRecvCallback apiid errcode state port ȐrecvBuf data length aid ΐmacAddress seqNo arg myAid "connectedAidBitmap $ߐssid <reason >rssi @maxSendDataSize BmaxRecvDataSizeWMPortRecvCallback-req_SetMPParameter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\$WMSetMPParameterCallback apiid errcode mask oldParamWMSetMPParameterCallback,req_StopTestRxMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStopTestRxModeCallback apiid errcode fcsOk fcsErrÒWMStopTestRxModeCallback$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\code16.hcodereset.hcode32.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcommand-line defines)initScfg.cP8%2  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\ARM7.TWL\src\code32.hcodereset.hcode32.hboot_sync.hversion.hformat_rom_certificate.hformat_rom.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcrt0.hstdarg.ARM.hva_list.h ansi_parms.h cstdarg stdarg.h file_struc.h eof.h null.h wchar_t.h size_t.h stdio_api.h msl_rsize_t.h msl_lib_ext1.h cstdio os_enum.h ansi_prefix.ARM.hmslGlobals.h msl_c_version.h stdio.h printf.h emulator.h armArch.h command-line defines) crt0.LTD.c 58  $5<8585h85l85p858585x858%# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmain_end.hsection.hmain_begin.hltdmain_end.hltdmain_begin.htwl.htwl_sp.hspi_sp.htypes.hnvram_sp.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htypes.hhi.h aes.hsndex_api.h pm.h spi.h type.h config.h spi.hcdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hcodecmode.hgx.hlcd.hrtc.hsnd.hstd.hpad.hfatfs.hspi.hmemorymap.hmemorymap_sp.hownerInfo.hmmap_shared.hspec.hownerInfoEx.hgenPort.hexi.hdsp.hcontrol.htypes.hi2c.hemulator.hutil.hfifo.hcamera.hmmap_wram.hmmap_wramEnv.hsystem.hscfg_private.hscfg.hscfg.hnwm_sp.hwm.hnwm.hnwm.hmisc.hdgt.hcrc.hchecksum.hfx.hfft.hmath.hqsort.hrand.hmath.hpxi.hos.hmi.hmemorymap.hctrdg_sp.hctrdg_task.hctrdg_sram.hctrdg_flash.hnitro.hctrdg_backup.hctrdg_common.hctrdg.hwvr_sp.hwvr_common.hwvr.hWlParam.h WlStaList.h WlCmdLabel.h WlBuf.h WlFrame.h WlCmd.h WlLib.h version_wl.h!twl_hybrid.hwm_sp.h"wm.h#gx_sp.h$types.h%command.h&api.h%thread.hsystemWork.hstdlib.h'unicode.h'memory.h(string.h'overlay.h)romfat.h)file.h)archive.h)api.h)hook.h)rom.h*types.h)fs.hpullOut.h*device.h(types.h*hash.h*exMemory.h(dma.h(backup.h*fram.h*flash.h*eeprom.h*common.h*card.hsndex_common.h+util.h,exchannel.h,channel.h,midiplayer.h,seq.h,mml.h,data.h,bank.h,capture.h,alarm.h,mmap_global.hioreg_SND.h-mmap_global.h-armArch.hwork.h,global.h,command.h,main.h,snd.htype_ex.h.instruction_ex.h/fifo_ex.h.gpio.h0type.h1instruction.h0control.h0fifo.h1rtc.hshutdown.h2fifo.h3pm_common.h4ioreg_PAD.hpm_common.h ioreg_SPI.hmic_common.h4xyButton.h5ioreg_PAD.h-pad.h6sharedWram.h7dma.h7mi.hos.hlimits_api.h8ansi_parms.h8climits8limits.h8armArch.hcrt0.h9application_jump.hprofile.hfunctionCost.hcallTrace.hvalarm.harena.halarm.hresource.hspinLock.hsystemWork.hentropy.hgxcommon.h$userInfo_ts_300.h spec.hregname.h3platform.hcache.h(endian.h(init.h(compress.h(uncomp_stream.h(stream.h(byteAccess.h(secureUncompress.h(uncompress.h(swap.h(wram.h(compparam.h3init.h3pxi.hreset.htick.halloc.hinit.hexception.hmutex.hmessage.hprintf.hsystemCall.htimer.hcontext.hevent.hinterrupt.hinterrupt.hsystem.hversion.hsystemCall.hstdarg.ARM.h:va_list.h8cstdarg8stdarg.h8file_struc.h8eof.h8null.h8wchar_t.h8size_t.h8stdio_api.h8msl_rsize_t.h8msl_lib_ext1.h8cstdio8os_enum.h8ansi_prefix.ARM.h:mslGlobals.h8msl_c_version.h8stdio.h8ioreg_SD.hioreg_OS.hioreg_PXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hmmap_parameter.hmmap_main.hcommand-line defines);main.c<|nn||B|| ||+'+'||v||| |'{{ '~+~.+~ # v |v|v |0|&\|z||pr& |;n& z |ye D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7.TWL\src\ioreg_OS.hmmap_global.hsystem.hthread.hinterrupt.htypes.hcode32.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5memorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_irqHandler.c7 |.  | |U D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_irqTable.c7 | |"8|D|P|\|h|t|||||" ||||d D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ltdmain_end.hsection.hltdmain_begin.hsystem.hinterrupt.harmArch.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hthread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.h scfg_private.h2misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_interrupt.c7|)|<!t["X,T. | {{q|V ||" |<|L|l||||||P D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_pxi.c7<|%H|6T|`|| v| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_spinLock.c7|~ w ww ~8| t|R|#/ |+#x| |"|"|||d|2 D:\Program Files\INTELLIGENT SYSTEMS\IS-TWL-DEBUGGER\Target\include\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\istdbglibpriv.histmidi.histdfio.histdsio.histdhio.histdprint.histdbglib.hdbghost.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7os_printf.c8|"z D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hmi.hos.hmemorymap.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_thread.c7|z |a"8|T|}|}~|T| t  z{p ! |  z w|{ uz|} w l ~ ||#}@|p| /| }| }3z L| l| ~| }#| | #~~ p| | | ~|'|~{ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hmemorymap.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_context.c7|*p||U D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\mmap_wramEnv.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_emulator.c7|'  |<|  ||#T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\message.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_message.c7|"|7v*x| xv#"| xvR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_mutex.c70|(L|8 tv ||{|x |"3$|#@| 3|#| |}_ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hscfg.htwl.happlication_jump_private.hpm.hcommon.hctrdg_common.hpxi.hwram.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h#rom.hhook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)7os_init.c80 |8 | eR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_arena.c7| |P |"" | | |.X(a}~  4!|-ks p!|R D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\alloc.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_alloc.c7|!|!| }~~{ } "||{jt"| # "&n "&#l} D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hos.hmemorymap.harmArch.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_exception.c7X#|}C~  #|$|($| $|# lR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_timer.c7 %|.Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_tick.c78%|7 %|%|%|  > P&|y D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_alarm.c7\&|7+'  &|&|&|'|3#} i'|7(|xx}|l(|~(|(|#~ S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_valarm.c7x)|)|)|} b"B*|~8*|D*|" |y*|*|*|z(+|*{% x+|} W)'E x,|z D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hscfg.hcode32.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_system.c7,|(,|<,|,|,|-|-|W D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\codecmode.hemulator.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.h unicode.hstdlib.hownerInfo.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.hthread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_systemWork.c7,-|"8-|<3Y9 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mb\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ltdwram_end.hsection.hltdwram_begin.hwram_end.hwram_begin.hcode32.hcard.hglobal.hmb.htypes.hmb_fake_child.hmb_child.hmb_gameinfo.hwm.hfile.hmisc.hmb.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.hrom.h"hook.hapi.harchive.hromfat.hoverlay.hfatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.hnwm.h0nwm_sp.h1twl.hscfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7os_reset.c8d-|t t -|z ||| T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\gx.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6os_entropy.c7<.|!}}"..*2 2 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7\src\mcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hctrdg.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8os_terminate_sp.c9.|$6L/|\/|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmi_ndma.hsystem.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7mi_ndma.c8|$_!cfiloru x{ D|/"#&&#* 0|H| | | | T| /l| | ~| | "2 |  | ,| 8| ~}}{z`|_|_"g D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\system.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.hapi.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6mi_sharedWram.c7`/|j/|F0|L0|L D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\nitro.hmi_dma.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.h nwm.h0wm.h nwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.h genPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7mi_dma.c80| } 0| || 1| z D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\code16.hcodereset.hcode32.hmath.hmemory.hplatform.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hfft.hfx.h.checksum.hcrc.hdgt.hmisc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h&scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6mi_memory.c741|P1|l1|1|1|1|2|2| 3| u x D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\code16.hcodereset.hcode32.hswap.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6mi_swap.c73|,tQ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\dma.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h sharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6mi_init.c74|! c D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pad\ARM7\src\nitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6pad_xyButton.c74|) x4|~#+kS D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\misc.hpxi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6pxi_init.c74|/S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\twl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6pxi_fifo.c74|(~~ ||}y&L5| .35|B5|*&5|'"86|y|#"g"hU D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6std_string.c76|-~~6||{ #,7|~v`7|~p7|?}7|z zV D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6std_sprintf.c77|7| ~ ..  w w {*&<*<&~~*f*^  "Zb2^b#..3*/..3*G6;||y  6|{ &||/&""s8k0b}# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\ltdmain_end.hsection.hltdmain_begin.hunicode.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6std_unicode.c7?|{M D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7\src\exi.hgenPort.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6gpio.c7?|!&?|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7.TWL\src\memorymap.htypes.hgenPort2.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7gpio2.c8?|&&@|#"4@|@@|4i D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.hcapture.hchannel.htypes.hmisc.hpm_utility.hpm_common.hioreg_SND.hos.hglobal.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hmmap_global.h alarm.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.hioreg.h scfg_private.h4system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)8snd_global.c9L@|<"\@|~~@|}" @|" A|A|/6}T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\channel.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6snd_channel.c7DA|; t 3 |"A|x3 |PB|x3 B|B|3} : b|,c|  R&"S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\work.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6snd_work.c7c|.d|*,d||}~#|""<T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\work.hpxi.halarm.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6snd_alarm.c7d|~~}d|#d|'. e|e| {V D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\main.halarm.hutil.hglobal.hwork.hcapture.hseq.hmi.hpxi.hos.hmisc.hcommand.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hbank.hdata.hmml.hmidiplayer.hchannel.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6snd_command.c7f|) 0f| DZ',' ""+&D|07R_R 2~~ j|  #C " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hspi_sp.htypes.hnvram_sp.htype.hpm_sp.hioreg_OS.htypes.hmic_sp.htp_sp.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6memorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7spi_sp.c8j|="~ { k| }~~" k|  (l| l|}l|l|l|'|y~ .m|#m|/ fm|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\codecmode.htypes.hmisc.hpm_shutdown.hpm_selfBlink.hpm_sleep.hpm_utility.hpm_common.hpm_pmic.hpm_send.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0std.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hgenPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)9pm_sp.c:0n|}~~Xn|~~6   o|'*6. & o|CR/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\pm_common.hpxi.htwl.htwl_sp.hspi_sp.htypes.hmisc.hpm_send.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.h thread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8pm_send.c9 p|228 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\twl.htwl_sp.hspi_sp.hpm.hspi.htype.hconfig.hspi.hpxi.hpm_common.htypes.hmisc.hpm_pmic.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8pm_pmic.c9Lp|>} p|"p|'Bq|$q|!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\main_end.hsection.hmain_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hspi.hcdc_api.hcdc_dsmode_access.hcdc_twlmode_access.hspi.hcdc_reg.hcdc.hcodecmode.htypes.hmisc.hpm_shutdown.h global.h pm_selfBlink.h pm_utility.h pm_common.h pm_pmic.h emulator.h system.h pm.htype.h config.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h command.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_api.h"sndex_common.h#card.hcommon.h$eeprom.h$flash.h$fram.h$backup.h$dma.hexMemory.hhash.h$types.h$device.hpullOut.h$fs.htypes.h%rom.h$hook.h%api.h%archive.h%file.h%romfat.h%overlay.h%fatfs.hsystemWork.hthread.h api.h&command.h'types.h&gx.hgx_sp.hlcd.h!wm.h(wm_sp.h)twl_hybrid.h*version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h*ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5twl.h*scfg.hscfg.h6mmap_shared.hscfg_private.h7mmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8i2c.h9types.h8control.h9dsp.hexi.hgenPort.h:memorymap.hcommand-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines);pm_utility.c<Dq|8#   o    ~7|+ *~ s|2 t|06Pt| tt|t| u D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\main_end.hsection.hmain_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.hexi.hpxi.htypes.hmisc.hpm_utility.h pm_sleep.h pm_common.h pm_pmic.h pm_send.h twl.h twl_sp.h spi_sp.h pm_sp.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.h instruction_ex.h!type_ex.h snd.hsnd.hmain.hcommand.hwork.harmArch.h"mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.h version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.hscfg_private.h7system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hmemorymap.hcommand-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines):pm_sleep.c;t|4  u| ""#&& j D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\types.hmisc.hpm_selfBlink.hpm_utility.hpm_common.hpm_pmic.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h genPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8pm_selfBlink.c9v|3#&_# w|w|!r  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\ltdwram_end.hsection.hltdwram_begin.hltdmain_end.hltdmain_begin.hfatfs.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hmemorymap.hgenPort2.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.h exi.h pxi.h codecmode.h types.h misc.h pm_shutdown.h pm_utility.h pm_common.h pm_pmic.h pm_send.h spi_sp.hpm_sp.htwl.htwl_sp.hioreg_OS.hmic_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.h fifo.h control.h!instruction.h!type.h gpio.h!fifo_ex.h"instruction_ex.h#type_ex.h"snd.hsnd.h main.hcommand.hwork.harmArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h%sndex_common.h&card.h common.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.h types.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(systemWork.h thread.hapi.h)command.h*types.h)gx.h gx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.h wvr_common.h/wvr_sp.h0ctrdg.h ctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.h mi.h os.h math.h rand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4std.h nwm.hnwm.h6wm.h nwm_sp.h7scfg.hscfg.h8mmap_shared.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hcommand-line defines)<twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)<pm_shutdown.c=|>|"'   w|Jd|" |||||#"~  ||#.$|" W D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\scfg.hioreg_OS.hmessage.hfifo.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6scfg_proc.c7w|6& Lx| "x|  x|!zf#/i] 3 G D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\tpex_reg.htp_sp.hspi_sp.htypes.htpex_sp.hcodecmode.htwl.htwl_sp.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8tp_sp.c9y|2~~~&}"*y|"y|~~ + z|''@{|'&  | p ' +|| ++ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\spi_sp.htypes.htp_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7tp_sampling.c8||"* .}|"}| " ~B}&|~#z~  z~z3.{z~/~|&|{ q3y~"+l = D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\mic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.htwl.htwl_sp.hioreg_OS.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8mic_sp.c94|;~~" d|~~{ |$ +~" (|jq x|' '##||  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\spi_sp.hioreg_OS.htypes.hmic_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6memorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7mic_sampling.c8$|9"*||+''# |"&|"*~++/## e D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\code16.hcodereset.hcode32.hmic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.hinterrupt.hioreg_OS.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)8mic_irq.c9܆|||z||| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\archive.hfile.hhash.htypes.hmisc.hrom.hromfat.hcommand.hutil.hfs.hcommon.hpxi.hos.hmi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.htypes.hdevice.hpullOut.htypes.hrom.hhook.hapi.hoverlay.hfatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7fs_api.c8| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_api.c8 |<ji  |}ȇ|Ї|W D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\rom.hcard_spi.hnitro.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_common.c8؇||y  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\os.hcard_task.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_task.c8 |' ||8||y |'v c! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_spi.c8(|~|  /|&' ̉|##|}6} umog||" |L|/|# | &|L|* |."&m |."&m |~'{{ |~uL|~u|" |}y  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hrom.hpullOut.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_rom.c8D|~}JF ||> @|H| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\card_common.hnitro.hcard_rom.hcard_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_command.c8T|.||/ &&&&"""" |3đ|#  S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\os.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.hcard_rom.hctrdg.hpullOut.hrom.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7card_sp_pullOut.c8\|6|'"O / <|\|#|'|}}|'K I D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\ltdwram_end.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.htwl.hsection.hltdwram_begin.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h scfg_private.h3system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7i2c_instruction.c8||||c~z L|""~ |#||" |"#$||K/zz t|&|#$# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\tmp\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\memorymap.htypes.hgenPort2.hsndex_api.hioreg_SND.hmmap_global.hioreg_CFG.hpm_common.htypes.hmisc.hpm_pmic.hpm.h spi.h type.hconfig.hspi.hcdc_api.h misc.hcdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.htwl.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.hos_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.halarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_common.h#card.hcommon.h$eeprom.h$flash.h$fram.h$backup.h$dma.hexMemory.hhash.h$types.h$device.hpullOut.h$fs.htypes.h%rom.h$hook.h%api.h%archive.h%file.h%romfat.h%overlay.h%fatfs.hsystemWork.hthread.hapi.h&command.h'types.h&gx.hgx_sp.hlcd.h"wm.h(wm_sp.h)twl_hybrid.h version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1std.hnwm.hnwm.h3wm.hnwm_sp.h4scfg.hscfg.h5mmap_shared.hioreg.hscfg_private.h6system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9command-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines):cdc_api.c;||:ؔ|##Е|"|: @|: |#|""̖| : | (| 8| H| X| p|  :>62 ##;;; '####ؘ| ###;;; 3|  .22.}}#?;; ###2 l|   "##;;; 2 ܜ| | ;#;;; #####;;; '#P|X|';;; ### ### t|*|; ::::: ::::::::2<|#2"ԡ|:&&*+ |:*+|"y 8|"y h|3~ |~'x  Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\twl.htwl_sp.hspi_sp.hcdc_twlmode_access.hspi.hcdc_reg.htypes.hmisc.hcdc_api.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4system.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8cdc_twlmode_access.c9| |4|"P|#|"||#+|"&$|8|#~"}"|"|#~} |"<|H|a#: D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\memorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hcodecmode.hpm.hspi.htype.hconfig.hspi.h cdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hsndex_api.h init.h spinLock.h emulator.h message.h system.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hpm_common.hioreg_PAD.hpm_common.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.h command.h global.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.h api.h%command.h&types.h%gx.h gx_sp.hlcd.h!wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.h wvr_common.h,wvr_sp.h-ctrdg.h ctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.h mi.h os.h pxi.h math.h rand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.h types.h std.h nwm.hnwm.h3wm.h nwm_sp.h4twl.h)scfg.hscfg.h5mmap_shared.hscfg_private.h6mmap_wramEnv.hmmap_wram.hcamera.hfifo.h7util.h7i2c.h8types.h7control.h8dsp.hexi.h genPort.h9command-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines):sndex_request.c;t|~  |  H|#}/#"# ԧ|+  ,| ~~h|}.~[!~d~*Rl *~;~""~~.#~ 3 }}}}}}}}}}##}}P|2|||W|+; b D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htwl.htpex_reg.htp_sp.hspi_sp.htpex_sp.htwl_sp.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)9tpex_sp.c:L||'&/#    D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htpex_reg.hspi_sp.htypes.htp_sp.htwl.htwl_sp.htpex_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)9tpex_sampling.c:@|& .\| p|"|&|&|*̯|*|*|*|*,|*D| _+}.}} ~~ #}&*x~y zz~~~x n:6  / C D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\codecmode.hsndex_api.htwl.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl_sp.hioreg_OS.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.h system.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8micex_sp.c9 |*   "(~~#"6"}#72 ,|>L|"+|"~ij~~r"/#~"gj6|"#"~ d|K k D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\code16.hcodereset.hcode32.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl.htwl_sp.hioreg_OS.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8micex_irq.c9|~T|'| ܷ|n  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmemorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h scfg_private.h5system.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)9mcu_intr.c:|:"'>:x||zz|~/zz||~$|P|{ t|N|  uu~#+f}e t| |d D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8mcu_control.c9|/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\memorymap.hmemorymap_sp.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h mi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7nvram_sp.c8Ⱥ|5~~|~~   # '"#~;|'&""**&'|||| {! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\spi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7nvram_instruction.c8|!".4|"L|1".x|"."|~""}}"|`|"x|~""}}""|(|'~""}} ~"}}"-|'~""}} ~"}}"-|~~|.|~~|.X|".|".|".|"."" 8|".  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hfifo_ex.hemulator.hgenPort.hpxi.hfifo.hinstruction.hcontrol.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.htype.hgpio.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.hthread.hapi.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4i2c.h5types.h4control.h5dsp.hexi.htypes.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)6control.c7d|"<|/~7 |// ||"~  ( |> |9~rO~5"l### ###M~ |~#|3| ~~~! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hgenPort.hgpio.hinstruction.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.htype.hfifo_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6instruction.c7P|+*>|. zy ?|&|>|&|&$|>P| &| >| &$| >p|?&|;>|&|>D|&d|>|&|>|&|>|&|'&(|?>l|&|>|&|>(|/r  x }| / fy}|"t D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\code16.hcodereset.hcode32.hioreg.hgpio.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)6gpio.c7|(|H||H|`  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apistat.c;'/"""L/n}~{&z|&&#"" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtlowl.c;+}}"}x2"z" ~& .+** P#{x t '#c&"""""""""""+7" j+~'*H& ~܆ x} {\& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apickdsk.c;$~&}" |~j##""}b#"+~q #L&` Z&T,R.N2L4H8F:#"L'"{k̋&*}}~}H2}| 6~2_& \'"&z'#"'2#"("x #q62q# *"2  "&r'"m # yzz 4nzzzzzo;y _%H'#z +h+ }#"}y tz"""'2#"~~#w 72q# *"24 #&'''z"vn`%W + ~~ l *}}# 2=# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs_twl_append.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiwrite.c;Ж* "/## # }yryy.&{r; {{6{&  {~#q3.G'x ~v #g~&"/" |'/'*)W~"; w&J;.~>#6: }+~6"'""'#2""  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ltdwram_end.hsection.hltdwram_begin.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apicnfig.c;p}}$\*V t{"""""""""}""""""""#"""""""""#""""""""".{   D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rttermin.c;"& &<p{3".>  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs_target_os.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutbyte.c;~آ # '~D! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutil.c;P'&+?"|xw 3|}*&t~4~@H~:& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilio.c;X+#2}/3okn!3' |zp  ~~*#'ԧ  '~&x|  zoo3#/&{& / ~o.'w u hx 3 ~ 3"} k  3" ;d~~  y} u m'? +Y*#4 3'.}/&":x*ܮ *"*z *@ /~t |*;#"opjmi`#4 @ X d '#2а * ##L  #"  " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdevio.c;4#>#.7:#}#:,:l+/+ //D/K;4#X' }~3C'} v \'u?jܶ'?z ) D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtvfat.c;*}}}~$\z j &Z&& +'+.~#~P~.}~~|#} s x#/~#'L7#"}&"</~v~~~~ȹz #{{&#}"/"w "w "w '~N3M-5{2#||B#||:'x 'x 'x ]%'̼{*}|2||.}#~t~|<2&'u #"?w'~z ~~u(zr&~'/j*}"Ŀ |{zqo|y#&#    K WD T `    }}kkgx_!O1 d#)  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilmv.c; |}|3plo &"6& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdrobj.c;*"\ "&   i   / //@u #o/.4&"#.}~* ~qy.(}}" ##'}~".|7.  2 2. }~yxw }rqnw w t #. |Y'. +.#'}t   +#+&*#,"'#~*+  x~0"'t ""#. ~{"&"l6 *v ""   }H . y"p *+ 0 *  } . ! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifrmat.c;~y   <+3 C'3u(t w _*k"}M5v _!7~"+t l_!} (+ /{& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9csstrtab.c;| ! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat16.c;(} y+~z}".   }'~##  ###&"*"}   oo~* x!u z " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat32.c;P&'+/ z ""+42#d3"""x: &} 3~ v##  ###""""q"*&"}# &O2N3M4L5t p'|*#{* x!n~ L}`p"**"***?*#8&}#### D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apigfrst.c;+#"" %$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9csunicod.c;t$ v}5z..# +~~|}zD{l{}'&|(}@'|~w "#z |HT`"""v |,w "v.~'{w +w~~ %}~~~'z   wv % D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfatxx.c;8 " ..&**/s.#'+w **.+'#{#"3.&T##or.~j,#7j #"py ~"ay&^"Zy- Ly:I7#~"Dy "#y t#}} 7  #y"aS-" T+6(|:{h??>}&}T} }}"|}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinfo.c;)#~t' ?  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\portconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinit.c;|{( 0&7'g  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs_target_os.hportconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfs_naming_convention.hrtc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9portkern.c;:***.&*#3| ~~~{  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apimkdir.c; '}||z zw zmi  2 y*+  ""! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apirealt.c;t('/'~~#  xy# z x # .]*&" yy  + # {#" z> -& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9prblock.c;,23J #**H *&&'""#x w #qp;~hex *.**.`"+"trkh* uzz&~u w *&y 'kX |'~t""*"}|v2k*"#*}}+, t# vu {"s+~#~""y ? }z8 zz&~{.}*{} &v \}c @" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtkernfn.c;./""~2}~ :y }'{{#/#}?{ 0DTt *"*'  B xu}m q m "|||{z 0'***"` {**"'  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9drdefault.c;(D>Kz& &  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9drfile.c;$B'x$v #2&'~~Jo {" ( q  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\drdefault.hrtfs.hrtfs_twl_append.hportconf.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9attach.c; *+ &&&.&&&}kk3 *N}&.+' D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs_twl_append.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_append.c; 5 : /}|2w #+#Y'k"~H8i" D'/#}?~~lme"#~(~q'ju #o7, u " } }{l&"~|}2#".3  .t t]&#$\}z||pp W,W) C=}@zz#&"L ||3nna"a ""T #'}". 2 2 } oy}dc` jqn# ?" +4 /&" ~ ~+6  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_vfat_append.c;L&}}}~(Xz f ;U+& +'+.~#~z#  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_api.c=/ /   " X/}~~ "H||{||{||{||{X~   w 1"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hexi.hgenPort.h:types.hmemorymap.hcommand-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_cache.c=8 H ` 6 ||{ ||{symbols.h>command-line defines)=sdmc_thread.c?!+&""" \""'" ||"/&/. #}A## &"";272%}#l&^T'{0,*7/~ {"3{yyw "`- ||zrrs} }}|{"p rsrs }L;(/ |'~}"~w / "   ~~"&'&3$0  }V0 0 ~}~.y"*" " 1 |3 2| |z(dp|;zx }|{# u vi_! feqV,T-} 3/~~#"zz lp  " 5"  ~v"x|~'~y r u#''"7#@5 |.kM&&    (7 vr>>} eg abfi!|{wsQ?~I'! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\code16.hcodereset.hltdwram_end.hsection.hltdwram_begin.hcode32.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htypes.h hi.h dma.h types.hmisc.hlo.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.hos_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.h instruction.h type.hgpio.h fifo_ex.h!instruction_ex.h"type_ex.h!snd.hsnd.hmain.h#command.h#global.h#work.h#armArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.h#capture.h#bank.h#data.h#mml.h#seq.h#midiplayer.h#channel.h#exchannel.h#util.h#sndex_api.h%sndex_common.h&card.hcommon.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.htypes.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(fatfs.hsystemWork.hthread.hapi.h)command.h*types.h)gx.hgx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.hwvr_common.h/wvr_sp.h0ctrdg.hctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.hmi.hos.hpxi.hmath.hrand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4misc.htypes.hstd.hnwm.hnwm.h6wm.hnwm_sp.h7scfg.hscfg.h8mmap_shared.hioreg.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hexi.hgenPort.h<memorymap.hcommand-line defines)=twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch workaround.h>symbols.h>command-line defines)=sdmc_intr.c?|D|9D9 : ,:L:t:::." '@; `;!/"  ; <l<<~ z'*{w =u'*{w  =~} x'*{w '$>~~'*{w '>*'?#.'`?*'?*' @*'t@.~"@@"/ $A&"#~"#"#"# [&-@\}!"& v#t &$&|[&"R.s sqa"D B0B B&  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdif.c=B*& C"4C""##" C"' D}" PD  s"d" D |"x " |E "#E|""" XF"'# F"#" F|G|&'" dG*&""""&&&" H"'"&&&&&&"H"'H"#" 0I"##"  "&'" I }}}}  vu }" J0J@J TJ&o"#"#  K&}" tK "t|{*qkk L"#*.dL # " & " M 2M "@M `M &M &"""   " M |  "&'" v"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drsdmc.c=M { DN &.#N z|x~~q}}t } |*"&y'dS" SSSx!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drnand.c=LT'}} };&y~"&&&&nj}t  +"l D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\spi.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7sdmc_flags.c9P]""#]" 8^#`^x^p^""d_""&_$*`~$ +!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drnand_aes.c=H`? { ` "7"L! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htypes.hresource.hfatfs.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&systemWork.hthread.hapi.hcommand.h'gx.hgx_sp.hlcd.h"wm.h(wm_sp.h)twl_hybrid.hversion_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.hctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.htypes.hstd.hnwm.hnwm.h3wm.hnwm_sp.h4scfg.hscfg.h5mmap_shared.h ioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9types.hmemorymap.hcommand-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.hsymbols.hcommand-line defines):fatfs_resource.c;La9~~~s } ~}hh~e a} (by xb'? bb}  c~ ~w  pc'";c2k" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rsvwram_end.hsection.hrsvwram_begin.hsdif_reg.htwl.hsdmc_config.hrtfs.hrtfs.hsdmc.hdrfile.hrtfs_twl_append.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.h mcu.htypes.h unicode.h attach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hresource.h request.h format_rom_certificate.hformat_rom.hfatfs.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.h ioreg_SPI.hpm.h pm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.h!rtc.hrtc.hfifo.h"control.h#instruction.h#type.h"gpio.h#fifo_ex.h$instruction_ex.h%type_ex.h$snd.hsnd.hmain.h&command.h&global.h&work.h&armArch.h'mmap_global.hioreg_SND.hmmap_global.halarm.h&capture.h&bank.h&data.h&mml.h&seq.h&midiplayer.h&channel.h&exchannel.h&util.h&sndex_api.h(sndex_common.h)card.hcommon.h*eeprom.h*flash.h*fram.h*backup.h*dma.hexMemory.hhash.h*types.h*device.hpullOut.h*fs.htypes.h+rom.h*hook.h+api.h+archive.h+file.h+romfat.h+overlay.h+systemWork.hthread.hapi.h command.h,gx.hgx_sp.hlcd.h'wm.h-wm_sp.h.twl_hybrid.hversion_wl.h/WlLib.h0WlCmd.h0WlFrame.h0WlBuf.h0WlCmdLabel.h0WlStaList.h0WlParam.h0wvr.hwvr_common.h1wvr_sp.h2ctrdg.hctrdg_common.h3ctrdg_backup.h4nitro.hctrdg_flash.h4ctrdg_sram.h4ctrdg_task.h4ctrdg_sp.h5memorymap.hmi.hos.hpxi.hmath.hrand.h6qsort.h6math.h6fft.h6fx.h7checksum.h6crc.h6dgt.h6misc.htypes.hstd.hnwm.hnwm.h8wm.hnwm_sp.h9scfg.hscfg.h:mmap_shared.hscfg_private.h;system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h<util.h<emulator.hi2c.h=types.h<control.h=dsp.hexi.hgenPort.h>memorymap.hcommand-line defines)?twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h symbols.h command-line defines)?fatfs_command.c@c~ d|~..y Tddy z  srerv+2/b!R^$/..~'T/el e f#f3f& 7~~q ~~g  g.hKDh3|h3h#C##+&}{  pi|}{ #'+ .''. ?#~'~ ~n H? #y lJm,~Lm~ ~|m+mn  & n  &# o ' o  o {"w "&~~b"` [&p p &*."#q   o~.6#@r { ||x "& r s  { \s s s  {  t{{2|"& ".@uu**}~&*l#" |v*+~"&*m#"  wx~~"& x xy#}" G~7xrHz3&" #** ,{l{'*&+/'#3; X||} xx xzx \}}"Cx"Cx"Cx?x |~#.;"+{ ~z.{~"y+6/~~~~&&&&&( &* 3*? "*&+''/(P/ ~*x }rq&/#/| |+z~{ Z(T l|"#\"{"w.n~#+~R.J>"zy ~y #vB D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_request.c9~  Xz {y a!h#*(C D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_thread.c9:~~~  > D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_api.c9~"`# "& 5 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hinterrupt.hioreg_AES.hdma.htypes.hlo.htypes.hmisc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.hmemorymap_sp.hmi.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8aes_lo.c9'  \ t  ԕ&&$0<*T{||~" *" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hformat_rom_certificate.hformat_rom.hinterrupt.hmutex.hpxi.hmath.hlo.htypes.hdgt.hmessage.haes_fifo.hhi.hdma.h types.hmisc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.hscfg_private.h5system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)9aes_hi.c:~(`~~| {xw. .0'Ę3t3  * s +^"&'+N<~ ##~ .w jze~ }'&  ww  }~~}y ' ""~ }~ & "! /D 3#  6 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hfifo.hsection.hltdmain_begin.hdma.htypes.hlo.htypes.hmisc.hdgt.hmessage.haes_fifo.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines)9aes_fifo.c: ."~z ""H # m7 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hsection.hltdmain_begin.htypes.hhi.htypes.hmisc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8aes_common.c9<~pO D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\code16.hcodereset.hcode32.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.hos.htypes.hwmsp_private.hwvr.hioreg.hioreg.hmi.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1nwm_sp.h2twl.hscfg.hscfg.h3mmap_shared.h scfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7types.hmemorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mchcommand-line defines)8wvr_sp.c9Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7.TWL\common\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\wram_end.hsection.hwram_begin.hltdmain_end.hsection.hltdmain_begin.hos.hwmsp_private.hmemorymap.htypes.hgenPort2.hwmsp_common.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.hstd.hnwm.hnwm.h3nwm_sp.h4twl.hscfg.hscfg.h5mmap_shared.hioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9command-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ROM.ISTD.TS.TWL.LTD.C.mch command-line defines):wmsp_system.c;8|~~ B} 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