ELF(844 (T88T88T||T||TTTT||8TT@ T@ @  T.T$AT TToT.shstrtab.debug_abbrev.debug_aranges.debug_frame.debug_info.debug_line.debug_loc.debug_macinfo.debug_pubnames.debug_overlay.strtab.symtabferret.relaferretferretWRAM.relaWRAMWRAMbinary.AUTOLOAD_INFObinary.STATIC_FOOTERferret_defsFcheck.WORKRAMbinary.LTDAUTOLOAD_TOPRSVWRAM.relaRSVWRAMRSVWRAMLTDMAIN.relaLTDMAINLTDMAINbinary.LTDAUTOLOAD_INFOferret_defsLcheck.LTDMAINcheck.RSVWRAM$m$a$dINITi_CopySysConfigINITi_ShelterLtdBinaryINITi_Fill32INITi_IsRunOnTwlmicrocode_GotoMain.rodata$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$dmicrocode_ShakeHandINITi_DetectMainMemorySizeINITi_DoAutoloadINITi_Copy32IsValidConfigExOS_HaltstrMemMAINGX_VBlankIntr@8078@8079VBlankIntrPrintDebugInfostrHeapSizeIsstrMemWRAMOS_EnableIrqMI_CpuFill32MI_CpuClear32ReadUserInfo@8080GetRomValidLanguage@8081$a@8002@8003$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d@8028MI_CpuCopy32$Ven$lb$$PrintDebugInfo.WRAMmain.ostrFailedCreateHeapInitializeAllocateSystemOS_GetSubPrivArenaHiOS_GetWramSubPrivArenaLostrARM7OS_GetSubPrivArenaLoInitializeAllocateSystemCoreOS_GetWramSubPrivArenaHi$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tMI_CpuClear8CheckCorrectNCDExInitializeFatfs.text$a$d$d$d$t$t$a$a$d$d$Ven$lb$$SVC_CalcSHA1.LTDMAINsyscall_twl.o $t$t$t$t$Ven$lb$$SVCi_CalcSHA1Core.WRAMsyscall_twl.o .text.text$a$a$a$a$d$d$t$t.text$a$a$a$a$d$d$d$t$t$t.text$a$a$d$t.text$a$a$d$t.text$a$a$a$d$d$t$t.text$a$a$a$d$d$t$t$Ven$lb$$__call_via_r0.RSVWRAMthumb_interwork$Ven$lb$$__call_via_r5.LTDMAINthumb_interwork$Ven$lb$$__call_via_r4.LTDMAINthumb_interwork$Ven$lb$$__call_via_r6.LTDMAINthumb_interwork$Ven$lb$$__call_via_r0.LTDMAINthumb_interwork$Ven$lb$$__call_via_r1.LTDMAINthumb_interwork$Ven$lb$$__call_via_r3.LTDMAINthumb_interwork$Ven$lb$$__call_via_r2.LTDMAINthumb_interwork$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tbreakCtx$a$a$a$a$d$d$d$d$t.bss.data$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_IrqCallbackInfoIndex$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_SetIrqFunctionEx.LTDMAINos_interrupt.o $Ven$lb$$OS_EnableIrqMaskEx.LTDMAINos_interrupt.o OS_DisableIrq$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@6490OSi_IsTerminateOccurred$a$d$d$d$d$d@6489OSi_IsResetOccurred.bss$t$t$t$t$tOSi_AllocateCardBus_ZZ11OS_InitLockvE13isInitializedOSi_DoUnlockByWordOSi_FreeCardBus$a$a$a$a$a$d$d$d$d$d$d$d$d$dOSi_DoTryLockByWord$t$t$t.bss$t$t$t$t$t$t$t$t$t$tOS_PutStringDefaultOS_FPutStringInit@7927.data$Ven$lb$$OSi_TPanic.LTDMAINos_printf.o @7918$a$a$a$a$aOS_FPutStringISTD$d$d$d$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$OSi_TWarning.LTDMAINos_printf.o common_buffer$Ven$lb$$OS_SPrintf.LTDMAINos_printf.o $Ven$lb$$OS_TPrintf.LTDMAINos_printf.o OS_FPutStringDummy@7917$t$t$t$t.bss$t$t$t$t$t$t$t$t$tOSi_FPutStringHookOS_FPutStringPrnSrvOSi_ThreadIdCount$Ven$lb$$OS_WakeupThreadDirect.LTDMAINos_thread.o $Ven$lb$$OS_SleepThread.LTDMAINos_thread.o $Ven$lb$$OS_CreateThread.LTDMAINos_thread.o OSi_ExitThread_ArgSpecifiedOSi_RemoveSpecifiedLinkFromQueue$a$a$a$a$aOSi_InsertLinkToQueue$Ven$lb$$OS_WakeupThread.LTDMAINos_thread.o OSi_InsertThreadToListOSi_IdleThreadProcOSi_RemoveThreadFromList$d$d$d$d$dOSi_RescheduleThread$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dOSi_ExitThreadOSi_SystemStackBuffer$t$t$t$t$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_Sleep.LTDMAINos_thread.o OSi_ExitThread_DestroyOSi_SleepAlarmCallback$a$a$a$a$a$a$d$d$d$t$t$tOSi_RunningConsoleTypeCache_ZZ18OSi_DetectPlatformvE12OSi_Platform_0.data_ZZ20OSi_DetectDeviceTypevE5table_ZZ18OSi_DetectEmulatorvE22OSi_IsDetectedEmulator.rodata_ZZ18OSi_DetectEmulatorvE12OSi_Emulator_0$d$d$d$d$d_ZZ18OSi_DetectPlatformvE22OSi_IsDetectedPlatformOSi_DetectPlatform.bss$t$t$t$t$t$t$Ven$lb$$OS_ReceiveMessage.LTDMAINos_message.o $Ven$lb$$OS_ReadMessage.RSVWRAMos_message.o $Ven$lb$$OS_ReceiveMessage.RSVWRAMos_message.o $Ven$lb$$OS_InitMessageQueue.LTDMAINos_message.o $Ven$lb$$OS_ReadMessage.LTDMAINos_message.o $a$a$a$a$a$a$a$d$d$d$d$d$d$d$Ven$lb$$OS_SendMessage.RSVWRAMos_message.o $t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_SendMessage.LTDMAINos_message.o $Ven$lb$$OS_LockMutex.LTDMAINos_mutex.o $Ven$lb$$OS_UnlockMutex.LTDMAINos_mutex.o $a$a$aOS_IncreaseMutexCount$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$OS_InitMutex.LTDMAINos_mutex.o @6967@6966$t$t$t$t$t$t$t$t$t$t$t$t$tOS_DecreaseMutexCount$d$t$tOSi_Initialized$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$tOS_InitArenaHiAndLo@7716$d$d$d$d.bss$t$t$t$t@6537@6536@6539@6538OSi_UserExceptionHandlerArgOSi_ExceptionHandler$a$a$a$a@6541OSi_UserExceptionHandler@6540@6542$d$d$d$dOSi_DisplayExContextOSi_SetExContextOSi_GetAndDisplayContext.bss$tOSi_OriginalHandlerOSi_ExContextOSi_DebuggerHandlerOSi_TimerReserved$d.bss$tOSi_UseTick$Ven$lb$$OS_GetTick.LTDMAINos_tick.o $a$a$d$d$d$d$d$d$dOSi_CountUpTick$t$t$Ven$lb$$OS_IsTickAvailable.LTDMAINos_tick.o .bss$t$t$t$t$tOSi_AlarmHandler$Ven$lb$$OS_CancelAlarm.LTDMAINos_alarm.o OSi_InsertAlarm$Ven$lb$$OS_IsAlarmAvailable.LTDMAINos_alarm.o OSi_ArrangeTimer$a$a$a$a$a$a$Ven$$OSi_ArrangeTimer.WRAMos_alarm.o $d$d$d$d$d$d$d$d$d$d$d$d$d@6822OSi_UseAlarm@6823OSi_AlarmQueue$t$t$t$t.bss$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_SetAlarm.LTDMAINos_alarm.o OSi_SetTimer$Ven$lb$$OS_CreateAlarm.LTDMAINos_alarm.o OSi_DetachVAlarm@6956OSi_PreviousVCountOSi_InsertVAlarm@6929@6928OSi_VAlarmQueueOSi_GetVFrame$d$d$d$d$d$d$d$d$d$dOSi_VFrameCountOSi_VAlarmHandlerOSi_SetNextVAlarm.bss$t$t$t$t$t$t$t$t$t$t$t$tOSi_UseVAlarm$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$Ven$lb$$OS_GetBootType.LTDMAINos_systemwork.o$a$d$d$d_ZZ18OSi_IsCodecTwlModevE11initialized_0_ZZ18OSi_IsCodecTwlModevE6retval$t.bss$t$tOSi_ReloadTwlRomData.rodata$a$a$a$a$a$a$aOSi_DoBootOSi_IsInitReset$d$d$d$d$d$d$t$t.bss$a$d$Ven$lb$$OS_GetLowEntropyData.LTDMAINos_entropy.o $d$t$t_ZZ12OS_TerminatevE4sent_0_ZZ12OS_TerminatevE10terminatedOS_EnableIrq$d$d.bss$t$t$t$Ven$lb$$MI_NDmaPipeAsync_Dev.LTDMAINmi_ndma.o $Ven$lb$$MI_NDmaRestart.LTDMAINmi_ndma.o $Ven$lb$$MIi_Aes_NDmaSend.LTDMAINmi_ndma.o $Ven$lb$$MIi_Aes_NDmaRecv.LTDMAINmi_ndma.o $Ven$lb$$MI_SetNDmaBlockWord.LTDMAINmi_ndma.o $Ven$lb$$MI_SetNDmaWordCount.LTDMAINmi_ndma.o $a$a$a$a$a$a$a$a$a$a$a$a$aMIi_GetControlData$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$MI_NDmaSendAsync_Dev.LTDMAINmi_ndma.o $Ven$lb$$MI_StopNDma.LTDMAINmi_ndma.o $Ven$lb$$MI_SetNDmaInterval.LTDMAINmi_ndma.o $t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$MI_WaitNDma.LTDMAINmi_ndma.o $Ven$lb$$MI_NDmaPipeAsync_SetUp.LTDMAINmi_ndma.o $Ven$lb$$MI_NDmaRecvAsync_Dev.LTDMAINmi_ndma.o resultPtrMIi_DoUnlockWramSlotslock$d$d$d$dMIi_CallbackForPxifinishPtrMIi_DoLockWramSlots.bss$t$t$t$t_ZZ19MIi_InitWramManagervE12sInitialized$a$d$d$d$t$t$t$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$a$a$d$t$tPADi_XYButton_CallbackPADi_XYButtonAlarm$d$d.bss$t$t$a$d$d$Ven$lb$$PXI_Init.LTDMAINpxi_init.o $t$tPXIi_SetToFifoFifoRecvCallbackTable$Ven$lb$$PXI_SetFifoRecvCallback.LTDMAINpxi_fifo.o $Ven$lb$$PXI_SendWordByFifo.LTDMAINpxi_fifo.o $a$a$a$d$d$d$d$d$d$d$dFifoCtrlInit$t$t.bss$t$t$t$t$t$t$Ven$lb$$STD_CopyString.LTDMAINstd_string.o $Ven$lb$$STD_SearchString.LTDMAINstd_string.o $a$a$a$a$a$a$Ven$lb$$STD_CompareNString.LTDMAINstd_string.o $d$d$d$d$d$d$Ven$lb$$STD_CompareString.LTDMAINstd_string.o $Ven$lb$$STD_CopyLString.LTDMAINstd_string.o $t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$STD_GetStringLength.LTDMAINstd_string.o $a$d$t$t$t$Ven$lb$$STD_TSNPrintf.LTDMAINstd_sprintf.o STD_Unicode2SjisArray.dataSTD_Sjis2UnicodeArray$a$d$d$Ven$lb$$STDi_AttachUnicodeConversionTable.LTDMAINstd_unicode.o $t$t$d$d$t$t$d$d$d$d$t$t$t$t$a$d$d$d$d$d$d$d$t$t$t$t$t$t.data$d$d$d$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t_ZZ14SND_CalcRandomvE1u.data.rodata$d$d$d$dSinTable$t$t$t$tsndMesgBuffersndAlarmSndAlarmCallback_ZZ8SND_InitmE11initialized@6546$d$d$d$d$d$dsndThreadsndMesgQueue.bss$t$t$t$t$t$t$t$tsndStackSndThread$d$d$t$tsWeakLockChannelStartExChannel.rodataCalcReleasesLockChannel$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d_ZZ22SND_SetExChannelAttackP12SNDExChanneliE12attack_table_ZZ22CompareExChannelVolumePK12SNDExChannelS1_E5shift_ZZ18SND_AllocExChannelmiiPFvP12SNDExChannel26SNDExChannelCallbackStatusPvES2_E13channel_order.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tSetTrackMuteseqCacheReadArgInitTrackChannelCallbackReadByteInitCacheRead24GetVariablePtrFreeTrackChannelAllReleaseTrackChannelAllFinishPlayer$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d@9078UpdateTrackChannelGetPlayerTrackStartTrackPlayerSeqMainClosePlayerTrackRead16AllocTrack.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tsMmlPrintEnable$t$t$t$d$d$d.bss$t$t$tAlarmHandler$d$d$d$d$d$t$t$t$t$tsCommandMesgQueue$d$d$d$dPxiFifoCallback.bss$t$t$t$tsCommandMesgBuffer$Ven$lb$$SPI_Lock.LTDMAINspi_sp.o SpiPxiCallback$a$a$d$dSpiCommonThread$d$d$d$d$d$d$d$d$dspiWork$t$t.bss$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$SPI_Unlock.LTDMAINspi_sp.o spiInitializedPMi_ReturnResult$d$d$d.bss$t$t$t$t$tSPI_SendWait$d$d$d$t$t$t$t$tstrBadLEDMessage.data.rodata@7737$a$d$d$d$Ven$lb$$PMi_SetLED.LTDMAINpm_utility.o MCU_WriteRegisterMCU_ReadRegisterPMi_AmpGainLevelTable$t$t$t$t$t$t$t@7323@7324strDmaStopMessage$d$dPMi_PreDmaCnt.bss$t$tPMi_BlinkCounter$a$d$d$d$d$Ven$lb$$PM_SetLEDPattern.LTDMAINpm_selfblink.o $t.bss$t$t$tPMi_MCUShutdownCallbackPMi_MCUResetCallbackstrUnknownstrDoExitMCU_GetBatteryLevelPMiMCUBatteryEmptyCallbackCalledPMi_DummyHandlerstrBatteryLevelZerostrPWSWResetstrResetOccuredstrPWSWShutdownPMiInTerminatePMiMCUPwswCallbackCalled$d$d$d$d$d$d$d$d$dPMi_MCUBatteryEmptyCallbackPMi_MCUBatteryLowCallbackPMi_MCUPwswCallbackstrARM7$t$t$t$t$t$t$t$t$t$t$t$tSCFGi_ExecSCFGi_CommonCallback$d$d$dSCFGi_MessageQueueSCFGi_MessageBufferSCFGi_SendPxiData.bss$t$t$t$tSCFGi_StackSCFGi_Thread_ZZ18TP_AutoAdjustRangeP9SPITpDatatE9valid_cnt_0_ZZ18TP_AutoAdjustRangeP9SPITpDatatE11invalid_cntSPI_DummyWaittpw$d$d$d$d$d$dTpVAlarmHandler.bss$t$t$t$t$t$tTPi_DetectTouchTPi_DetectPosSPI_DummyWait$d$d$d$d@6943@6942last_touch_flg.bss$t$t$t$tmicwMIC_TimerHandler$d$d$d$d$d$d.bss$t$t$t$t$t$tMicSetTimerValuecounter12sam12counter8offset12sam8$d$d$d.bss$t$t$tSPI_DummyWaitReceiveoffset8$d$d$d$d$t$t$t$t$d$tCARDi_EnableFlag$d$d$d$d.bss$t$t$t$t$d$d$t$t$d$d$t$t$t$t$t_ZZ19CARDi_EraseChipCorevE3argCARDi_WaitBusyforIRC_ZZ17CARDi_WriteEnablevE3arg.dataneed_commandCARDi_CommVerifyCore_ZZ23CARDi_CommandReadStatusvE3bufCARDi_SendSpiAddressingCommandCARDi_WriteEnable.rodataCARDi_WaitPrevCommandCARDi_CommWriteCorecardi_paramCARDi_CommReadCoreCARDi_CommandEndCARDi_CommArray_ZZ24CARDi_InitStatusRegistervE14status_checked$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tCARDi_SetRomOpCARDiReadRomFunctionCARDi_IsNormalMode$d$d$d$d.bss$t$t$t$t$tCARDi_DoneTaskFromARM9.data_ZZ22CARDi_LockMutexForARM7vE7isFirst$d$d$dCARDi_DoTaskFromARM9CARDi_ARM7Mutex@6769@6768.bss$t$t$t$t_ZZ26CARD_InitPulledOutCallbackvE13isInitializedCARDi_CallbackForPulledOut.dataCARDi_TryTerminateARM7_ZZ25CARD_CheckPullOut_PollingvE9skipCheck_0@6726@6725_ZZ25CARD_CheckPullOut_PollingvE12isFirstCheck_1isCardPullOut$d$d$d$d$d$d$dCARDiSlotResetCount_ZZ22CARDi_TryTerminateARM7PvE5alarm.bss$t$t$t$t$t$t$tdetectPullOut_ZZ25CARD_CheckPullOut_PollingvE9nextCount@7969mutexI2Ci_SendMiddleI2Ci_StopExI2Ci_SendStartI2Ci_GetResultI2Ci_SendLastI2CiDeviceAddrTableslowRateisInitializedI2Ci_WaitEx.rodataI2Ci_StopI2Ci_Start$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d@7970I2Ci_ReceiveStartI2Ci_StopPhase2I2Ci_StopPhase1I2Ci_ReceiveLastI2Ci_Wait$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tI2Ci_GetDataI2Ci_WaitReceiveLastI2Ci_ContinueI2Ci_SetDataCDC_PowerUpDAC_ZZ20CDC_WaitPowerDownDACvE25mute_wait_append_time_maxCDCi_InitializeIirFilterBuffersMicBiasBkisUnmuteSpBk_ZZ20CDC_WaitPowerDownADCvE25mute_wait_append_time_maxCDC_WaitPowerDownDACCDC_SetIirFilterCoreCDCi_IsIirFilterInitializedsCdcSysClockBk.rodataisDACOnBksIirFilterAddressHalfHpf10HzSamplingrate48kDefaultIirParamHpf10HzSamplingrate32k$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsIirFilterAddressisUnmuteHpBkCDCi_EndForceOutSoundCDC_PowerUpDAC_WaitWithSpinsIirFilterBackupCDC_WaitPowerDownADCisAudioADCOnBkCDCi_StartForceOutSoundCDC_SetIirFilterHalfCore.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tisSARADCOnBk__FUNCTION__$6583@6775@6774.dataSPI_SendWaitcdcMutex__FUNCTION__$6597cdcCurrentPage__FUNCTION__$6616$d$d$d$d$d$d$d$d$d__FUNCTION__$6639.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tSPI_DummyWaitReceivesndexLock__FUNCTION__$7136ReplyResultsndexIirTarget.datasndexSetAlarmPxiCallbackMCU_SetVolumeSetVolumeHandlerRequestThreadMCUVolumeSwtichCallbacksndexReqMsgQsndexIirParam@7717@7716sndexIsPlayShuttersndexVolAlarmsndexReqInitialized$d$d$d$d$d$d$d$dsndexReqMsgQArrayMCU_ReadRegistersndexReqThreadsndexReqThreadStacksndexSpiLockId.bss$t$t$t$t$t$t$t$t$t$t$tsndexVolsndexTempDSPMixRate__FUNCTION__$6609.data@6647$d$d@6648$t$t$d$d$t$t$t$t$t$t$t$t$t$t$t$tMicexUpdateStatusOnBufferFullMicexConvSamplingSpanMicexIntrHandler$d$d$d$d$d@6864@6865$t$t$t$t$t$t__FUNCTION__$6503@6573@6572.data$a@6581__FUNCTION__$6494micexIntrPrio$d$d$d$d.bss$t$t$tmicexIntrInfoMCUiThreadMCUiEnableHeartBeatMCUiMessageMCUiIrqTableMCUiStackMCUi_HandlerMCUi_ThreadMCUi_GetIrqReason$Ven$lb$$MCU_GetPwswStatus.LTDMAINmcu_intr.o MCUiMessageQ$a$dMCUiPwswStatus$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$tMCUiIsInitializedMCUi_HeartBeatHandlerMCUi_UpdatePwswStatusverInfo@7074@7075$d$tnvramwNvramCheckReadyToReadNvramIsAvailableMemAddr$d$d$dNvramCheckReadyToWrite.bss$t$t$t$t$t$t$Ven$lb$$NVRAM_PageWrite.LTDMAINnvram_instructi$Ven$lb$$NVRAM_SoftwareReset.LTDMAINnvram_instructiSPI_DummyWait$a$a$a$a$a$aSPI_SendWait$Ven$lb$$NVRAM_WriteEnable.LTDMAINnvram_instructi$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$Ven$lb$$NVRAM_WriteDisable.LTDMAINnvram_instructi$Ven$lb$$NVRAM_ReadDataBytes.LTDMAINnvram_instructi$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$Ven$lb$$NVRAM_ReadStatusRegister.LTDMAINnvram_instructiRtcReturnResultRtcBCD2HEX@7312$a$artcWork$d$d$d$d$d$d$d$d$Ven$lb$$RTCi_Unlock.LTDMAINcontrol.o rtcInitializedRtcAlarmIntrRtcThreadrtcMutex$Ven$lb$$RTCi_Lock.LTDMAINcontrol.o RtcPxiCallback$t$t.bss$t$t$t$t$t$t$t$t$t$Ven$lb$$RTC_ReadDateTime.LTDMAINinstruction.o $aRtcGpioTransfer$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tRtcChangeAlarmFormat12to24RtcChangeAlarmFormat24to12$a$a$a$a$a$a$a$a$a$a$d$d$d$d$d$t$t$t$t$t$d$d$d$t$t$t$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t@8193$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$d$d$t$t$t$t$t$t$d$dFATFSi_rtfs_cfg_core.bss$t$t@7222@7215$d$t$t$t$t$t$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@8313__FUNCTION__$7396@8314FATFSi_pc_freefile.data$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_check_media_ioFATFSi_card_failed_handler$d$d$d$d$d$d$d$dFATFSi_check_media_entryFATFSi_check_media$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$dFATFSi_pc_allspace$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$t$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$d$d$d$t$t$t$t$t$t@7080@7081@7082@7083@7084@7085@7077$d@7078@7079FATFSi_rtfs_strtab_string$t$t$d$d$t$t$d@7559$t$t$t$t$t$t$t$t$t$t$t$t$t$d$t$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$dFATFSi_init_fat.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$d$d$t$t$t$d.bss$t$t$tRtcBCD2HEX$d$d$d$d$d$t$t$t$t$t$t$t$d$t$d$d$t$t$t$tFATFSi_pc_add_blkFATFSi_pc_allocate_blkFATFSi_pc_commit_fat_blk$d$d$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_pc_release_blk.rodata$d$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t@7145@7127@7146@7149@7148@7128FATFSi_i_no_print@7151@7153@7152$d$d$t$t$t@7341$d$d$d.bss$t$t$t@7442.data$d$d$t$t@8226@8225$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t.data$Ven$lb$$sdmcPostSleep.WRAMsdmc_api.o @7616$a@7615$d$d$d$d$d$d$d$d$d$d$d$d$d$d_ZZ17FATFSi_sdmcSelecttE12first_select$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t@7342@7341SdmcCache$d$d$d$d$d$d$t$t$t$t$t$tSDCARDi_WriteAesFifoi_sdmcInit@9227i_sdmcEnableFATFSi_aesCounterDefaultSDCARD_Thread.dataSDCARDi_WriteFifoSDCARD_LayerInitsdmcRandEnableSDCARDi_ReadCoreSDCARDi_ReadOS_DisableIrqsdmc_srand@9077$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d@8921@8920@8922sdmcCheckPortContextFATFSi_i_sdmcErrProcessFATFSi_sdmc_tsk_createdSDCARDi_WriteSDCARDi_ReadFifoSDCARDi_ReadAesFifo.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tFATFSi_ulSDCARD_SizeSDCARDi_WriteCore_ZZ17SDCARD_TimerStartmE10timeout_ms@8073SDCARDi_FPGA_irq$Ven$$SDCARDi_CpuSendFast.LTDMAINsdmc_intr.o SDCARDi_CpuRecvFastOS_EnableIrqOS_DisableIrq$a$a$a$a$Ven$$SDCARDi_CpuRecvFast.LTDMAINsdmc_intr.o @8122@8025@8046@8026$d$d@8126$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dSDCARDi_CpuSendFastSYSFPGA_irqSDCARD_ReadyToEnd$t$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t_ZZ18SDCARD_Intr_ThreadPvE1i$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@7968FATFSi_sdmc_drive_no$d$d$d$d$d$d_ZZ19FATFSi_sdmcRtfsCtrliiPvE15initialize_flagi_sdmcIdleCard.bss$t$t$t$t$t$t$tFATFSi_nand_drive_noFATFSi_nand_calculated_fat_params$d$d$dNandFatSpec.bss$t$t$tsdmc_nand_flag_baki_sdmcSetParitysdmc_nand_flagsdmc_nvram_adrsdmc_spi_lockidi_sdmcCheckReadyNvramsdmc_log_initialized$d$d$d$d$d$d$d$di_sdmcGetNvramAdri_sdmcCheckParityi_sdmcGetNvram.bss$t$t$t$t$t$t$t$t$t@7286@7287@7284@7285@7288@7289FATFSi_nandaes_drive_no$d$d.bss$t$tFATFSiHandleManager$d$d$d$d$d$d$d$d$d$t$t$t$t$t$t$t$t$t@9505FATFSi_SDInsertCallbackFATFSiNowOnHeavyCommandFATFSi_CheckHeavyCommandEnd_ZZ27FATFSi_CommandFormatSpecialPvE4work.data@12838@12515@11646@12839@12554FATFSi_CompareNIString@13063@11506@13064@13065FATFSi_CopyLUnicodeString$Ven$lb$$FATFSi_AbortHeavyCommand.WRAMfatfs_command.o@13006FATFSi_NormalizePathFATFSi_GetValidDirectoryHandle@12832_ZZ20FATFSi_NormalizePathPKtPm17OSMountPermissionP18FATFSCommandHeaderE5indexFATFSi_IsValidDrive$aFATFSi_SDRemoveCallbackFATFSiLetterToHandle_ZZ27FATFSi_GetLauncherInfoTablevE5tableFATFSi_GetValidFileHandle$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dFATFSi_RegisterDriveFileFATFSiSpecialDrivesFATFSi_IsMediaProtected@12000@11999FATFSi_IsMediaFatalFATFSi_CheckHeavyCommandBegin@12001@11998@11554@12002@11557@12003@12004@11571FATFSi_GetLauncherInfoTableFATFSi_UnregisterDriveFile@11570$t.bss$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@12941@12840@12940@12841FATFSi_CompareUnicodeStringFATFSiOnceAccessedSDCard@12843@12844@11995FATFSi_VerifyCommandResult_ZZ26FATFSi_VerifyCommandResultim25@enum$8161fatfs_command_cPmE5table@12845FATFSi_UnpackAsciiToUnicode@11997FATFSiUnicodePathBuffer@11996FATFSi_IsShareArchiveNameFATFSiCommandBufferDefault.dataFATFSiLastError$d$d$d$d$d$dFATFSiResultBufferList.bss$t$t$t$t$t$t$tFATFSiRequestFATFSi_AppendRequestFATFSiThreadFATFSi_CommandThread$d$d$d$d$d$t$t$t$t$tFATFSi_CopyUnicodeString$d$t$t$t$tspCallback.rodataDMA_CONFIG$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$d$dsCallbackParam$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t@7343sSrcSizespDstCtrRunCallbackSendMessageSetupDefaultFractionPxiCallbacksNextSlotsThreadStack$Ven$lb$$AES_Init.WRAMaes_hi.o ExclusiveOrAesBlocksRandCountersFractionsMutex$aspSrcAesThreadIsValidAddresssDmaNoForSend$dsMacSize$d$d$d$d$d$d$d$d$d$d$dsThreadsThreadQsDstSizeStepSubKeysDmaNoForRecv$t$t$t$t$t$t$t$t$t$t$t$t$t$t$t$tAesRunsFractionSizesCountersThreadQBuffer$d$d$t$t$t$t$t$a$a$a$a$as_bInitialized_isddcc_readdata_isddcc_readstat$d$d$ds_fResource$t.bss$a$a$d_isdwritechar_nitroemuex$a$a$d$t$a$a$a$a$a_isddcc_readstat$d_isddcc_writedatas_funcRegisterOverlays_bEnabledOverlay$as_funcUnregisterOverlay$ds_bEnableMonitor.bss$as_arAddrMon_isdcallmon_checkSignature.rodata$a$a$a$a$a$a$d$d$d$d$ds_dwAddrMons_bInitialize.bss$a$d$Ven$lb$$_ISDbgLib_Initialize.WRAMstubs_isd.o $a$d$t$t$a$Ven$lb$$WVR_Shutdown.WRAMwvr_sp.o $d$d$t$t$d$tpc_upstat_exMI_InitNDmaConfigSTD_TSNPrintfOS_SetPeriodicAlarmMIi_CpuClear32SDCARD_SetAbortSDCARDi_CpuWriteFifoAessdmcCacheReadFifoAES_SetKeyCOS_TryLockCardFATFSi_NTLowerStringSDK_AUTOLOAD_LIST_ENDsdmcFillFifoFATFSi_fat_devio_writeSDK_LTDAUTOLOAD.LTDMAIN.DATA_ENDSND_StartExChannelNoise_isdint_restoreallFATFSi_sdmc_alm$Ven$$OS_LoadContextWRAM$Ven$$RTCi_GpioStartWRAMOSi_SendToPxiFATFSi_pc_flush_all_filSVC_CalcSHA1OS_TPrintfSDK_AUTOLOAD_SIZEFATFSi_pc_get_cwd_start_AutoloadDoneCallbackFATFSi_pc_fd2fileFATFSi_rtfs_pc_cluster_sizeSDCARDi_DmaReadFifoAes$Ven$$MI_CpuCopy8WRAMFATFSi__synch_file_ptrsFATFSi_pSDCARD_BufferAddr_ll_mulFATFSi_rtfs_port_alloc_mutexSND_StartAlarmSDK_AUTOLOAD_WRAM_STARTFATFSi_CommandFormatDriveFATFSi_pc_path_to_driveno$Ven$$OS_SaveContextWRAMMCU_DisableHeartBeatFATFSi_fatxx_pfaxxSDK_LTDAUTOLOAD_TOP_STARTSDK_WRAM_ARENA_LOSDCARDi_RemoveProcSDPort1ContextMIC_ExecSampling8FATFSi_fileRtfsAttachSDPort0ContextOSi_FuncTerminatePADi_XYButtonAvailableMICEX_DisableMultipleInterruptFATFSi_sdmcRtfsIoCARDi_ReceiveTaskSND_GetChannelControlAES_Reset$Ven$$OS_SetIrqMaskWRAMTP_AnalyzeCommandOSi_ThreadInfoSDK_LTDAUTOLOAD_LIST_ENDSND_SetChannelPanSDK_LTDAUTOLOAD.RSVWRAM.BSS_SIZESD_SelectCardFATFSi_rtfs_pc_format_mediaFATFSi_CommandCheckDiskOS_GetProcModeFATFSi_AbortHeavyCommandFATFSi_pc_firstblockNVRAM_ReadStatusRegisterFATFSi_rtfs_cs_strcpy$Ven$$MI_StopNDmaWRAMNVRAM_Init_ull_modRTCi_GpioEndSND_CommandInitFATFSi_nandAesRtfsAttachOS_RestoreInterruptsFATFSi_GetCurrentDirectoryHandlesFATFSi_unicode_cmp_to_ascii_charSD_SetPullUpOS_InitThreadSTD_GetStringLengthFATFSi_CommandReadFile_u32_div_fFATFSi_file_secptrackFATFSi_CommandDeleteFileRTC_ReadFreeMICEX_IrqHandlerSND_SetChannelVolumeSDK_LTDAUTOLOAD.LTDMAIN.SIZEFATFSi_process_crossed_file_isdint_disableall_iswritestrcons_twl_isdbusmgr_isresourceavailable_twlFATFSi_fatxx_get_chainRTC_ReadDateTimeFATFSi_check_drive_number_presentSD_ClrErrFATFSi_rtfs_pc_get_media_parmsRTC_WriteFoutOSi_TerminateCoreFATFSi_pc_fndnodeFATFSi_CommandCloseFileSVC_GetCRC16CDC_ChangePageFATFSi_crossed_file_coreCARD_InitFATFSi_copybuffFATFSi_NotifyRequestCompletionFATFSi_pc_free_all_i__isdversionsigunature_twlOSi_IrqTimer2OSi_IrqTimer3OSi_IrqTimer0OSi_DetectDebuggerOSi_IrqTimer1OSi_EnterNDmaCallback_isdcallmon_unlockProtect_twlFATFSi_pc_patcmp_vfatSDCARD_UseAesFlagOS_PutStringSDK_SYS_STACKSIZE_SIGNOS_SetVAlarmTagCDC_WriteSpiRegisterAES_LockOS_GetBootTypecardi_rom_baseFATFSi_rtfs_my_alloc_mutexNVRAM_AnalyzeCommandSND_AllocExChannelSVC_WaitIntrFATFSi_current_pdrOS_SetIrqFunctionExRTC_ReadAdjustFATFSi_allocate_chkdsk_coreSND_EnableSVC_UnpackBitsFATFSi_get_bitOS_IrqDummyOSi_IdleThread$Ven$$OS_InitResetWRAMSNDi_SharedWorkSND_ExChannelInitFATFSi_fatxx_pfswapSCFG_InitFATFSi_twfs_pc_set_propertiesMCU_InitIrqSD_StopTransmissionFATFSi_unicode_assign_ascii_charFS_InitAES_CoreOS_EnableSchedulerTPEX_EnableNewBufferModeFATFSi_CommandCloseDirectory__sinit__FATFSi_EnumPublicArchivesOS_SetThreadPrioritySD_SendIfCondNAND_FAT_PARTITION_COUNTFATFSi_text2lfiSDK_STATIC_ETABLE_ENDFATFSi_rtfs_port_release_mutexCDC_StartShutterSoundSDK_STATIC_BSS_START_ull_mulSDK_AUTOLOAD_WRAM_IDNVRAM_SectorEraseTP_ExecuteProcessSD_SendStatusCDC_WriteSpiRegistersExOSi_IsThreadInitializedSND_CalcRandomMIi_CpuPipe32WMSP_GetAllowedChannelSND_EndSleepFATFSi_CommandFormatSpecialFATFS_OpenFileWCDC_InitCurrentPageMI_CpuCopy8_isdcallmon_getMonAddr_twlFATFSi_pc_get_lfn_filenameI2CiSlowRateTableCARDi_ReadRomIDFATFSi_rtfs_po_flushCARDi_WriteBackupCoreFATFSi_pc_sec2indexSDK_AUTOLOAD_LISTFATFSi_AllocateCommandBufferFATFSi_pc_getsysdatePMi_SendPxiCommandMIi_Aes_NDmaSendINIT_InitializeScfgcardi_commonFATFSi_pc_init_inodeFATFSi_sd_stackRTC_InitFATFSi_FreeDirectorySDK_STATIC_SIZEFATFSi_pc_ascii_strn2upperSPIi_ReturnResultFATFSi_CommandRenameFileFATFSi___fat_hash_table_0FATFSi___fat_hash_table_1FATFSi___fat_hash_table_2FATFSi___fat_hash_table_3FATFSi___mem_block_hash_tableFATFSi___fat_hash_table_4FATFSi___fat_hash_table_5FATFSi___fat_hash_table_6ISTDPrintExFATFSi___fat_hash_table_7FATFSi___fat_hash_table_8TPEX_SetTouchPanelDataDepthFATFSi___fat_hash_table_9SND_IsExChannelActiveFATFSi_to_WORDFATFSi_sdmcGetErrCodeSDK_IRQ_STACKSIZE__exception_table_end__FATFSi_rtfs_memsetFATFSi_InitHandleManagerFATFSi_rtfs_port_get_taskidSDCARDi_TransferNVRAM_WriteDisableFATFSi_CommandCreateDirectoryPMi_SetLEDSD_SendRelativeAddrSVC_SoftResetMI_SetNDmaBlockWordSND_CommandProcFATFSi_pc_fat_sizeFATFSi_lfn_chr_to_unicodeOS_InitIrqTableSND_InvalidateBankFATFSi_rtfs_port_putsMIi_Aes_NDmaRecvSDK_STATIC_DATA_STARTFATFSi_fatxx_clnextOSi_InitCommonFATFSi___mem_finode_poolOSi_DoResetSystemSTDi_AttachUnicodeConversionTableFATFSi_prtfs_cfgFATFSi_devio_writeFATFSi_pc_free_all_blkFATFSi_pc_calculate_chsCDC_ReadSpiRegisterFATFSi_add_cluster_to_crossedSDK_LTDAUTOLOAD.RSVWRAM.DATA_ENDOS_ReceiveMessageSDCARD_SectorSizeOSiHeapInfoFATFSi_pc_mkfs32SD_INFO_ERROR_VALUEsMasterPanPXIi_HandlerRecvFifoNotEmptyFATFSi_sdmcGoIdleSDK_LTDAUTOLOAD.LTDMAIN.TEXT_STARTSND_InvalidateWaveFATFSi_rtfs_cs_strcmpNVRAM_ExecuteProcessFATFSi_chain_sizeMI_InitNDmaRTC_ResetCARDi_EraseBackupSubSectorCoreFATFSi_pc_mkfs16FATFS_MountDriveNAND_RAW_SECTORSOSi_UnlockMutexCoreNVRAM_ReadDataBytesAtHigherSpeedCDC_ReadSpiRegistersFATFSi_pc_rmnodePM_SelfBlinkProcFATFSi_print_chkdsk_crossed_filesSDCARDi_CpuReadBufSingleOS_UnlockCardOSi_TickCounterSDK_LTDAUTOLOAD.LTDMAIN.BSS_SIZE$Ven$$OS_GetLockIDLTDMAINRTCi_UnlockTPEX_ExecuteProcessSND_SeqMainFATFSi_pc_finode_statFATFSi_scan_for_bad_lfns$Ven$$MIi_CpuClear32LTDMAINOS_ReadMessageSDCARDi_CpuWriteBufTPEX_SetNewBufferModeOSi_LtdMainParamsFATFSi_pc_free_all_filFATFSi_rtfs_pc_unlinkNVRAM_WriteEnableCDC_UnmuteAudioADCFATFSi_fatxx_freechainOS_LoadContextFATFSi_FreeFileFATFSi_fatxx_fwordSND_SinIdxSD_SetIpBlockLengthFATFSi_get_format_parameters_ll_modFATFSi_pc_nibbleparse$Ven$$OS_ResetRequestIrqMaskWRAMSDK_STATIC_SINIT_STARTSDK_LTDAUTOLOAD.LTDMAIN.IDSDK_LTDAUTOLOAD.LTDMAIN.DATA_STARTFATFSi_pc_commit_fat_tableSD_INFO2_VALUEFATFSi_pc_isdotFATFSi_pc_free_all_usersSPI_InitSDK_STATIC_TEXT_STARTFATFSi_pc_reduceseglistPXI_InitFATFSi_pc_dskfreeSDK_LTDAUTOLOAD_STARTSVC_UncompressRL8MI_CpuFill8FATFSi_devio_write_formatFATFSi_fileDescList$Ven$$_ll_shlWRAMSDK_LTDAUTOLOAD_LTDMAIN_BSS_END_start_ModuleParamsCDCi_IsDACOnSND_SetTrackMuteSPIi_GetExceptionsdmc_slpqTPEX_SetIntervalFATFSi_rtfs_first_stat_flagFATFSi_validate_filename$Ven$$OS_DisableInterruptsWRAMAES_InitSD_SDSTATUSSDK_LTDAUTOLOAD_LTDMAIN_STARTFATFSi_WaitForRequestCARD_IsPulledOutFATFSi_pc_isadir$Ven$$RTCi_GpioSendCommandWRAM_isdcntlenSDK_LTDAUTOLOAD_LTDMAIN_SIZERTCi_GpioSendDataCARD_InitPulledOutCallbackFATFSi_pc_release_bufFATFSi_rtfs_strcpySD_SDStatusSDK_AUTOLOAD.WRAM.DATA_STARTFATFSi_scan_all_files$Ven$$OS_GetProcModeWRAMRTCi_LockOS_LockByWordSND_InitLfoParamSDK_AUTOLOAD.WRAM.TEXT_STARTFATFSi_pc_read_partition_tableFATFSi___mem_drobj_poolFATFSi_critical_error_handlerSND_SetPlayerLocalVariableSVCi_CalcSHA1CoreOSi_SystemCallbackInSwitchThreadSND_BeginSleepOSi_CommonCallback_ll_ushrMCU_GetPwswStatus$Ven$$_ull_mulLTDMAIN$Ven$$OS_BreakIrqHandlerWRAMSND_FreeExChannelFATFSi_unicode_make_printableOSi_IrqCallbackInfoNVRAM_DeepPowerDownSDCARDi_CpuReadFifoFATFSi_pc_seglist2textFATFSi_CommandRenameDirectoryFATFSi_pc_load_file_bufferSTD_CopyLStringPMi_SetControl$Ven$$_ll_ushrWRAMfat16_check_freespace_isdcallmon_twl$Ven$$MIi_CpuSendFastRSVWRAMOSi_UnlockAllMutexSDK_AUTOLOAD.WRAM.TEXT_SIZE_isdrel_initialize_twlSDK_LTDAUTOLOAD.LTDMAIN.SINIT_ENDMI_WaitDmaOS_InitVAlarmOSi_IrqCallbackAES_AddToCounterFATFSi_sdmcWriteAesFifoSD_DisableClockMI_InitWramManagerSD_TransEndFPGAOS_SleepsdmcFillAesFifoFATFSi_pc_gblk0_32CARDi_ProgramBackupCoreOS_DisableInterrupts_IrqAndFiqSND_StopUnlockedChannelFATFSi_sdmc_dma2_noFATFSi_pc_mpathFATFSi_rtfs_print_one_stringFATFSi_pc_log_base_2FATFSi_pc_find_fat_blkPMi_InitShutdownControlSND_SetExChannelSustainFATFSi_pc_ascii_mfileFATFSi_fatxx_pfgdwordSDCARDi_CpuWriteFifo$Ven$$OSi_SendToPxiWRAM_isdcallmon_initialize_twlOS_SpinWaitSysCyclesMCU_CheckIrqI2Ci_WriteRegister$Ven$$MIi_CpuClear32WRAMCARDi_InitStatusRegister$Ven$$OS_DisableInterruptsLTDMAINsdmcIsProtectedSTD_CompareNStringOS_IrqHandlerSDK_AUTOLOAD_WRAM_BSS_ENDblock_devio_fillFATFSi_pc_strchrSND_SetExChannelAttackFATFSi_sdmcSetLatencyEmulationFATFSi_sdmcSetInsertCallbackSDK_LTDAUTOLOAD.LTDMAIN.TEXT_ENDOS_EnableIrqMaskExFATFSi_process_used_mapFATFSi_pc_i_dskopenSDK_AUTOLOAD_NUMBER$Ven$$OS_EnableInterruptsRSVWRAMFATFSi_write_lost_chainsSND_StartSeqTPEX_SetPrechargeTimeFATFSi_fileRtfsIoOS_WakeupThreadDirectSND_SetupChannelNoiseCDC_WriteSpiRegistersFATFSi_rtfs_resource_initFATFSi_pc_next_blockMIi_CpuSend16sdmcInvalidateCacheAESi_PxiSendFirstFATFSi___fat_buffer_8FATFSi_fatxx_find_free_clusterFATFSi___fat_buffer_9FATFSi_pc_update_inodeSDK_LTDAUTOLOAD.LTDMAIN.DATA_SIZESDK_AUTOLOAD.WRAM.ENDFATFSi_pc_test_all_filFATFSi___fat_buffer_0FATFSi_pc_validate_drivenoFATFSi___fat_buffer_1FATFSi_rtfs_pc_format_volumeFATFSi___fat_buffer_2FATFSi___fat_buffer_3FATFSi___fat_buffer_4FATFSi___fat_buffer_5FATFSi___fat_buffer_6FATFSi___fat_buffer_7FATFSi_rtfs_po_writeFATFSi_pc_alloci$Ven$$RTCi_GpioEndWRAMTPEX_ReadBufferFATFSi_sdmcSetRemoveCallbackSDK_AUTOLOAD.WRAM.ID$Ven$$MI_CpuFill8LTDMAINSDCARDi_CpuFillFifoFATFSi_CommandFlushAllCoreFATFSi_fatxx_cl_truncate_dirMI_NDmaPipeAsync_SetUpFATFSi_defaultRtfsIofat32_check_freespaceSNDi_SetSurroundDecaySND_PauseSeq_ull_divSDCARDi_DmaWriteFifoAesSDK_LTDAUTOLOAD.RSVWRAM.SINIT_STARTNVRAM_SoftwareResetTPEX_InitializeRTC_WritePulse$Ven$$MIi_CpuCopy32WRAMOS_CancelAlarmSDK_STATIC_ETABLE_START$Ven$$MIi_CpuRecv16LTDMAINSND_StartIntervalTimer$Ven$$MIi_CpuCopy32LTDMAINFATFSi_rtfs_pc_rmdirFATFSi_CommandGetDriveResourceSD_MultiReadBlockCARDi_CommandReadStatusSDK_LTDAUTOLOAD.RSVWRAM.TEXT_ENDFATFSi_sdmcWriteFifoFATFSi_pc_memory_finodeFATFSi_file_cylindersOS_InitSDK_LTDAUTOLOAD.RSVWRAM.ENDSPI_Lock__exception_table_start__FATFSi_rtfs_pc_get_attributesSVC_HaltOS_GetRunningConsoleType$Ven$$MIi_CpuPipe32LTDMAINFATFSi_sdmc_result_dtqMIC_EnableMultipleInterruptSVC_DivRemMI_NDmaSendAsync_D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ssFATFSi_pc_validate_partition_typeFATFSi_pc_addtoseglistFATFSi_SendToPXISND_StopIntervalTimerSDCARD_TimerStartFATFSi_file_headsSVC_UncompressLZ8FATFSi_pc_discard_bufOSi_EnqueueTailFATFSi_pc_markiFATFSi_sdmc_dma_nosd_last_info1OS_InitMutexSDK_LTDAUTOLOAD.RSVWRAM.STARTOS_SetSwitchThreadCallbackSDK_LTDAUTOLOAD.LTDMAIN.SINIT_STARTFATFSi_count_lost_clustersOS_SetAlarmsdmcSetNandLogFatalOS_DisableInterruptsI2Ci_ReadRegisterSDCurrentAccessFATFSi_rtfs_pc_check_diskOS_InitExceptionEXI2i_RecvBitGpio2CntL$Ven$$MIi_CpuSend16LTDMAINFATFSi_pc_init_drv_fat_info16RtfsMyMutexBufAES_DmaRecvFATFSi_fr_WORDFATFSi_pc_memory_drobjMI_StopAllNDmaNAND_FAT1_SECTORS_ull_sllFATFSi_med_stFATFSi_CommandSetLatencyEmulationSND_LockChannel$Ven$$OS_InitContextWRAMCDC_ReadSpiRegisterExSND_GetWaveDataAddressSND_GetLockedChannelSND_UpdateExChannelEnvelopepc_mknode_exFATFSi_print_chkdsk_statisticssdmc_abort_requestCDC_SwitchOutputDeviceCDC_StopFATFSi_SyncInitializationRTCi_GpioSendCommandFATFSi_ResolveIPLPathFATFS_InitFATFSi_AllocFileOSi_IsTerminatePxiOccurredFATFSi_pc_chain_lengthFATFSi_build_chk_filePM_FlipHeartBeatPM_Initrtfs_get_next_cluster_cacheSVC_WaitVBlankIntrOS_SetIrqMaskExSDK_AUTOLOAD.WRAM.DATA_ENDFATFS_CloseFileFATFSi_pc_map_fat_blockCDC_SetIirFilterPM_AnalyzeCommandFATFSi_pc_write_blkFATFSi_pc_dos2inodeOS_SetIrqFunctionPAD_InitXYButtonFATFSi_PostRequestSPI_UnlockNVRAM_ReadSiliconIdFATFSi_unicode_compare_ncFATFSi_add_cluster_to_lost_listFATFSi__illegal_lfn_charOS_SelectThreadFATFSi_CommandDeleteDirectoryFATFSi_rtfs_set_errno$Ven$$_s32_div_fWRAMAES_RecvSDK_AUTOLOAD.WRAM.BSS_SIZESDCARD_V2FlagFATFSi_scan_crossed_filesMCU_CallIrqFunctionFATFSi_pc_memory_initOS_GetConsoleTypeRTC_ReadCounterOS_DisableIrqMaskExFATFSi_sdmc_intrq_arrayFATFSi_rtfs_po_open__call_via_r5__call_via_r4__call_via_r6__call_via_r1FATFSi_PXICallback__call_via_r0FATFSi_func_SDCARD_OutFATFSi_pc_zero_lfn_info__call_via_r3AESi_PxiHandler__call_via_r2OS_SetPeriodicVAlarmFATFSi_pc_init_blkFATFSi_fatxx_pfaxxtermFATFSi_pc_cppadOS_CancelVAlarmsSND_Init_start_LtdMainParamsOS_ResetRequestIrqMaskNitroSpStartUpFATFSi_auto_format_diskFATFSi_pc_finode_clusterSD_TransReadyFPGAI2C_InitFATFSi_pc_scratch_blkOS_RestoreInterrupts_IrqAndFiqFATFSi_pc_deleteseglistTP_InitSNDi_UnlockMutexMI_SwapWordSDK_LTDAUTOLOAD.RSVWRAM.BSS_ENDNAND_FAT2_SECTORSOSi_SetTerminatePxiOccurredSD_MultiWriteBlockFATFSi_pc_zeroseglistSNDi_DecibelSquareTableSND_StopChannelSDK_LTDAUTOLOAD.LTDMAIN.STARTFATFSi_CommandUnmountDriveFATFSi_rtfs_first_attach$Ven$$MI_StopDmaWRAMFATFSi_pc_freeiFATFSi_check_lost_clustersSDK_SYS_STACKSIZESDK_LTDAUTOLOAD_NUMBERSD_DeSelectCardSDK_AUTOLOAD_WRAM_ENDOS_BreakIrqHandlerCDC_PowerDownAudioADCPM_GetLEDPatternSND_UpdateExChannel_ull_srlSDCARD_AbortFATFSi_pc_delete_lfn_infoSD_EnableSeccntSD_AppOpCondOSi_DetectEmulatorCARDi_EraseChipCoreMI_NDmaRecvAsync_DevCARD_IsCardIreqLoFATFSi_pc_patcmp_vfat_8_3SDK_STATIC_DATA_SIZEOS_CheckHeapFATFSi_pc_isrootFATFSi_CommandMountSpecialFATFSi_InitRequestFATFSi_sd_intr_stackSD_SendOpCondFATFSi_GetCurrentFileHandlesFATFSi_pc_get_parent_clusterFATFSi_pc_parsedriveCDC_SetMicBiasFATFSi_sdmc_current_specSPIi_SetEntryFATFSi_pc_get_inodeAES_SetMacTPEX_SetConversionModeOS_SetCurrentHeapAESi_ReceiveDataSVC_SetSoundBiasMI_NDmaPipeAsync_DevFATFSi_file_adjusted_capacityRTCi_GpioStartFATFSi_pc_enum_fileOS_InitResetCDC_SetSpiParams_ll_shlSDK_SUBPRIV_ARENA_LOSDK_STATIC_DATA_ENDOS_IsResetOccurredFATFSi_ulSDCARD_RestSectorCountOS_CreateAlarmFATFSi_rtfs_pc_gfirst_exOS_InitAllocMI_StopNDma_startsdmc_total_sectorsCARD_GetOwnRomHeaderTWLOS_IRQTableAES_SetCounterFATFSi_CommandSetNdmaParametersOS_SetIrqMaskFATFSi_pc_get_momFATFSi_sdmc_intr_tskFATFSi_pc_allocfileSVC_GetVolumeTableSNDi_SetTrackParamOSi_EnterTimerCallbackI2C_UnlockTPEX_SetStabilizationTimeSDK_STATIC_BSS_ENDNAND_FAT3_SECTORSPM_ExecuteProcessAES_SendSND_UpdateSharedWorkMIC_AnalyzeCommandCARDi_ReadRomIDCoreFATFSi_sdmcRtfsAttachCARDi_LockMutexForARM7FATFSi_lfi2textPMi_GetRegistersOrgVolumeAES_RandSDK_STATIC_SINIT_ENDCDC_GetMicBiasFATFSi_name_is_reservedPMi_DoExitSPIi_CheckExceptionOS_GetTickSD_port_numberFATFSi_rtfs_po_lseekFATFSi_ulSDCARD_SectorCountpc_get_inode_ex_ll_sllMIi_NDmaConfigFATFSiComanndFunctionTableOS_SaveContextSNDEX_GetSamplingRateOSi_IsCodecTwlModeEXIi_SelectRcntFATFSi_fatxx_alloc_chainSND_PrepareSeqSDK_LTDAUTOLOAD_RSVWRAM_IDSDK_LTDAUTOLOAD.LTDMAIN.ENDSVC_ChangeSoundBiasSDK_AUTOLOAD_WRAM_BSS_SIZENVRAM_ReleaseFromDeepPowerDownAES_WaitCARDi_InitResourceLockNDMA_irq_HandlerSVC_CpuSetFast$Ven$$OS_GetLockIDWRAMSNDEX_InitFATFSi_i_sdmcRemovedIntrFATFSi_pc_insert_inodeFATFSi_pc_init_drv_fat_info_start_BuildParams_isdcallmon_restoreProtect_twlOS_GetInitArenaLo$Ven$$_u32_div_fWRAMCDC_GetSystemClock$Ven$$SND_ShutdownWRAMMIi_CpuRecv16FATFSi_pc_free_all_fat_blocksCARDi_InitRom$Ven$$_ull_mulWRAMOS_InitLockMIi_CpuSendFastFATFSi_init_fat12FATFSi_rtfs_pc_gdoneFATFSi_init_fat16AES_SetKeySeedASPIi_ReleaseExceptionFATFSi_CommandSetFileLengthCDC_SetSystemClockFATFSi_fr_DWORDFATFSi_pc_ascii_str2upperFATFSi_sdmc_result_dtq_arra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ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\ARM7.TWL\src\5[L8_start_LtdMainParams5rP8microcode_GotoMainw5X8_start_LtdModuleParamsg58_start_BuildParamsX5*p8_start_ModuleParams5A8microcode_ShakeHandlunsigned longvu32REGType32__file_handlesize_tfpos_tREGType32vu32  $$;( Xint^BOOL^mbstate_t8|85]_starth8$8k5]INITi_DoAutoload$885]INITi_ShelterLtdBinary88J5]_start_AutoloadDoneCallbackjK5Rargv88V5]NitroSpStartUp88h5^]INITi_IsRunOnTwl885]INITi_CopySysConfig885]INITi_DetectMainMemorySize!885]INITi_Copy325(dst5,src50size8L8'5]INITi_Fill32(5(dst(5,value(50size.|| main.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\V HstrMemMAINW 8PstrMemWRAMU IXstrARM7X Z`strFailedCreateHeapY k|strHeapSizeIs,char,,,,long|vs32|fx32|s32^OSHeapHandleunsigned shortMATHCRC16Contextvu16MATHChecksum8Contextwctype_tMATHChecksum16ContextGXRgbREGType16PMBatteryLevelwint_tREGType16vGXRgbaWint_tOSBootTypewchar_tu16unsigned charREGType8REGType8vu8MATHCRC8Contextvu8MINDmaDeviceMATHCRC32ContextFATFSDirectoryHandleOSIrqMaskFSCommandTypeFATFSSeekModeCARDEventFATFSCommandIDOSIntrModeFATFSMediaTypeFSEventFATFSResultPMWakeUpTriggerFATFSFileHandlePMLogicFSOverlayIDVecFx10 NVRAMConfigEx V ncd psaveCount rcrc16 tncd_ex crc16_ex NVRAMConfigExpNVRAMConfigData version pad  owner R alarm Xtp doptionV NVRAMConfigDataPNVRAMConfigOwnerInfo favoriteColor rsv  birthday pad  nickname  comment NVRAMConfigOwnerInfoNVRAMConfigDate month day NVRAMConfigDateNVRAMConfigNickname p str length rsv NVRAMConfigNickname 6NVRAMConfigComment str 4length 5rsv NVRAMConfigComment4NVRAMConfigAlarm hour minute second pad enableWeek  alarmOn rsv NVRAMConfigAlarm NVRAMConfigTpCalibData raw_x1 raw_y1 dx1 dy1 raw_x2 raw_y2 dx2 dy2NVRAMConfigTpCalibData NVRAMConfigOption language  agbLcd  detectPullOutCardFlag  detectPullOutCtrdgFlag  autoBootFlag  rsv input_favoriteColor input_tp input_language input_rtc input_nickname timezone rtcClockAdjust rrtcOffsetNVRAMConfigOptionlong longrfx64rvs64rfx64crs64NVRAMConfigDataEx version language valid_language_bitmap CpaddingNVRAMConfigDataEx || ]TwlSpMain||n|]GX_VBlankIntrn^Penablen|Rrval||^]OS_EnableIrq"Pprep| |B]OS_HaltD ]PrintDebugInfom||D ]InitializeFatfs || ^]InitializeAllocateSystem PmemType ^Phh|@| ^]InitializeAllocateSystemCore UmemType UheapSize j Phi p Plo VheapSize v Phi | Plo ^Thh@|L| ]OS_GetSubPrivArenaLoL|X| ]OS_GetSubPrivArenaHi!X|d|[v]MI_CpuClear8o[v Pdest[vPsized|p| ]OS_GetWramSubPrivArenaLop||| ]OS_GetWramSubPrivArenaHi||p| ]ReadUserInfo> PallowedChannel= enableChannel0  wMac |Ri  Tp |Qcheck   temp |offset|||Yv]MI_CpuCopy32 YvTUsrcYvZTdestYvVsize||lv]MI_CpuClear32Xlv`PdestlvPsize|0|Fv]MI_CpuFill32FvfUdestFvTdataFvVsize<|f|W ^]IsValidConfigExY ipl2_typeh||s ]GetRomValidLanguageTv PlangBitu Pret|| |]CheckCorrectNCDEx lUncdsp Prom_valid_language |Vcrc_flag Pcalc_crc Wi|| ]VBlankIntrS ||0os_irqHandler.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7.TWL\src\ }OSi_IrqThreadQueue"(}breakCtx_OSThreadQueue Hhead HtailOSThreadQueueN_OSThread context Hstate LHnext Pid Tpriority Xprofiler \"queue `(link htmutex l-mutexQueue tstackTop xstackBottom |stackWarningOffset joinQueue yspecific alarmForSleep destructor userParameter ^systemErrnoNOSThreadHOSContext cpsr r 8sp <lr @pc_plus4 Dsp_svcOSContext4 @enumOS_THREAD_STATE_WAITINGOS_THREAD_STATE_READYOS_THREAD_STATE_TERMINATED_OSThreadLink Hprev Hnext(OSThreadLinkzOSMutex queue Hthread |count linkzOSMutex_OSMutexLink tnext tprevOSMutexLink_OSMutexQueue thead ttail-OSMutexQueue ,OSiAlarm Bhandler arg tag Ufire prev next Uperiod $UstartOSAlarmHunsigned long longUvu64UOSTitleIdUREGType64UREGType64vUOSTickUu64$ | |-]OS_IrqHandler  | |]OS_BreakIrqHandler;  ||]OS_IrqHandler_ThreadSwitchp ||Nos_irqTable.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\!d|OSi_IrqCallbackInfoIndex!|OS_IRQTable2]!|OS_IRQTable!L}OSi_IrqCallbackInfo <!!!!/"   G"func enable Z"arg!OSIrqCallbackInfoM"Z"f"@no_name@}""||]OS_IrqDummy"|D|]OSi_IrqCallback#^Pindex`"PcallbackTimaskD|P|&]OSi_IrqDma0E#P|\|,]OSi_IrqDma1k#\|h|2]OSi_IrqDma2#h|t|8]OSi_IrqDma3#t||G]OSi_IrqTimer0#||M]OSi_IrqTimer1$||S]OSi_IrqTimer2/$||Y]OSi_IrqTimer3W$||m]OSi_IrqVBlank$o"Pcallback||]OSi_IrqNDma0$||]OSi_IrqNDma1$||]OSi_IrqNDma2 %||]OSi_IrqNDma33%b|H|Cmos_interrupt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\%/"%%@no_name@&&@no_name@/&| |']OS_InitIrqTablee& ||<]OS_SetIrqFunction&<VintrBit<%Ufunction?%Tinfo>^Si||r]OS_SetIrqFunctionExN'rPintrBitr%Pfunctiont^Ui||]OSi_EnterNDmaCallback'PdmaNo%Pcallback &Parg|(|]OSi_EnterTimerCallback-(PtimerNo&Pcallback5&Parg(|H|3]OS_SetIrqMask(3Tintr6Pprep5^PimeH|X|^]OS_DisableIrq(PprepX|x|>]OS_SetIrqMaskEx-)>TintrAPprep@^Pimex||Q]OS_EnableIrqMask)QTintrTPprepS^Pime||[]OS_EnableIrqMaskEx)[Tintr^Pprep]^Pime||n]OS_DisableIrqMask\*nTintrqPprepp^Pime||x]OS_DisableIrqMaskEx*xTintr{Pprepz^Pime|(|]OS_ResetRequestIrqMask-+TintrPprep^Pime(|H|]OS_ResetRequestIrqMaskEx+TintrPprep^Pime+H||os_pxi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_IsResetOccurred}OSi_IsTerminateOccurredH|T|$^]OS_IsResetOccurred,T|`|5^]OSi_IsTerminatePxiOccurred,`|l|C]OSi_SetTerminatePxiOccurred-l||U]OSi_CommonCallbackp-UPdataXPcommand||]OSi_SendToPxi-PdataUpxi_send_data||os_spinLock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\^}isInitialized.OSLockWord lockFlag ownerID extension.OSLockWord/.&/.8/|R|R]OSi_SyncWithOtherProc 0R^PtypeR.UsyncBufj^Tsum[^TnW.PpconfV.PpfinishU.Pptr2T.Pptr1T||]OS_InitLockD08Ptype||q|]OS_LockByWord0qUlockIDq.Tlockpq/VctrlFuncp|B||]OSi_DoUnlockByWord61PlockID/Ulockp /TctrlFuncp^VdisableFIQt|||]OSi_DoTryLockByWord1UlockID,/Vlockp2/TctrlFuncp^WdisableFIQ|lastLockFlag|||]OS_LockCard2PlockID|||]OS_UnlockCardU2PlockID|||]OS_TryLockCard2PlockID||]OSi_AllocateCardBus2|| ]OSi_FreeCardBus2 ||A|]OS_GetLockID3||]OS_ReleaseLockIDT3PlockID%|X|os_printf.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\y4}OSi_FPutStringHookw4`|OSi_FuncTerminatev4d|OS_FPutStringu4h|OS_PutString/4}common_buffer4^^4,44^444,,,,,,,,,,, s y5cA5OSPrintWChar,5 in out 5buffer5OSPrintServerBufferf5,,||]OS_PutStringDefaultD65Pstr|X|]OS_FPutStringInit6^Uconsole 5TstrPconsoleTypeVintrX|x|]OS_FPutStringDummy7^Tconsole5Pstrx||]OS_FPutStringISTDq7^Uconsole5Tstr||]OS_TPrintf75fmt|X|]OSi_TWarning 8#5Sfile^Pline)5fmtX||]OSi_TPanicj8/5Ufile^Tline55fmt|8|]OS_FPutStringPrnSrv29^Pconsole;5QstrVisOddoutUin_tmpTinf5word5Sp8|X|^]OS_SPrintf}95Pdst5 fmtJX||os_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\T;}OSi_CurrentThreadPtrk;}OSi_StackForDestructora}OSi_RescheduleCountX^}OSi_IsThreadInitialized(}OSi_SystemStackBufferh^}OSi_ThreadIdCount^; }OSi_SystemCallbackInSwitchThreadQ;}OSi_ThreadInfo[< }OSi_IdleThreadStackNN}OSi_IdleThreadMNL}OSi_LauncherThread;NNz;OSThreadInfo isNeedRescheduling irqDepth ;current ;list ;switchCallback;OSThreadInfo!NNNNNNNNN-zzNNNNNNNN;NB=@no_name@Y=N;NNNNNNNNNNN=N=;;==OSThreadResource ^num>OSThreadResourceX||]OSi_InsertLinkToQueue><Pqueue<Pthread<Rprev<Rprev<Tnext||<]OSi_RemoveSpecifiedLinkFromQueuev?<Pqueue<Pthread<Tprev<Snext<Rt||,;]OSi_RemoveMutexLinkFromQueue?,<Pqueue2<Pnext.<Rt|0|t]OSi_InsertThreadToListN@t=Pthreadw=Tprev =St0|\|]OSi_RemoveThreadFromList@=Pthread=Rpre=Qt\||]OSi_RescheduleThread1A$=UnextThread*=TcurrentThread0=Vinfo||]OS_InitThreadYA|p|j]OS_CreateThreadBj6=Uthreadk<=funck_=argke=Tstackk stackSizek$priooPenable|||]OS_ExitThread>B||]OSi_ExitThread_ArgSpecifiedBk=Uthreadq=Targ||]OSi_ExitThread Cw=Parg}=Pdestructor=PcurrentThread|\|]OSi_ExitThread_Destroy[C=TcurrentThread\||]OS_SleepThreadC=Uqueue=TcurrentThreadVenable||]OS_WakeupThreadD=UqueueTenable||]OS_WakeupThreadDirectyD=UthreadPenable||;]OS_SelectThreadD =Pt||g^]OS_SetThreadPriorityDEg=UthreadgWpriokenablej=Vprei=Tt||]OS_GetThreadPriorityE=Pthread||]OS_SleepFUmsecTbak_cpsr=p_threadalarm| |]OSi_SleepAlarmCallbackwF=Parg=Pp_thread=Ppp_thread |@|=]OS_SetSwitchThreadCallbackF=UcallbackPenabled>Tprev@|L|]OSi_IdleThreadProcGL|t|!]OS_DisableSchedulersG$Tcount#Penabledt||9]OS_EnableSchedulerG<Tcount;Penabled|h|p os_context.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\||$]OS_InitContextH%gHPcontext&Qnewpc(Rnewsp|<|^^]OS_SaveContext!I^mHPcontext<|h|]OS_LoadContextaIsHPcontexth| |*os_emulator.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_Platform}OSi_Emulator}OSi_IsDetectedEmulator}OSi_IsDetectedPlatformU|OSi_RunningConsoleTypeCacheJ|tableh|p|4]OS_GetConsoleTypeKp||V]OS_GetRunningConsoleType\KaPemulator||]OSi_DetectEmulatorK| |]OSi_DetectPlatformK | |']OSi_DetectDebuggerK | |^]OSi_IsRunOnTwl Lu |!|Hos_message.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\L OSMessageQueue queueSend queueReceive kMmsgArray |msgCount |firstIndex |usedCountLOSMessageQueueeMwMLLMLM | |!]OS_InitMessageQueueN!LPmq!qMPmsgArray!|PmsgCount | !|7^]OS_SendMessageN7}MTmq7MVmsg7|Uflags9Wenabled!|~!|d^]OS_ReceiveMessage OdMUmqdMTmsgd|Vflagsfenabled!|!|^]OS_ReadMessageOMUmqMTmsg|Vflagsenabled!|#|fos_mutex.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\zzzNzNzzzNzzNzzz!|!|%]OS_InitMutexP%PPmutex!|$"|8]OS_LockMutex#Q8+PUmutex;1PTcurrentThread:Ve$"|0"|V]OS_UnlockMutexaQV7PPmutex0"|h"|d]OSi_UnlockAllMutexQd=PUthreadfCPPmutexh"|"|^]OS_TryLockMutex RIPUmutex^TlockedVsaved"|"|F3]OS_IncreaseMutexCountxRF3%PPmutexH3Ptype"|#|K]OSi_UnlockMutexCoreRKOPUmutexKVtypeO^TunlockedMe#|#|L3]OS_DecreaseMutexCountNSL3%PPmutexN3Ptype#|#|-]OSi_EnqueueTailS-UPPthread-[PPmutexAaPRprev#|#|_]OSi_DequeueItem/T_gPPthread_mPPmutexzsPQprevyyPRnext#|,$|Յos_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\#|#|R]OS_InitT#|,$|i]OSi_InitCommonUW8$|8%|8os_arena.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\^}OSi_Initialized@enumOS_ARENA_MAINOS_ARENA_MAIN_SUBPRIVOS_ARENA_MAINEXOS_ARENA_ITCMOS_ARENA_DTCMOS_ARENA_SHAREDOS_ARENA_WRAM_MAINOS_ARENA_WRAM_SUBOS_ARENA_WRAM_SUBPRIVOS_ARENA_MAX HOSArenaResource 2WinfoVOSArenaResourceH DWlo $UWhi WOSArenaInfo$V$V8$|`$|]OS_InitArenaW`$|$|P]OS_InitArenaHiAndLoWPUVid$|$|dV]OS_GetArenaHiXdUPid$|$|xV]OS_GetArenaLoAXxUPid$|$|V]OS_GetInitArenaHiXUPidPsysStackLoRirqStackLo$|,%|V]OS_GetInitArenaLo YUPidQPprivWramLoHPwramSubLo,%|8%|]OS_SetArenaLonYUPidVPnewLo8%|'|os_alloc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\&Z}OSiHeapInfo$7Z Cell Zprev Znext |size=ZCell=Z=Z HeapDesc |size Zfree ZallocatedZHeapDesc=Z=Z ^currentHeap ^numHeaps [arenaStart [arenaEnd [heapArray[OSHeapInfoZ}[Z}[=ZZ}[=ZZ}[8%|\%|^]OS_SetCurrentHeap\UUid^TheapPenabled^Pprev[PheapInfo\%|%|>Z]OS_InitAllocf]>UVid>[TarenaStart>[WarenaEnd>^UmaxHeapsX[PhdC enabledB^UiASarraySize@[PheapInfo%|0&|^]OS_CreateHeap+^UUid[Tstart[Vend enabled[Pcell[Phd^Uheap[RheapInfo0&|'||]OS_CheckHeap_UWid^Uheapenabled|retValue|Vfree|Ttotal[Pcell[Qhd[QheapInfo'|8*|Jos_exception.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\5k`(}OSi_UserExceptionHandler6`,}OSi_UserExceptionHandlerArg<0}OSi_OriginalHandler9`4}OSi_DebuggerHandler2`8}OSi_ExContextq``T context Hcp15 Lspsr Pexinfo`OSiExContext'| (|r]OS_InitException(a (|(|.]OSi_ExceptionHandlerWa(|(|l]OSi_GetAndDisplayContexta(|)|]OSi_SetExContexta)|8*|]OSi_DisplayExContexta^XiD*|\*|os_timer.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_TimerReservedD*|\*|D]OSi_SetTimerReservedbD^PtimerNum\*|+|os_tick.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_UseTick$^}OSi_NeedResetTimer!U}OSi_TickCounter\*|*|7]OS_InitTickd*|*|[^]OS_IsTickAvailableKd*|*|j]OSi_CountUpTickud*|t+|U]OS_GetTickdUprevUcountHcountLt+|+|]OS_GetTickLoe+|.|;os_alarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\}OSi_UseAlarm e}OSi_AlarmQueueOSiAlarmQueue fhead ftail'ffffOSAlarmResource ^numfOSAlarmResource+|+|7]OSi_SetTimerQg7-fTalarm;VtimerCount:UPPtick9rPPdelta+|,|f]OS_InitAlarmxg,|,|^]OS_IsAlarmAvailableg,|$,|]OS_CreateAlarmg3fPalarm$,|,|]OSi_InsertAlarmyh9fTalarmUVUfireUPPtick?fRnextEfPprev,|P-|]OS_SetAlarm iKfUalarmUVTtickQfWhandlerWfargPenabledP-|-|B]OS_SetPeriodicAlarmiB]fUalarmBUVTstartBUperiodBcf$handlerCif(argEPenabled-|.|m]OS_CancelAlarm$jmofUalarmpTenabledoufPnext.|.|]OSi_AlarmHandlercj{farg$.|.|]OSi_ArrangeTimerjfThandlerfPnextUPPtick.| 2|A[os_valarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\$}OSi_UseVAlarm(|}OSi_PreviousVCount'|}OSi_VFrameCount k}OSi_VAlarmQueueOSiVAlarmQueue .lhead qmtail4l(OSiVAlarm %mhandler 8marg tag frame >mfire >mdelay kmprev kmnext ^period ^finish $^canceled4lOSVAlarm+m8mshort>mvs16>mfx16>ms164l4l4l4l4l4l4l4l4l8m4lm4l4l4l4l4lmOSVAlarmResource ^nummOSVAlarmResource.|.|V]OS_InitVAlarmLn.|.|^]OS_IsVAlarmAvailable{n.|X/|]OSi_InsertVAlarmnwmPalarm}mQnextmPprevX/|/|]OSi_DetachVAlarmGomPalarmmRnextmQprev/|/|!]OS_CreateVAlarmo!mPalarm/|/|s]OS_SetPeriodicVAlarmNpsmUalarms>mTcounts>mVdelaysmWhandlersm argw|PcurrentVFrameuenabled/|<0|]OSi_SetNextVAlarmpmTalarm<0|h0|]OS_SetVAlarmTagpmUalarmTtagh0|0|]OS_CancelVAlarm5qmUalarmPenabled0|0| ]OS_CancelVAlarmsq Utag$mPnext#mPalarm"Venabled0|1|I]OSi_VAlarmHandlerrO|TcurrentVFrameLmThandler1| 2||]OSi_GetVFramecr|TvcountPenabled 2|2|{os_system.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\@enumOS_PROCMODE_USEROS_PROCMODE_FIQOS_PROCMODE_IRQOS_PROCMODE_SVCOS_PROCMODE_ABORTOS_PROCMODE_UNDEFOS_PROCMODE_SYS 2|42|']OS_EnableInterruptss42|H2|;]OS_DisableInterruptstH2|`2|O]OS_RestoreInterruptsKtOPstate`2|t2|{]OS_DisableInterrupts_IrqAndFiqtt2|2|]OS_RestoreInterrupts_IrqAndFiqtPstate2|2|r]OS_GetProcModet2|2|]OS_SpinWaitSysCycles?uPcycle2|2|.os_systemWork.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\;^}retval;^ĸ}initialized@OSBootInfo boot_type length rssi iwbssid ssidLength zwssid .capaInfo 0wrateSet 4beaconPeriod 6dtimPeriod 8channel :cfpPeriod <cfpMaxDuration >rsv1vOSBootInfo  basic support2|2|!]OS_GetBootTypew2|2|8^]OSi_IsCodecTwlModex2||os_reset.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\5ȸ}OSi_IsInitReset-x|OSi_LtdMainParamsy2|3|A]OS_InitReset.y$3|p3|]OS_ResetSystemhyTn||]OSi_DoResetSystemy|<|^]OSi_DoBooty||]OSi_ReloadTwlRomDatayos_ownerInfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\TOSOwnerInfo language favoriteColor T{birthday {nickName nickNameLength {comment RcommentLengthzOSOwnerInfoOSBirthday month dayT{OSBirthday 62 os_ownerInfoEx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\VOSOwnerInfoEx language favoriteColor T{birthday Y}nickName nickNameLength j}comment RcommentLength Tcountry Upadding]|OSOwnerInfoEx 6(OSTWLSettingsData ~flags ŀrsv country language rtcLastSetYear rrtcOffset րagreeEulaVersion pad1 pad2 pad3 0pad4 D+owner CparentalControl{}OSTWLSettingsData __anon isFinishedInitialSetting isFinishedInitialSetting_Launcher isSetLanguage isAvailableWireless rsv isAgreeEULAFlagList raw isFinishedInitialSetting isFinishedInitialSetting_Launcher isSetLanguage isAvailableWireless rsv isAgreeEULAFlagListPOSTWLOwnerInfo userColor rsv pad ܁birthday !nickname 2comment+OSTWLOwnerInfoOSTWLDate month day܁OSTWLDate 6OSTWLParentalControl Fflags :rsv1 ogn ratingAge secretQuestionID secretAnswerLength Krsv \password msecretAnswerCOSTWLParentalControl isSetParentalControl pictoChat dsDownload browser prepaidPoint photoExchange ugc rsv,@OSTWLWirelessFirmwareData data rsv~OSTWLWirelessFirmwareData3|T4|os_entropy.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\3|T4|!]OS_GetLowEntropyData!Ubuffer%TmacAddress]T4|4|os_terminate_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7\src\,^̸}terminated,^и}sentT4|4|$]OS_Terminate4|4|6^]OS_EnableIrq.6Pprep4|4|l]OSi_TerminateCoreZos_event.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\  flag queueOSEvent8os_application_jump.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ LauncherParam "header bodyӈLauncherParamLauncherParamHeader magicCode version bodyLength crc16"LauncherParamHeaderLauncherParamBody v1LauncherParamBody UprevTitleID UbootTitleID Lflags YrsvLauncherBootFlags isValid bootType  isLogoSkip  isInitialShortcutSkip  isAppLoadCompleted  isAppRelocate rsvLLauncherBootFlags> ||gmi_ndma.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\#(|MIi_NDmaConfig@9_MINDmaConfig intervalTimer prescaler blockWord wordCount9MINDmaConfig@enumMIi_NDMA_TYPE_FILLMIi_NDMA_TYPE_COPYMIi_NDMA_TYPE_SENDMIi_NDMA_TYPE_RECVMIi_NDMA_TYPE_PIPEMIi_NDMA_TYPE_HBLANKMIi_NDMA_TYPE_HBLANK_IFMIi_NDMA_TYPE_MMCOPYMIi_NDMA_TYPE_GXCOPYMIi_NDMA_TYPE_GXCOPY_IF MIi_NDMA_TYPE_CAMERACONT  9    9 9 9|H|L]MIi_GetControlData&LPndmaTypeNPcontDataH|4|]MIi_NDmaAsync_withConfig_DevondmaTypeWndmaNoTsrcdest data$sizeUcallback,arg"Vconfig4dev8enableenabledVcontData4|L| ]MI_InitNDmaL||P]MI_NDmaPipeAsync_SetUp?PVndmaNoP(UsrcP.TdestPPsizeP40callbackP:4arg||7]MI_NDmaSendAsync_Dev7VndmaNo7@Usrc7FTdest7Psize7L0callback7R4arg78dev||U]MI_NDmaRecvAsync_DevUVndmaNoUXUsrcU^TdestUPsizeUd0callbackUj4argU8dev|X|s]MI_NDmaPipeAsync_DevpsVndmaNospUsrcsvTdestsPsizes|0callbacks4args8devX|p|^]MI_IsNDmaBusyPndmaNop||]MI_WaitNDmaTndmaNoPdmaCntpPenabled||]MI_StopNDma~TndmaNoPregContPenabled||]MI_StopAllNDma||$]MI_NDmaRestart$TndmaNo|$|{]MI_SetNDmaInterval]{PndmaNo{PintervalTimer{Pprescaler$|0|]MI_SetNDmaBlockWordPndmaNoPword0|<|]MI_SetNDmaWordCountPndmaNoPwordCount<|d|]MI_InitNDmaConfig]^UnTpd||]MIi_Aes_NDmaSendUndmaNoTsrcPsizePcallback(arg,pConfig||]MIi_Aes_NDmaRecvUndmaNoTdestPsizePcallback(argĎ,pConfig4|5|3mi_sharedWram.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\Ը}resultPtr ^ظ}sInitialized^ܸ}lockØ}finishPtr^@enumMI_WRAM_AMI_WRAM_BMI_WRAM_C4|5|]MI_InitWramManager35|5|]MIi_CallbackForPxiǙPdata^PsendTypeUretvalɘPwramPparam5|5|^]MIi_DoLockWramSlotsɘPwramPslots5|5|^]MIi_DoUnlockWramSlotsuɘPwramPslots5|6|)Qmi_dma.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ b32 b16 MIiDmaClearSrc5|<6|]MI_WaitDmaٛTdmaNoKPpQPdmaCntpPenabled<6|6|]MI_StopDmaOTdmaNoWPp]PdmaCntpPenabled6|6| ]MI_StopAllDmaw6|t9|yomi_memory.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\6|6|]MIi_CpuSend16PsrcpQdestpRsize6|6|]MIi_CpuRecv16JPsrcp$QdestpRsize6|6|X]MIi_CpuClear32XPdataX*QdestpXRsize6|7|o]MIi_CpuCopy32o0Psrcpo6QdestpoRsize7|07|]MIi_CpuPipe32u<srcpBQdestpRsize07|7|]MIi_CpuSendFastڟHPsrcpNQdestpRsize7|8|]MI_CpuFill8:TPdstpQdataRsize8|H9|x]MI_CpuCopy8xZPsrcpx`QdstpxRsizeH9|t9|^]MI_CpuComp8@fPmem1lPmem2Psize^Pdr\p1endxPp2~Pp1t9||9| mi_swap.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\t9||9|+]MI_SwapWord0+PsetData+١QdestpImi_uncompress.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ srcNum srcBitNum destBitNum destOffset destOffset0_onϢMIUnpackBitsParammi_stream.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\ ŤinitStream terminateStream readByteStream readShortStream )readWordStreamMIReadStreamCallbacksˤ|| /|9|9|mi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\|9|9|!]MI_Initkmi_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\MICache pagewidth Qvalid Qinvalid Qloading ^valid_total ^invalid_total ^loading_totalMICacheW MICachePage Qnext offset bufferWMICachePage MIDevice userdata Read AWriteMIDevice"^G^W9|,:|pad_xyButton.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pad\ARM7\src\^}PADi_XYButtonAvailable}PADi_XYButtonAlarm9|9|)^]PAD_InitXYButton|9|,:|X]PADi_XYButton_Callback]Ufold,:|4:|pxi_init.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\,:|4:|)]PXI_Init4:|X<|Hpxi_fifo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\}FifoCtrlInita}FifoRecvCallbackTablerx^@enumPXI_FIFO_TAG_EXPXI_FIFO_TAG_USER_0PXI_FIFO_TAG_USER_1PXI_FIFO_TAG_SYSTEMPXI_FIFO_TAG_NVRAMPXI_FIFO_TAG_RTCPXI_FIFO_TAG_TOUCHPANELPXI_FIFO_TAG_SOUNDPXI_FIFO_TAG_PMPXI_FIFO_TAG_MIC PXI_FIFO_TAG_WM PXI_FIFO_TAG_FS PXI_FIFO_TAG_OS PXI_FIFO_TAG_CTRDG PXI_FIFO_TAG_CARDPXI_FIFO_TAG_WVRPXI_FIFO_TAG_CTRDG_ExPXI_FIFO_TAG_CTRDG_PHIPXI_FIFO_TAG_MIPXI_FIFO_TAG_AESPXI_FIFO_TAG_FATFSPXI_FIFO_TAG_CAMERAPXI_FIFO_TAG_WMWPXI_FIFO_TAG_SCFGPXI_FIFO_TAG_SNDEXPXI_FIFO_TAG_SEAPXI_MAX_FIFO_TAG x@enumPXI_PROC_ARM9PXI_PROC_ARM7 e rawjPXIFifoMessage tag err data@enumPXI_FIFO_SUCCESSPXI_FIFO_FAIL_SEND_ERRPXI_FIFO_FAIL_SEND_FULLPXI_FIFO_FAIL_RECV_ERRPXI_FIFO_FAIL_RECV_EMPTYPXI_FIFO_NO_CALLBACK_ENTRY4:|:|(]PXI_InitFifo+Venabled*^Si:|(;|]PXI_SetFifoRecvCallbacks^Ufifotag/TcallbackRenabled(;|P;|^]PXI_IsCallbackReady˰^Pfifotag5PprocP;|~;|^]PXI_SendWordByFifoK^PfifotagPdata^Perrfifomsg;|;|]PXIi_SetToFifoUdataPenabled;|X<|*]PXIi_HandlerRecvFifoNotEmpty.Ptag-Pret_code,fifomsgX<|D=|#std_string.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\,,,,,,,,,,,,,,X<||<|-]STD_CopyStringm-Pdestp-Psrcp/ŲUretval|<|<|i^]STD_CopyLStringi˲SdestpiѲPsrcpi^VsizײUs^Ti<|<|]STD_SearchStringbݲPsrcpPstr^Tn^Pi<|<|;^]STD_GetStringLength;Pstrg^Rn<|=|^]STD_CompareStringPstr1Pstr2=|D=|6^]STD_CompareNString6Pstr16Pstr26^Plen^Ud^Tc~^SiD=|FE|QBstd_sprintf.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\,,,,,,,,,,D=|^=|t^]STD_TSNPrintft:PdsttPlent@fmtv^Pret`=|FE|^]STD_TVSNPrintfZFdstlenLWfmtRvlist^Pn_pad^Pd^PdUPPr^PdPrUv^Pd|UPPvalQ,Vpad>XSp_buf=^Rn_buf3,Qpad*^Pc^Pp_start,Phex_char^mJ|J|8]SND_CalcTimer8^Ubase_timer8^Ppitch_<^Ppitch;^Tshift:UPPtimerJ|DK|]SND_CalcChannelVolume^TdBPvolumeQshiftDK|K|]SND_SinIdxV^PindexK|K|]SND_CalcRandomK|}sndMesgBuffer=L}sndMesgQueue<}sndAlarm:N,}sndThread;к}sndStack UK|K|v]SND_Init.vUthreadPrioK|(L|]SND_StartIntervalTimer_(L|8L|]SND_StopIntervalTimer8L|LL|^]SND_SendWakeupMessageLL|NL|]SNDi_LockMutexPL|RL|]SNDi_UnlockMutexTL|L|(]SndAlarmCallback>L|Ծ}sLockChanneljQD|channel_orderjbT|attack_tableyTSNDExChannel myNo type env_status active_flag start_flag auto_sweep sync_flag pan_range original_key >muser_decay2 key velocity init_pan user_pan >muser_decay >muser_pitch |env_decay |sweep_counter |sweep_length attack sustain decay release "prio #pan $volume &timer (lfo 2>msweep_pitch 4|length 8wave D\__anon Ddata DHduty Hcallback Lcallback_data PnextLinkySNDExChannel SNDLfo 5param delay_counter counterSNDLfoSNDLfoParam target speed depth range delay5SNDLfoParam SNDWaveParam format loopflag rate timer loopstart looplenSNDWaveParam data HdutyySNDExChannelCallbackStatusSND_EX_CHANNEL_CALLBACK_DROPSND_EX_CHANNEL_CALLBACK_FINISHyyyyyyyyyyyyyyyyyy5yM|M|\]SND_ExChannelInit_^Rch^sPch_pM|O|w]SND_UpdateExChannelhz^UchyTch_pO|Q|]SND_ExChannelMain<^doPeriodicProcGVvolumeFPtimer|Upan|pitch|Wdecay^ch"Tch_pQ|Q|^]SND_StartExChannelPcm(Vch_p.Uwave4Pdata|PlengthQ|R|^]SND_StartExChannelPsg':Pch_pHPduty|PlengthR|mextFader tracks tempo tempo_ratio tempo_counter pad__ bankSNDPlayer<SNDBankData _fileHeader .blockHeader waveArcLink 8instCount <instOffsetSNDBankDataSNDBinaryFileHeader signature byteOrder version fileSize headerSize dataBlocks_SNDBinaryFileHeader,SNDBinaryBlockHeader kind size.SNDBinaryBlockHeader SNDWaveArcLink waveArc nextSNDWaveArcLink<SNDWaveArc _fileHeader .blockHeader topLink reserved 8waveCount <waveOffsetSNDWaveArc@SNDTrack active_flag note_wait mute_flag tie_flag note_finish_wait porta_flag cmp_flag channel_mask_flag pan_range prgNo volume volume2 pitch_bend bend_range pan ext_pan >mextFader >mext_pitch attack decay sustain release prio transpose porta_key porta_time >msweep_pitch 5mod channel_mask |wait $nbase (ncur ,tcall_stack 8loop_count ;call_stack_depth <channel_listSNDTrack ny@enumSND_SEQ_MUTE_OFFSND_SEQ_MUTE_NO_STOPSND_SEQ_MUTE_RELEASESND_SEQ_MUTE_STOP@enumSEQ_ARG_U8SEQ_ARG_S16SEQ_ARG_VMIDISEQ_ARG_RANDOMSEQ_ARG_VARIABLE>myyyyy>mV|W|]SND_SeqInit-^TtrackNo^VplayerNoPplayer_pW|W|]SND_SeqMain^doPeriodicProcplayerStatus^VplayerNoTplayer_pW|X|-]SND_PrepareSeq-^playerNo-WseqBase-seqOffset-Ubank_p4UtrackBitMask3Pcommand2^PtrackID1^VtrackNo/Tplayer_pX|0Y|]ReadByteUtrack_p0Y|HY|]SND_StartPreparedSeq7^PplayerNoHY|lY|]SND_StartSeq^TplayerNoPseqBasePseqOffsetPbank_plY|Y|]SND_StopSeq^TplayerNoPplayer_pY|Y|]SND_PauseSeq^PplayerNo^Pflag^UtrackNoPtrack_pPplayer_pY|pZ|]SND_SkipSeqO^PplayerNoVtickUskipCount^UtrackNoPtrack_pTplayer_ppZ|Z|']SND_SetTrackMute'^PplayerNo'UtrackBitMask'Wmute+^TtrackNo*8Ptrack_p)>Pplayer_pZ|Z|I]SND_SetTrackAllocatableChannelI^PplayerNoIUtrackBitMaskIPchBitMaskM^TtrackNoLDPtrack_pKJPplayer_pZ|T[|l]SND_InvalidateSeqxlPWstartlVendq^UtrackNop\Ptrack_po^TplayerNonbPplayer_pT[|[|]SND_InvalidateBankhUstartnVend^TplayerNotPplayer_p[|[|]SNDi_SetPlayerParam^PplayerNoPoffsetPdata^PsizezPplayer_p[|,\|]SNDi_SetTrackParamq^PplayerNoUtrackBitMaskWoffsetdata^Tsize^VtrackNoPtrack_pPplayer_p,\|P\|/]InitCache/PptrP\|l\|V]Read16VUtrack_pXPretl\|\|`]Read24<`Ttrack_pbUret\|]||]ReadArgUtrack_pVplayer_pPargType>mUmax>mTmin|PrandPvarPtrPvarNo|Pvar]|]|]InitTrackO Utrack_p]|]|]StartTrack&Ptrack_p,PseqBasePseqOffset]|]|=]ReleaseTrackChannelAllA=2Ttrack_p=8Pplayer_p=^Urelease?>Tch_p]|^|^]FreeTrackChannelAll^DTtrack_p`JUch_p^|0^|P]GetPlayerTrackVPplayer_p^PtrackNoPtrackID0^|l^|]ClosePlayerTracku\Uplayer_p^TtrackNobPtrack_pl^|^|]FinishPlayerhTplayer_p^UtrackNo^|^|]ChannelCallback_nUdrop_pPstatustTuserDatazQch_pPtrack_p^|_|0]UpdateTrackChannel50Utrack_p0Qplayer_p0^doRelease8|Spitch7|Rpan6|Qdecay23|Pdecay2Tch_p_| g|^]PlayerSeqMainplayer_p^ doNoteOn^ trackNo^$active_flagTtrack_p g|Tg|<]GetVariablePtr+<Pplayer_p<^PvarNoTg|g|]^]AllocTrack}`^PtrackID_Ptrack_pg|g|{]SetTrackMute{Ttrack_p{Pplayer_p{Pmutesnd_midiplayer.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\ SNDMidiPlayer bank track  main_volume  prio  padSNDMidiPlayer %SNDMidiTrack Wchannels 5mod >msweep_pitch prgNo pitchbend porta_time volume pan expression transpose prio bendrange porta_flag porta_key attack decay sustain release rpnLSB rpnMSB nrpnLSB nrpnMSB rpn_flag pad1 pad2%SNDMidiTrackhSNDMidiChannel chp key pad1 pad2hSNDMidiChannelyg|i|;snd_bank.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\ SNDInstData type padding_ paramSNDInstData SNDInstParam wave original_key attack decay sustain release panSNDInstParamSNDKeySplit key instOffsetSNDKeySplit(SNDDrumSet min max instOffset(SNDDrumSetSNDInstPos prgNo indexSNDInstPos SNDWaveData param , samplesSNDWaveDatayg|h|^]SND_ReadInstData9 zUbank^WprgNo^VkeyTinst6RkeySplit5^Pindex%"PdrumSetPinstOffseth|h|I= ]SND_GetWaveDataAddress IC UwaveArcI^TindexLPoffsetKI Twaveh|i|t^]SND_NoteOn tO Uch_pu^keyu^velocityu|VlengthuU  banku[ Tinsty^Presultx^Wreleasewa Pwave_datai|Hj|snd_work.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\By }SNDi_SharedWorkF }SNDi_Work SNDSharedWork finishCommandTag playerStatus channelStatus captureStatus [ padding l player ` globalVariable SNDSharedWork@} $ variable tickCounter >m >mSNDWork Achannel @Rplayer ctrack talarm SNDWork@y@@SNDAlarm enable id count padding setting alarmSNDAlarm Utick UperiodSNDDriverInfo work chCtrl workAddress lockedChannels paddingESNDDriverInfo@  SNDChannelInfo ^activeFlag ^lockFlag volume pan pad_ envStatusSNDChannelInfoSNDEnvStatusSND_ENV_ATTACKSND_ENV_DECAYSND_ENV_SUSTAINSND_ENV_RELEASE SNDPlayerInfo ^activeFlag ^pauseFlag trackBitMask tempo volume pad_ pad2_"SNDPlayerInfoSNDTrackInfo prgNo volume volume2 pitchBend bendRange pan transpose pad_ chCount channelSNDTrackInfoi|i|]SND_SetPlayerLocalVariablee^PplayerNo^PvarNo>mPvari|i|]SND_SetPlayerGlobalVariable^PvarNo>mPvari|Hj|]SND_UpdateSharedWork=^VchNoUcaptureStatusTchannelStatusHj|k|Vsnd_alarm.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\Hj|pj|U]SND_AlarmInit<W^UalarmNopj|j|`]SND_SetupAlarm`^PalarmNo`UVUtick`Uperiod`^idbTalarmj|Hk|u]SND_StartAlarmdu^UalarmNozUargyTalarmxUVWperiodwU tickHk|tk|]SND_StopAlarm^PalarmNoTalarmtk|k|]AlarmHandlerUargTalarmPmsgk|p|snd_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\HLx}sCommandMesgQueueG}sCommandMesgBuffer SNDCommand knext qid argSNDCommandSNDCommandIDSND_COMMAND_START_SEQSND_COMMAND_STOP_SEQSND_COMMAND_PREPARE_SEQSND_COMMAND_START_PREPARED_SEQSND_COMMAND_PAUSE_SEQSND_COMMAND_SKIP_SEQSND_COMMAND_PLAYER_PARAMSND_COMMAND_TRACK_PARAMSND_COMMAND_MUTE_TRACKSND_COMMAND_ALLOCATABLE_CHANNEL SND_COMMAND_PLAYER_LOCAL_VAR SND_COMMAND_PLAYER_GLOBAL_VAR SND_COMMAND_START_TIMER SND_COMMAND_STOP_TIMER SND_COMMAND_SETUP_CHANNEL_PCMSND_COMMAND_SETUP_CHANNEL_PSGSND_COMMAND_SETUP_CHANNEL_NOISESND_COMMAND_SETUP_CAPTURESND_COMMAND_SETUP_ALARMSND_COMMAND_CHANNEL_TIMERSND_COMMAND_CHANNEL_VOLUMESND_COMMAND_CHANNEL_PANSND_COMMAND_SURROUND_DECAYSND_COMMAND_MASTER_VOLUMESND_COMMAND_MASTER_PANSND_COMMAND_OUTPUT_SELECTORSND_COMMAND_LOCK_CHANNELSND_COMMAND_UNLOCK_CHANNELSND_COMMAND_STOP_UNLOCKED_CHANNELSND_COMMAND_SHARED_WORKSND_COMMAND_INVALIDATE_SEQSND_COMMAND_INVALIDATE_BANKSND_COMMAND_INVALIDATE_WAVE SND_COMMAND_READ_DRIVER_INFO!k|k|n]SND_CommandInitk|Lp|]SND_CommandProc]PM_Init&@|Si t|t|^]PM_AnalyzeCommand('^Pdatae|Ti`Tcommandt|u|]PM_ExecuteProcess'&UentryPresultUparameterTprocNumberPeu|u|]PMi_ReturnResult;(PcommandPresult^UerrTdata u|u|Tpm_send.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\u|u|2]PMi_SendPxiCommandI)2Pcommand2Pdata4Upxi_send_datav|v|8spm_pmic.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\v|Dv|>]PMi_SetRegister4*>Preg>UdataDv|\v|]SPI_SendWaito*Pdata\v|v|Z]PMi_GetRegister*ZPregv|v|y]PMi_SetControl*yTsw{Pdatav|v|]PMi_ResetControlJ+TswPdatav|z|pm_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\S,|PMi_LEDStatus!,h|PMi_AmpGainLevelTableq,СstrBadLEDMessage@enumPM_LED_NONEPM_LED_ONPM_LED_BLINK_LOWPM_LED_BLINK_HIGH,v|y|8]PMi_SwitchUtilityProc-8PprocNumber8Tparameter:^Qn^PdsGain^PdsGainPtwlGainRny|y|H]MCU_ReadRegister-HTregJPitrmy|z|0^]MCU_WriteRegisterK.0Ureg0Tdata2Pitrmz|8z|t]PMi_SetLED.tS,Tstatus8z|nz|]PMi_SetSoundPower.^Pboolpz|z|]PMi_DoShutdown.z|||޳pm_sleep.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\)/}PMi_PreDmaCnt"/strDmaStopMessage ,z|d{|4]PMi_PreSleepForDmah0`/PndmaCntp</PdmaCntp6Tid{|||]PMi_DoSleep1UtriggerkeyPatternWbacklightPb1^Trcnt_reg_restorercnt_reg_backup pmic_reg_backupprepIntrMask2prepIntrMaskprepIntrMode)||}|upm_selfBlink.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\@}PMi_BlinkCounterC2}PMi_BlinkPatternNo4|PMi_BlinkPatternData@enumPM_LED_PATTERN_NONEPM_LED_PATTERN_ONPM_LED_PATTERN_BLINK_LOWPM_LED_PATTERN_BLINK_HIGHPM_LED_PATTERN_BLINK1PM_LED_PATTERN_BLINK2PM_LED_PATTERN_BLINK3PM_LED_PATTERN_BLINK4PM_LED_PATTERN_BLINK5PM_LED_PATTERN_BLINK6 PM_LED_PATTERN_BLINK8 PM_LED_PATTERN_BLINK10 PM_LED_PATTERN_PATTERN1 PM_LED_PATTERN_PATTERN2 PM_LED_PATTERN_PATTERN3PM_LED_PATTERN_WIRELESS4   Upattern patternSize patternResolution4PMiBlinkPatternData4||}|N]PM_SelfBlinkProcZ5QS,PnextStatusP4Up}|}|]PM_SetLEDPattern52Ppattern}|}|2]PM_GetLEDPattern5||apm_shutdown.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\5^|PMiMCUPwswCallbackCalled7^|PMiInTerminate6^|PMiMCUBatteryEmptyCallbackCalled$7strDoExit)7 strUnknown#7strARM7&7$strBatteryLevelZero% 84strResetOccured'8HstrPWSWReset(+8`strPWSWShutdown, , , ,,,,||<]PMi_DummyHandlerg8|x|M]PMi_InitShutdownControl8OUenabled}|}| ]MCU_GetBatteryLevel8x||z]PMi_MCUPwswCallback 9||]PMi_MCUResetCallback;9||]PMi_MCUShutdownCallbackm9| |]PMi_MCUBatteryLowCallback9 |<|]PMi_MCUBatteryEmptyCallback9<||]PMi_DoResetHardware:|L|]PMi_DoExit*:L||C]PM_FlipHeartBeath:GPval||Y]PM_SetMcuForTerminate:dgt_md5.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\XMATHMD5Context (<__anon <__anon a b c d <state Ulength <__anon =buffer32 )=buffer83;MATHMD5Context <__anon a b c d <state a b c d@ =buffer32 )=buffer8@@?MATHiHMACFuncs dlength blength >context >hash_buf >HashReset 6>HashSetSource >HashGetDigest:=MATHiHMACFuncs>@no_name@0><>@no_name@s>@no_name@y>@no_name@>@no_name@>@no_name@>Ldgt_sha1.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\`MATHSHA1Context ?h ?block Tpool Xblocks_low \blocks_highT?MATHSHA1Context@?~crc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\MATHCRC8Table @table@MATHCRC8TableMATHCRC16Table *Atable@MATHCRC16TableMATHCRC32Table yAtable;AMATHCRC32Table?net_sha256.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\math\common\src\lMATHSHA256Context Bh Nl $Nh (Bdata h^num(BMATHSHA256Context @?}||mscfg_proc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\C}SCFGi_MessageBufferL}SCFGi_MessageQueue"N}SCFGi_Thread# Dh}SCFGi_StackDU}|0~|6]SCFG_InitFD0~|h~|R]SCFGi_CommonCallbackDRPpxiDatah~|~|s]SCFGi_SendPxiDataEsPcommandsPordinalsPdatauUpxiData~||]SCFGi_ExecvEPregValueDmessage^UindexP|Ԃ|t3tp_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\h}valid_cnti}invalid_cnt_Fl}tpwTPWork Fcommand Gstatus $|range (|rangeMin ,GvAlarm GvCount_FTPWork TPStatusTP_STATUS_READYTP_STATUS_AUTO_STARTTP_STATUS_AUTO_SAMPLINGTP_STATUS_AUTO_WAIT_END4lGSPITpData He raw Hbytes HhalfsGSPITpData x  y  touch validity dummy ||2]TP_InitH4|Si||]SPI_DummyWaitI||l]TP_AnalyzeCommandIlPdataTcommandq|Ti|$|]TP_AutoAdjustRangeIGPtpdataPdensity$||"]TP_ExecuteProcessyJ"HUentrykPvCountf|TiIdensityGGtemp8Pe|Ԃ|]TpVAlarmHandlerJHUargGtempԂ|,|Stp_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\7@}last_touch_flgSPITpValiditySPI_TP_VALIDITY_VALIDSPI_TP_VALIDITY_INVALID_XSPI_TP_VALIDITY_INVALID_YSPI_TP_VALIDITY_INVALID_XY@enumTP_DETECT_AXIS_XTP_DETECT_AXIS_Y|GԂ|||G]TPi_DetectTouchL|||]SPI_DummyWaitL|؄|K]TPi_DetectPosMLdata|range"LPaxis]LWdensity|SmaxRangeKvalidityPcommandcL temp|Qk|Rj|Ti؄|,|]TP_ExecSamplingNtLTdata|UrangezLVdensity%|Uidensity_ydensity_xWtemp_touchtemp_posA,||Dsmic_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\#cOD}micw<MICWork dPcommand uPstatus $type &admode ( Qbuf ,index 0size 4timerValue 6timerPrescaler 8temp16 :temporarycOMICWork MICStatusMIC_STATUS_READYMIC_STATUS_AUTO_STARTMIC_STATUS_AUTO_SAMPLINGMIC_STATUS_AUTO_ENDMIC_STATUS_END_WAIT cO,|\|7]MIC_InitRQ9|Si\| |R]MIC_AnalyzeCommandQRPdataPehPwu32gTcommandW|Ti ||^]MicSetTimerValueRPvalue|܉|B]MIC_ExecuteProcessRBQUentryPePeaPtempRPe܉||Q]MICi_GetSysWorkR||]MIC_TimerHandlerRB|Ԍ|mic_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\&}offset8,>m}offset12*}sam12+}counter12%}counter8$}sam8|܋|9]MIC_ExecSampling8TY|PadjustedKSaverage;Utemp܋||]SPI_DummyWaitReceiveT|Ԍ|l]MIC_ExecSampling12mSaveragenUtempgԌ||Bmic_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\MICIntrInfo handler sp delayIF dummyUMICIntrInfoMICIntrPrio ieBit tableIndexJVMICIntrPrioVԌ||p]MIC_SetIrqFunctionWpPintrBitpVPfunctionr|Ui||]MIC_EnableMultipleInterruptGW||]MIC_DisableMultipleInterrupt~W||]MIC_GetDelayIFWfs_file.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\FSArgumentForSuspendFSArgumentForUnmountFSArgumentForActivateFSArgumentForIdleFSArgumentForMountFSArgumentForCloseFileFSArgumentForFlushFileFSArgumentForCloseDirectoryFSArgumentForResumeC fs_overlay.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\FSOverlaySource oZarc vovt9 vovt7 vdigest_key_ptr digest_key_lenYFSOverlaySourceuZ\FSArchive \name \next \list queue flag command ]result ]userdata $mgvtbl (s__anon (treserved2 (u__anon (base ,fat 0fat_size 4fnt 8fnt_size <fat_bak @fnt_bak D]load_mem Hvread_func L;vwrite_func P`vreserved3 Tqvproc Xproc_flaguZFSArchive \ptr pack,uZ\HFSFile \next ]userdata \arc stat ]argument ]error )`queue :`__anon j`reserved1 {`prop 0b__anon 0?breserved2 0Pbarg\FSFileFSResultFS_RESULT_SUCCESSFS_RESULT_FAILUREFS_RESULT_BUSYFS_RESULT_CANCELEDFS_RESULT_CANCELLEDFS_RESULT_UNSUPPORTEDFS_RESULT_ERRORFS_RESULT_INVALID_PARAMETERFS_RESULT_NO_MORE_RESOURCEFS_RESULT_ALREADY_DONEFS_RESULT_PERMISSION_DENIED FS_RESULT_MEDIA_FATAL FS_RESULT_NO_ENTRY FS_RESULT_MEDIA_NOTHING FS_RESULT_MEDIA_UNKNOWN FS_RESULT_BAD_FORMATFS_RESULT_MAXFS_RESULT_PROC_ASYNCFS_RESULT_PROC_DEFAULTFS_RESULT_PROC_UNKNOWN j`reserved1 {`propFSROMFATProperty `file Nadir{`FSROMFATPropertyFSROMFATFileProperty own_id top bottom pos`FSROMFATFilePropertyFSROMFATDirProperty apos parentNaFSROMFATDirProperty FSDirPos \arc own_id index posaFSDirPos ?breserved2 PbargFSROMFATCommandInfo creadfile cwritefile dseekdir \dreaddir efindpath fgetpath fopenfilefast gopenfiledirect WgclosefilePbFSROMFATCommandInfo  ]dst len_org lenTcFSReadFileInfo  ]src len_org lencFSWriteFileInfo  aposcFSSeekDirInfo pdp_entry ^skip_string'dFSReadDirInfod e__anon =efile_id adir_id is_directory name_len enamevdFSDirEntry  =efile_id adir_idFSFileID \arc file_id=eFSFileID, apos fpath ^find_directory fresulteFSFindPathInfo, 2ffile 8fdir=ea  fbuf buf_len total_len dir_id>fFSGetPathInfo =eidfFSOpenFileFastInfo  top bottom indexfFSOpenFileDirectInfo reserved:gFSCloseFileInfosgFSArchiveInterface kReadFile FkWriteFile kkSeekDirectory kReadDirectory mFindPath mGetPath mOpenFileFast mOpenFileDirect &nCloseFile $?nActivate (RnIdle ,enSuspend 0xnResume 4nOpenFile 8nSeekFile <-oGetFileLength @LoGetFilePosition DkoMount H~oUnmount LoGetArchiveCaps PoCreateFile ToDeleteFile XoRenameFile \pGetPathInfo `pSetPathInfo dqCreateDirectory h9qDeleteDirectory lXqRenameDirectory pqGetArchiveResource t]unused_29 xrFlushFile |sSetFileLength 4sOpenDirectory _sCloseDirectory xsSetSeekCache sreservedsgFSArchiveInterface!k]\\]@kLk]\\]@kqk]\\k]\\kkpFSDirectoryEntryInfo lshortname shortname_length llongname longname_length attributes latime 8lmtime Plctime hfilesize lidkFSDirectoryEntryInfo,,FSDateTime year month day hour minute secondlFSDateTimem]\f@k^m]\\^f@km]\\n]\\@k,n]\\En\Xn\kn\~n\n]\\fn]\\nn^FSSeekFileModeFS_SEEK_SETFS_SEEK_CURFS_SEEK_END3o]\\@kRo]\\@kqo\o\o]\@ko]\fo]\fo]\ffp]\f>pDpTFSPathInfo attributes lctime lmtime 4latime Lfilesize PidDpFSFileInfoDpFSPathInfop]\f>pq]\f?q]\f^q]\ffq]\qq0FSArchiveResource UtotalSize UavailableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClustersqFSArchiveResources]\\s]\\:s]\\fes]\\~s]\\]ts4 treserved2 u__anon base fat fat_size fnt fnt_size fat_bak fnt_bak ]load_mem vread_func $;vwrite_func (`vreserved3 ,qvproc 0proc_flag434 base fat fat_size fnt fnt_size fat_bak fnt_bak ]load_mem vread_func $;vwrite_func (`vreserved3 ,qvproc 0proc_flagv]\]Av]\]wv]\CARDRomRegion offset lengthvCARDRomRegion,FSOverlayInfo Hwheader cxtarget $vfile_posvFSOverlayInfo FSOverlayInfoHeader id fram_address ram_size bss_size Qxsinit_init Qxsinit_init_end file_id compressed flagHwFSOverlayInfoHeaderWx]x@enumMI_PROCESSOR_ARM9MI_PROCESSOR_ARM7FSArchiveFAT top bottomxFSArchiveFAT MWiDestructorChain Tynext Zydtor zyobjxMWiDestructorChainx`yp_thisty||fs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\||6]FS_Init:z|Ѝ|card_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\^}CARDi_EnableFlag@CARDEventListener {event {valarm 4{Condition 8|userdata <lockID >|paddingzCARDEventListener CARDAccessLevel|CARDiOwner(4l{^@no_name@|6|CARDiCommon W}cmd flag priority |lock_owner ^lock_ref lock_queue lock_target 'thread xtask Gtask_q ^command padding6|CARDiCommon]}`CARDiCommandArg ~result ~type id src dst len spec]}CARDiCommandArgCARDResultCARD_RESULT_SUCCESSCARD_RESULT_FAILURECARD_RESULT_INVALID_PARAMCARD_RESULT_UNSUPPORTEDCARD_RESULT_TIMEOUTCARD_RESULT_ERRORCARD_RESULT_NO_RESPONSECARD_RESULT_CANCELEDCARDBackupTypeCARD_BACKUP_TYPE_EEPROM_4KBITS CARD_BACKUP_TYPE_EEPROM_64KBITS CARD_BACKUP_TYPE_EEPROM_512KBITSCARD_BACKUP_TYPE_EEPROM_1MBITSCARD_BACKUP_TYPE_FLASH_2MBITSCARD_BACKUP_TYPE_FLASH_4MBITSCARD_BACKUP_TYPE_FLASH_8MBITSCARD_BACKUP_TYPE_FLASH_16MBITSCARD_BACKUP_TYPE_FLASH_64MBITSCARD_BACKUP_TYPE_FRAM_256KBITSCARD_BACKUP_TYPE_NOT_USEH total_size sect_size subsect_size page_size addr_width program_page write_page write_page_total erase_chip $erase_chip_total (erase_sector ,erase_sector_total 0erase_subsector 4erase_subsector_total 8erase_page <initial_status =padding1 @caps Dpadding2@enumCARD_TARGET_NONECARD_TARGET_ROMCARD_TARGET_BACKUPCARD_TARGET_RW Vcontext gstackNCARDTask next priority userdata function AcallbackCARDTask$@no_name@;$XCARDTaskQueue لlist ߄workers quit dummyXCARDTaskQueue`CARDRomHeader )game_name game_code maker_code product_id device_type device_size :reserved_A game_version property {main_rom_offset ${main_entry_address ({main_ram_address ,main_size 0{sub_rom_offset 4{sub_entry_address 8{sub_ram_address <sub_size @vfnt Hvfat Pvmain_ovt Xvsub_ovt `Krom_param_A hbanner_offset lsecure_crc n\rom_param_B p{main_autoload_done t{sub_autoload_done xmrom_param_C rom_size header_size main_module_param_offset sub_module_param_offset normal_area_rom_offset twl_ltd_area_rom_offset ~reserved_B logo_data \logo_crc ^header_crcCARDRomHeaderNTRCARDRomHeader ,  ,+xCARDRomHeaderTWL ntr `Όdebugger_reserved ߌconfig1 access_control  reserved_0x1B8 main_ltd_rom_offset 1reserved_0x1C4 {main_ltd_ram_address main_ltd_size sub_ltd_rom_offset Breserved_0x1D4 {sub_ltd_ram_address sub_ltd_size vdigest_area_ntr vdigest_area_ltd vdigest_tabel1 vdigest_tabel2 digest_table1_size digest_table2_sectors Sconfig2 dmain_static_digest usub_static_digest (digest_tabel2_digest <banner_digest Pmain_ltd_static_digest dsub_ltd_static_digestCARDRomHeaderTWL 43 game_card_on game_card_nitro_mode photo_access_read photo_access_write sdmc_access_read sdmc_access_write backup_access_read backup_access_write||<]CARD_Init>0|Pp||]CARD_SetThreadPrioritymUpriorTretPbak_psr|ȍ| ]CARD_GetRomHeaderȍ|Ѝ|']CARD_GetOwnRomHeaderTWLˏEЍ|| card_common.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\6|}cardi_common6|6|Ѝ||]CARDi_InitResourceLockאPp||]CARDi_InitCommandPp/card_hook.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\ CARDHookContext next "userdata (callbackCARDHookContext.""| |%,card_task.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\X@no_name@X1XX||%]CARDi_InitTaskQueue%Pqueue|.|J]CARDi_InitTask8JPtaskJPpriorityJ PuserdataKPfunctionKcallback0||a]CARDi_ProcessTaskaTqueuea%Utaska^Pblockinga^VchangePriorityxWpriog+PppfVbak_cpsr||7]CARDi_ReceiveTask=Uqueue^VblockingWbak_cpsrCTretval| |]CARDi_TaskWorkerProcedureITargOPtaskUPqueueOcard_utility.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\CARDDmaInterface Recv %StopCARDDmaInterfacechannelsrcdstlen+channel  |<|Jcard_spi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\|p|argq|argr|buf1^|need_command^}status_checked@}cardi_param rest_comm src dst ^cmpCARDiParam@no_name@)]}]}]}]}]}]} ||]CARDi_CommandEndUforce_waitTtimeout^Trest|ď|]CARDi_CommandReadStatusHdstď||^]CARDi_WaitPrevCommandx||3]CARDi_CommArray3Psrc3Qdst3Ulen3 funcE dummy_read5/Wp||]CARDi_WaitBusyforIRCZPtick||i]CARDi_CommReadCorei5Pp|D|z]CARDi_CommWriteCorez;Pp|tmpD||]CARDi_CommVerifyCore*APp||]CARDi_WriteEnableV| |]CARDi_SendSpiAddressingCommandPaddrPmodeaddr_cmdTwidth |D|]CARDi_InitStatusRegister)TstatD||]CARDi_ReadBackupCoreUsrcGVdstTlen||]CARDi_ProgramBackupCore2WdstMsrcUlen(Tsize$page"SVcmd||H]CARDi_WriteBackupCoreӞHWdstHYsrcHUlenRTsizeNpageL_Vcmd||r]CARDi_VerifyBackupCore;rVdstreWsrcrUlen|D|]CARDi_EraseBackupSectorCoreVdstUlenWsectorkTcmdD||]CARDi_EraseBackupSubSectorCoreBVdstUlenWsectorqTcmd||]CARDi_EraseChipCorewTcmd|<|]CARDi_SetWriteProtectCore Vstat}arg^Uretry_countTcmd<|L|*lcard_rom.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\K}cardi_rom_baseN}CARDiReadRomFunction^userdata1buffer7offsetlength<||l]CARDi_SetRomOplPcommandlPoffsetoQcmd2nVcmd1||^]CARDi_IsNormalMode=Poh|8|]CARDi_ReadRomIDCore=Top8|@|]CARDi_ReadRomIDzPret@|L|5]CARDi_InitRom L|d|Њcard_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\^|isFirst z}CARDi_ARM7Mutex6|6|L|t|.]CARDi_LockMutexForARM7t||R]CARDi_DoTaskFromARM9 ]UidT|Tp||]CARDi_DoneTaskFromARM9;|d|]CARDi_OnFifoRecvƥPtagPdata^Perr^UrequestedTpd||card_sp_pullOut.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\%}CARDiSlotResetCount&^}detectPullOut^}skipCheck|nextCount ^}isCardPullOut^|isFirstCheck^}isInitialized\}alarm,d||6]CARD_InitPulledOutCallback|4|T]CARDi_TryTerminateARM7`|PlockID]WcpsrD|t|]CARDi_CallbackForPulledOutEPdatat||^]CARD_IsPulledOutp| |^]CARD_CompareCardIDPcardIDiplCardIDVlastInterrupts|TlockID^Pretval |,|^]CARD_IsCardIreqLoU^Pretval,||]CARD_CheckPullOut_Polling"||i2c_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\I^|slowRateG^|isInitialized/ʪt|I2CiDeviceAddrTableFz|mutex:۪|I2CiSlowRateTable|@enumI2C_SLAVE_CAMERA_MICRON_INI2C_SLAVE_CAMERA_MICRON_OUTI2C_SLAVE_CAMERA_SHARP_INI2C_SLAVE_CAMERA_SHARP_OUTI2C_SLAVE_MICRO_CONTROLLERI2C_SLAVE_DEBUG_LEDI2C_SLAVE_DEBUGGERI2C_SLAVE_NUM@enumI2C_WRITEI2C_READ||]I2C_Init4|4| ]I2C_LockW4|p|.]I2C_Unlock|p||^]I2Ci_WriteRegisterid regdata^Tr||^]I2Ci_SendStart.Tid||X]I2Ci_WaitR||]I2Ci_SetDatadata| |K]I2Ci_Start |<|^]I2Ci_GetResultܭ<|^|^]I2Ci_SendMiddledata`|x|t]I2Ci_WaitExAx||T]I2Ci_Continue{TTrw||^]I2Ci_SendLastdata||z]I2Ci_StopExzTrw| |e]I2Ci_StopPhase1-erw ||l]I2Ci_StopPhase2W|8|\]I2Ci_Stop\rw8|~|]I2Ci_ReadRegisterUidreg^Tr||^]I2Ci_ReceiveStart.id||]I2Ci_WaitReceiveLast]||]I2Ci_ReceiveLast||]I2Ci_GetDataL||cdc_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\:}isSARADCOnBk>}sMicBiasBk;}isDACOnBk=}isUnmuteSpBk9}isAudioADCOnBk<}isUnmuteHpBk{ |||mute_wait_append_time_max?^}sCdcSysClockBk` ||mute_wait_append_time_max^ |Hpf10HzSamplingrate32k_ |Hpf10HzSamplingrate48kVs|sIirFilterAddressHalf`״|DefaultIirParamBY|sIirFilterAddress@j }sIirFilterBackup_CDCSysClockParameterCDC_SYS_CLOCK_PARAMETER_FOR_SAMPLING_RATE_32730CDC_SYS_CLOCK_PARAMETER_FOR_SAMPLING_RATE_47610CDC_SYS_CLOCK_PARAMETER_OFF_CDCIirFilterParamHalf n0 n1 d1 CDCIirFilterParamHalf_IirFilterAddress page regIirFilterAddress _CDCIirFilterParam n0 n1 n2 d1 d2״CDCIirFilterParamd״ _CDCIirFilterTargetCDC_IIR_FILTER_ADC_1CDC_IIR_FILTER_ADC_2CDC_IIR_FILTER_ADC_3CDC_IIR_FILTER_ADC_4CDC_IIR_FILTER_ADC_5CDC_IIR_FILTER_DAC_LEFT_1CDC_IIR_FILTER_DAC_LEFT_2CDC_IIR_FILTER_DAC_LEFT_3CDC_IIR_FILTER_DAC_LEFT_4CDC_IIR_FILTER_DAC_LEFT_5 CDC_IIR_FILTER_DAC_RIGHT_1 CDC_IIR_FILTER_DAC_RIGHT_2 CDC_IIR_FILTER_DAC_RIGHT_3 CDC_IIR_FILTER_DAC_RIGHT_4 CDC_IIR_FILTER_DAC_RIGHT_5CDC_IIR_FILTER_DAC_BOTH_1CDC_IIR_FILTER_DAC_BOTH_2CDC_IIR_FILTER_DAC_BOTH_3CDC_IIR_FILTER_DAC_BOTH_4CDC_IIR_FILTER_DAC_BOTH_5״״_CDCIirFilterTargetHalfCDC_IIR_FILTER_ADC_HALFCDC_IIR_FILTER_DAC_HALF_LEFTCDC_IIR_FILTER_DAC_HALF_RIGHTCDC_IIR_FILTER_DAC_HALF_BOTH |К|]CDC_InitLibК||]CDCi_IsDACOn||I]CDC_SetSystemClockJJ^Pparam| |^]CDC_GetSystemClockPNDAC |X|]CDC_PowerUpDACX||]CDC_PowerUpDAC_WaitWithSpin|Ɯ|e]CDC_SetMicBias(e^Pis_onȜ||z^]CDC_GetMicBiasf|^Pvalue|0|]CDC_PowerUpAudioADC0|@|]CDC_PowerDownAudioADCĺ@|P|]CDC_UnmuteAudioADCP|`|]CDC_MuteAudioADC`|p|]CDC_SetPGAB]Ptarget_gainp||]CDC_GetPGAB Ptemp||q]CDC_Stopq^UflagDACq^TflagAudioADCq^WflagSarADC||]CDC_Restartv^UflagDAC^VflagAudioADC^PflagSarADC||]CDC_BeginSleep||B]CDC_EndSleepƼ||]CDC_StartShutterSound|h|]CDCi_StartForceOutSoundJ^TFlagIirInitializedh|p|!]CDC_EndShutterSoundxp||>]CDCi_EndForceOutSoundʽ@^TFlagIirInitialized||]CDC_EnableInternalDischargePathPtemp|T|]CDC_SwitchOutputDevice_TdeviceT||p]CDC_SetIirFilterp{UtargetpTpParams^VflagAudioADCr^WflagDAC||]CDC_SetIirFilterCoreU{UtargetPpParam״param|| ]CDC_SetIirFilterHalfCoreȿ Ttarget PpParam param|P|] ]CDC_WaitPowerDownDACd reg_ |UiP|~|x ]CDC_WaitPowerDownADCn regz |Ui|ȩ| ]CDCi_InitializeIirFilterBuffer |Piȩ|| ^]CDCi_IsIirFilterInitialized |Ri|| cdc_twlmode_access.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\6}cdcCurrentPage^t|__FUNCTION__o|__FUNCTION__|__FUNCTION__|__FUNCTION__5z}cdcMutex,,,,|$|O]CDC_InitMutex$|J|]CDC_SetSpiParams_VregUsetBitsTmaskBitsPtmpL|h|]CDC_SetSpiParamsExPpageUregTsetBitsVmaskBitsh|Ī|]CDC_WriteSpiRegister4UregTdataĪ|ܪ|]SPI_SendWaitoPdataܪ||]CDC_WriteSpiRegisterExPpageUregTdata|P|]CDC_ReadSpiRegister-UregPdataP|t|]SPI_DummyWaitReceive\t||]CDC_ReadSpiRegisterExPpageTregPvalue| |]CDC_WriteSpiRegisters?UregTbufpVsize^Pi |(|4]CDC_WriteSpiRegistersEx5Ppage5Ureg5Tbufp5Vsize(||D]CDC_ReadSpiRegisters5ETregEUbufpEVsizeG^Ti|Ȭ|e]CDC_ReadSpiRegistersExfPpagefUregfTbufpfVsizeȬ|Ԭ|x]CDC_InitCurrentPageԬ||]CDC_ChangePage Tpage_no||- sndex_request.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\:}sndexTempDSPMixRateE}sndexVol>}sndexIirTargetD^}sndexSetAlarm2^}sndexReqInitialized;^}sndexIsPlayShutter7^}sndexLock6}sndexReqMsgQArray@}sndexSpiLockId?״}sndexIirParam% |__FUNCTION__5L}sndexReqMsgQC}sndexVolAlarm3N}sndexReqThread4}sndexReqThreadStack , SNDEXSamplingRateSNDEX_SAMPLING_RATE_32730SNDEX_SAMPLING_RATE_47610||X]SNDEX_InitYUpriority[Te||]SNDEX_GetSamplingRate|t|]SDNEXi_InitializeSMIXUtempt|̮|]PxiCallbackZUdata^Perr̮||A]ReplyResultBPcommandBPresultBPparamDUdata||j]RequestThreadPheadphonePsmixIWdevice Wparam_volRsmixWi2s freq$eRmuteWvolumeqPparampTcommandoGreq||H]MCU_ReadRegisterUHTregJPitrm|R||^]MCU_SetVolume|UvolumeT||]MCUVolumeSwtichCallback||]SetVolumeHandler||XQ tpex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\<D|__FUNCTION__, _F|h|]TPEX_Initialize "TlockIdh||F]TPEX_ExecuteProcessGUentryGTwork]densityMPeIGtemp2||p tpex_sampling.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\@enumTP_CONVERSION_CONTROL_HOSTTP_CONVERSION_CONTROL_SELF@enumTP_CONVERSION_MODE_NONETP_CONVERSION_MODE_XYTP_CONVERSION_MODE_XYZTP_CONVERSION_MODE_X TP_CONVERSION_MODE_YTP_CONVERSION_MODE_ZTP_CONVERSION_MODE_AUX3TP_CONVERSION_MODE_AUX2TP_CONVERSION_MODE_AUX1 TP_CONVERSION_MODE_AUTO_AUX$TP_CONVERSION_MODE_AUX123,TP_CONVERSION_MODE_XP_XM4TP_CONVERSION_MODE_YP_YM8TP_CONVERSION_MODE_YP_XM<@enumTP_CONVERSION_PIN_INTERRUPTTP_CONVERSION_PIN_DATA_AVAILABLETP_CONVERSION_PIN_INTERRUPT_DATA_AVAILABLETP_CONVERSION_PIN_NEW_BUFFER_MODE@enumTP_INTERVAL_NONETP_AUX_INTERVAL_1_12MTP_AUX_INTERVAL_3_36M TP_AUX_INTERVAL_5_59M TP_AUX_INTERVAL_7_83M TP_AUX_INTERVAL_10_01M TP_AUX_INTERVAL_12_30M TP_AUX_INTERVAL_14_54MTP_AUX_INTERVAL_16_78MTP_INTERVAL_8MSTP_INTERVAL_1MSTP_INTERVAL_2MSTP_INTERVAL_3MSTP_INTERVAL_4MSTP_INTERVAL_5MSTP_INTERVAL_6MSTP_INTERVAL_7MS@enumTP_NEW_BUFFER_CONVERSION_MODE_CONTINUOUSTP_NEW_BUFFER_CONVERSION_MODE_SINGLESHOT@@enumTP_RESOLUTION_12TP_RESOLUTION_8TP_RESOLUTION_10_TpStabilizationTimeTP_STABILIZATION_TIME_0_25USTP_STABILIZATION_TIME_1USTP_STABILIZATION_TIME_3USTP_STABILIZATION_TIME_10USTP_STABILIZATION_TIME_30USTP_STABILIZATION_TIME_100USTP_STABILIZATION_TIME_300USTP_STABILIZATION_TIME_1MS_TpPrechargeTimeTP_PRECHARGE_TIME_0_25USTP_PRECHARGE_TIME_1USTP_PRECHARGE_TIME_3USTP_PRECHARGE_TIME_10USTP_PRECHARGE_TIME_30USTP_PRECHARGE_TIME_100USTP_PRECHARGE_TIME_300USTP_PRECHARGE_TIME_1MS_TpSenseTimeTP_SENSE_TIME_1USTP_SENSE_TIME_2USTP_SENSE_TIME_3USTP_SENSE_TIME_10USTP_SENSE_TIME_30USTP_SENSE_TIME_100USTP_SENSE_TIME_300USTP_SENSE_TIME_1MS@enumTP_DEBOUNCE_0USTP_DEBOUNCE_8USTP_DEBOUNCE_16USTP_DEBOUNCE_32USTP_DEBOUNCE_64USTP_DEBOUNCE_128USTP_DEBOUNCE_256USTP_DEBOUNCE_512USG   ||%]TPEX_SetConversionMode&ATcontrol&Smode&>Ppin|$|@]TPEX_SetIntervalARinterval$|@|Z]TPEX_SetTouchPanelDataDepths[Pdepth]Ptmp@|T|r]TPEX_EnableNewBufferModeT|h|]TPEX_DisableNewBufferModeh||]TPEX_SetNewBufferModeRmode||]TPEX_SetResolution^Rres||]TPEX_SetStabilizationTimeaRtime|ȶ|]TPEX_SetPrechargeTimeRtimeȶ||]TPEX_SetSenseTime*Rtime||]TPEX_SetDebounceTimemaRtime||^]TPEX_ReadBuffer'Udata|range-density}^Vsame_count|^TySum{^QxSumz^Wjz^Pil|PyRangek|PxRangef|QmaxRange)3yBuf(D(xBuf'U2buf&^Pj&^Qi|| micex_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\cO cOcO||)]MICEX_AnalyzeCommand-sTw,Ucommand||^]MICEXi_IsCodecAutoSampling|̻|]MICEX_ExecuteProcesssyTentryPtemp̻|м|]MicexIntrHandler0Pdata8"Pdata16Uw|TiWtempм|,|G^]MicexUpdateStatusOnBufferFullDJPw,||^]MicexConvSamplingSpanUspanTdestPrateL||ѱ micex_irq.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\~}micexIntrInfoG|__FUNCTION__X|__FUNCTION__Fi|micexIntrPrioMICEXIntrInfo handler sp delayIF delayIF2MICEXIntrInfo,,z-MICEXIntrPrio ieBit ie2Bit ieTableIndex ie2TableIndexzMICEXIntrPrio|0|]MICEX_EnableMultipleInterrupt^UhandlerTe0||]MICEX_DisableMultipleInterruptTe|ؾ|]MICEX_GetDelayIFؾ||]MICEX_IrqHandler|| mcu_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\- |MCUiPwswStatus/^|MCUiEnableHeartBeat$^$|MCUiIsInitialized'#(|MCUiMessage+:8|MCUiIrqTable&LX|MCUiMessageQ(Nx|MCUiThread)W|MCUiStackMCUPwswStatusMCU_PWSW_UNKNOWNMCU_PWSW_IN_PROGRESSMCU_PWSW_RESETMCU_PWSW_POWER_OFFMCU_PWSW_MAX4 KQU?Q||D]MCU_InitIrqDTpriorityIPbitsHPenabled||o]MCU_SetIrqFunctionFoPintrBitohPfunctionq^Ui||]MCU_CallIrqFunctionUintrBit^Ti|,|]MCU_CheckIrq ^UcallHandlerTintrBitVenabled,|T|]MCU_GetPwswStatusJ|PblockT||]MCUi_UpdatePwswStatusPbits||]MCUi_Handler||]MCUi_GetIrqReason|| ]MCUi_ThreadE,UintrBit&nmsg"Tcount||b]MCUi_HeartBeatHandleru||r]MCU_DisableHeartBeat| | mcu_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\|verInfo| |/]MCU_GetVerInfo=sdio_bus.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\SD_FUNCTION_FLAGSSLOT_VOLTAGE_MASKSDHCD_RESPONSE_CHECK_MODEFUNC_ENABLE_DISABLE_FLAGSUCHARSDCONFIG_WP_VALUEHCD_EVENTUINT8SDIO_IRQ_MODE_FLAGSCT_VERSION_CODEA_UCHARSD_DEVICE_FLAGSA_UINT8_BDCONTEXT RequestList SignalList _RequestListCritSection (HcdList 0HcdListSem PDeviceList XDeviceListSem xFunctionList FunctionListSem ^RequestListSize ^SignalSemListSize ^CurrentRequestAllocations ^CurrentSignalAllocations ^MaxRequestAllocations ^MaxSignalAllocations ^RequestRetries ^CardReadyPollingRetry ^PowerSettleDelay ^CMD13PollingMultiplier DefaultOperClock DefaultBusMode DefaultOperBlockLen DefaultOperBlockCount CDPollingInterval InitMask ^CDTimerQueued CardDetectHelper pCardDetectMsgQueue HcdInUseField ConfigFlags ^MaxHcdRecursionVBDCONTEXT_SDLIST SpPrev YpNextSDLIST_OS_CRITICALSECTION zMutexID_OS_CRITICALSECTIONSD_BUSCLOCK_RATEA_UINT32ATOMIC_FLAGSULONGUINT32FUNC_ENABLE_TIMEOUTSDREQUEST_FLAGSDMA_ADDRESSA_VOIDUA_UINT64^A_INT^SYSTEM_STATUS^SDPOWER_STATE^THREAD_RETURN^A_BOOL^SDIO_STATUS^INT|INT32|A_INT32 _OS_SEMAPHORE LmsgQueueIDOS_SEMAPHORESD_BUSMODE_FLAGSSDCONFIG_COMMANDA_UINT16UINT16USHORTCARD_INFO_FLAGSSD_SLOT_CURRENT_OSKERNEL_HELPER NTaskID tskStack stackSize taskPri ^ShutDown WakeSignal pContext pHelperFuncOSKERNEL_HELPER _OS_SIGNAL LmsgQueueIDOS_SIGNAL^@no_name@,_SDMESSAGE_QUEUE MessageList _MessageCritSection FreeMessageList (^MaxMessageLengthSDMESSAGE_QUEUEUINTA_UINT_SDHCD Version SDList @pName Attributes MaxBytesPerBlock MaxBlocksPerTrans MaxSlotCurrent SlotNumber MaxClockRate SlotVoltageCaps !SlotVoltagePreferred $ipContext (opRequest ,pConfigure 0ConfigureOpsSem P_HcdCritSection h!RequestQueue trpCurrentRequest xgCardProperties SDIOIrqHelper @pPseudoDev PendingHelperIrqs PendingIrqAcks IrqsEnabled FIrqProcState pDevice SlotCurrentAllocated HcdFlags !CompletedRequestQueue pDmaDescription bpModule ^Recursion nReserved1 tReserved2SDHCD,,TEXT,INT8,A_CHARu^pHcd^pHcdpConfig _SDCONFIG Cmd pData ^DataLengthSDCONFIG _SDREQUESTQUEUE Queue ^Busy!SDREQUESTQUEUExX_SDREQUEST SDList Argument Flags InternalFlags Command nResponse &BlockCount (BlockLen *DescriptorCount ,pDataBuffer 0DataRemaining 4pHcdContext 8pCompletion <pCompleteContext @^Status DpFunction H^RetryCount LUpBdRsv1 P[pBdRsv2 TapBdRsv3xSDREQUEST@no_name@xd_SDFUNCTION Version SDList 3pName MaxDevices NumDevices 9pIds BpProbe pRemove $pSuspend (pResume , pWake 0IpContext 4ODriver 8DeviceList @CleanupReqSig `FlagsSDFUNCTION,? _SD_PNP_INFO SDIO_ManufacturerCode SDIO_ManufacturerID SDIO_FunctionNo SDIO_FunctionClass SDMMC_ManfacturerID SDMMC_OEMApplicationID CardFlags?SD_PNP_INFOH^pFunctionmpDevicesyX_SDDEVICE SDList FuncListLink BpRequest ppConfigure AllocRequest FreeRequest pIrqFunction $pIrqAsyncFunction (8IrqContext ,>IrqAsyncContext 0DpFunction 4JpHcd 8PDeviceInfo DmpId P~Device TSlotCurrentAlloc VFlags WVersionySDDEVICEH^pDevdreqjyxv^pDevconfigypDevxypDevpReqyxpContextpContext2 _SDDEVICE_INFO AsSDIOInfo 5AsSDMMCInfoPSDDEVICE_INFO _SDIO_DEVICE_INFO FunctionCISPtr FunctionCSAPtr FunctionMaxBlockSizeSDIO_DEVICE_INFO_SDMMC_INFO Unused5SDMMC_INFO ?pFunctionpDevicey^pFunctionstate^^pFunction^pFunctionCstate^enable^0_CARD_PROPERTIES IOFnCount SDIORevision SD_MMC_Revision SDIO_ManufacturerCode SDIO_ManufacturerID CommonCISPtr RCA SDIOCaps /CardCSD Flags $OperBusClock (BusMode *OperBlockLenLimit ,OperBlockCountLimit .CardState /CardVoltagegCARD_PROPERTIESy_SDHCD_IRQ_PROC_STATESDHCD_IDLESDHCD_IRQ_PENDINGSDHCD_IRQ_HELPER_SDDMA_DESCRIPTION Flags MaxDescriptors MaxBytesPerDescriptor Mask AlignmentSDDMA_DESCRIPTIONh(_SIGNAL_ITEM SDList SignalzSIGNAL_ITEMsdio_bus_events.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_SDIO_INT_CTRL_DATA ^SlotIRQEnable IRQDetectModeSDCONFIG_SDIO_INT_CTRL_DATA_HCD_EVENT_MESSAGE Event _ pHcd HCD_EVENT_MESSAGEysdio_bus_misc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\_SDCONFIG_POWER_CTRL_DATA ^SlotPowerEnable SlotPowerVoltageMask' SDCONFIG_POWER_CTRL_DATA _SDCONFIG_BUS_MODE_DATA ClockRate BusModeFlags ActualClockRate SDCONFIG_BUS_MODE_DATA_SDCONFIG_INIT_CLOCKS_DATA NumberOfClocks0 SDCONFIG_INIT_CLOCKS_DATA_SDCONFIG_FUNC_ENABLE_DISABLE_DATA EnableFlags TimeOut G pOpComplete u pOpCompleteContext SDCONFIG_FUNC_ENABLE_DISABLE_DATAM Contexto status^_SDCONFIG_FUNC_SLOT_CURRENT_DATA SlotCurrent{ SDCONFIG_FUNC_SLOT_CURRENT_DATA?sdio_bus_os.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\busdriver\twl\ 4id ^heap cardDetectTskPri irqTskPri dpcTskPri SDIO_INIT_SETTINGS@enumOS_ARENA_MAINOS_ARENA_MAIN_SUBPRIVOS_ARENA_MAINEXOS_ARENA_ITCMOS_ARENA_DTCMOS_ARENA_SHAREDOS_ARENA_WRAM_MAINOS_ARENA_WRAM_SUBOS_ARENA_WRAM_SUBPRIVOS_ARENA_MAX sdio_hcd.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\hcd\TWL_hcd\_SDHCD_DRIVER_CONTEXT Hcd Device ^CardInserted ^KeepClockOn ^SD4Bit Dpc DpcFlagsSDHCD_DRIVER_CONTEXT_SDHCD_DEVICE BlobSDHCD_DEVICEBsdio_lib_c.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\add-ins\TwlWireless\TianShan_080602\host\sdiostack\src\sdio_lib\_SDMESSAGE_BLOCK SDList ^MessageLength $MessageStartSDMESSAGE_BLOCK|| nvram_sp.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\}nvramw NVRAMWork #commandNVRAMWork  ||1]NVRAM_Initp3|Si||G]NVRAM_AnalyzeCommand$GSdataaVsize`Waddr_Pbuf^Pwu32]UcommandL|Ri|v|]NVRAM_ExecuteProcessx4TentryPex||^]NvramCheckReadyToReadtempStatus||^]NvramCheckReadyToWritetempStatus||^]NvramIsAvailableMemAddrUPaddr|`|0 nvram_instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\|0| ]NVRAM_WriteEnable0|H|]SPI_SendWaitPdataH|t|0]NVRAM_WriteDisablet||@]NVRAM_ReadStatusRegister?@Pbuf|\|o]NVRAM_ReadDataBytesoPaddressoQsizeoUbufr|Tiq adr\|t|]SPI_DummyWaitt|$|]NVRAM_ReadDataBytesAtHigherSpeedPaddressQsizeUbuf|Ti adr$||]NVRAM_PageWritePaddressQsize1Ubuf|Ti7adr||]NVRAM_PageProgramPaddressQsizeHUbuf|TiNadr||`]NVRAM_PageErase`Paddress|T|~]NVRAM_SectorErase&~PaddressT||]NVRAM_DeepPowerDownT||]NVRAM_ReleaseFromDeepPowerDown||]NVRAM_ChipErase|4|]NVRAM_ReadSiliconId_Pbuf4|`| ]NVRAM_SoftwareReset&K`|T|Q control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\/}rtcInitialized2z}rtcMutex0}rtcWorkRTCWork LmsgQ !msgArray 0Nthread 2stack ^busy command padding Npolling pollingQ CpollingStack pollingAlarmRTCWorkUURTCPxiResultRTC_PXI_RESULT_SUCCESSRTC_PXI_RESULT_INVALID_COMMANDRTC_PXI_RESULT_ILLEGAL_STATUSRTC_PXI_RESULT_BUSYRTC_PXI_RESULT_FATAL_ERRORRTC_PXI_RESULT_MAXRTCRawStatus2 intr_mode  dummy0  intr2_mode  test dummy1(RTCRawStatus2RTCRawStatus1 reset format dummy0  intr1  intr2  bld  poc dummy1RTCRawStatus1`|8|W]RTC_Init WpriorityYPenabled8||^]RTCi_Lock> ||]RTCi_Unlockd ||^]RTC_IsAvailablePxiCommand Pcommand||]RtcPxiCallback!Pdata^PerrTcommand||L]RtcReturnResultj!LPcommandLTPresult||`]RtcThread!d"msg| |`]RtcAlarmIntr "dTintr_numc(stat2bstat1 |T|1]RtcBCD2HEXu"1Pbcd5|Rw4|Ui3QhexT||q instruction.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\RTCRawAlarm week dummy0 we hour afternoon he minute  me dummy2#RTCRawAlarm$RTCRawData $t i&a R(words c(halfs t(bytes$RTCRawData $date %timeRTCRawDate year month dummy0 day  dummy1 week dummy2$RTCRawDateRTCRawTime hour afternoon dummy0 minute dummy1 second  dummy2 %RTCRawTime status1 (status2 &__anon M'pulse #alarm 'adjust 'free M'pulse #alarm 'adjust 'freeRTCRawPulse pulse dummyM'RTCRawPulseRTCRawAdjust adjust dummy'RTCRawAdjustRTCRawFree free dummy'RTCRawFree$$%%M'M'####((''''(RTCRawCounter y)__anon count dummy )bytes(RTCRawCounter count dummy)RTCRawFout t*__anon fout dummy0 *__anon fout2 fout1 dummy1)RTCRawFout fout dummy0 fout2 fout1 dummy1)+ year month dummy0 ye me day dummy1 de dummy2*RTCRawAlarmEx+++##T||+]RTC_Reset>,-stat||A]RTC_SetHourFormat,AUformatD#alarmCstat1||]RTC_ReadDateTime,$Tdata||]RTC_WriteDateTime)-(Tdata||]RTC_ReadDated-(Tdate|&|]RTC_ReadTime-(Ttime(|R|]RTC_WriteTime-(TtimeT||^]RTC_ReadPulse-.(Upulse(stat2||^]RTC_WritePulse.(Upulse(stat2|(|^]RTC_ReadAlarm1.(Ualarm(stat2(|r|5^]RTC_WriteAlarm1'/5(Ualarm7(stat2t||Q^]RTC_ReadAlarm2z/Q(UalarmS(stat2||l^]RTC_WriteAlarm2/l(Ualarmn(stat2||]RTC_ReadStatus1 0(Tstat|F|]RTC_WriteStatus1K0(TstatH|f|]RTC_ReadStatus20(Tstath||]RTC_WriteStatus20(Tstat||]RTC_ReadAdjust1(Tadjust||]RTC_WriteAdjustG1(Tadjust||]RTC_ReadFree1(Tfree|*|]RTC_WriteFree1(Tfree |>|]RTC_ReadCounter1(Tcounter@|j|)]RTC_ReadFout:2))Tfoutl||=]RTC_WriteFoutv2=*Tfout||Q]RTC_ReadAlarmEx12Q*Talarmex||c]RTC_WriteAlarmEx12c+Talarmex||u]RTC_ReadAlarmEx2=3u+Talarmex|F|]RTC_WriteAlarmEx23+Talarmex,||]RtcChangeAlarmFormat24to123+Palarm||]RtcChangeAlarmFormat12to244+Palarm||]RtcGpioTransfer4UinstWparam+TbufVsize||{ gpio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\||&]RTCi_GpioStartU5|L|Q]RTCi_GpioEnd|5L||w]RTCi_GpioSendCommand5xcommandxparameter|L|]RTCi_GpioSendData26 5pDatasizeL||]RTCi_GpioReceiveData6&5pDatasize apistat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^PCFD@70ertfs_stat ^st_dev ^st_ino st_mode ^st_nlink ^st_rdev st_size 8st_atime 8st_mtime 8st_ctime $|st_blksize (|st_blocks ,fattribute@7ERTFS_STATdwordBLOCKTCLUSTERTYPEdatestr date time8DATESTRwordbyte8,pc_file 9pobj flag fptr fptr_cluster fptr_block ^needs_flush ^is_free ^at_eof Jfcluster_cache8PC_FILE9 drobj o:pdrive Ffinode eJblkinfo ^isroot ^is_free Jpblkbuff9DROBJu:tddrive ^mount_valid ^mount_abort ^drive_opencounter volume_serialno ]@volume_label ^bytespcluster $byte_into_cl_mask (^fasize ,rootblock 0firstclblock 4^driveno 8maxfindex <fatblock @^secproot D^fat_is_dirty Hbootaddr Ln@oemname Vbytspsector Xsecpalloc \^log2_secpalloc `secreserved bnumfats dnumroot hnumsecs lmediadesc psecpfat tsecptrk vnumhead xnumhide |free_contig_base free_contig_pointer |known_free_clusters infosec partition_base partition_size ^partition_type @pathname_buffer @filename_buffer ^begin_user_area register_file_address ^interrupt_number drive_flags ^partition_number ^pcmcia_slot_number ^pcmcia_controller_number pcmcia_cfg_opt_value ^controller_number ^logical_unit_number @dev_table_drive_io @dev_table_perform_device_ioctl access_semaphore -Adevice_name (>Afatcontext h6Dpbuffcntxt lFpfscntxt pFfadu:DDRIVE    @^driveno^sectorbuffer@countreadin^@^driveno^opcode^arg'APO@fatbuffcntxt stat_primary_cache_hits stat_secondary_cache_hits stat_secondary_cache_loads stat_secondary_cache_swaps :Cpuncommitted_blocks Dpcommitted_blocks  Dpfree_blocks Dpfat_buffers ^num_blocks $^num_free (^low_water ,^hash_size 0hash_mask 4Dmapped_blocks 8Dmapped_data <*Dfat_blk_hash_tbl>AFATBUFFCNTXT@Cfatbuff Cpnext Cpprev Cpnext2 ^fat_block_state fat_blockno Cfat_data@CFATBUFF@C@C@C@C@C@C$D0D@C^Ui)_ rttermin.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\! b]FATFSi_rtfs_print_string_1b^Pstringidb^Tflags g]FATFSi_rtfs_print_string_2g^PstringidgUpstr2g^Tflags :m]FATFSi_rtfs_print_long_1mmPlm^Tflagsobuffer<p]FATFSi_rtfs_print_one_string̃Ppstr^Tflagsp]FATFSi_pc_ltoakVnumUdest PpWolddest^PdigitbufferP rtutbyte.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\֢]FATFSi_pc_strchrPstringPchآ^]FATFSi__illegal_alias_charTch "^]FATFSi_rtfs_strcpyO"Ptarg""Psrc$^Ploop_cnt J]FATFSi_copybuffJ(SvtoJ.PvfromJ^PsizeBc]FATFSi_pc_cppadc4Utoc:Tfromc^VsizeDPn]FATFSi_rtfs_memsetn@PpvnPbn^PnoFPpPX/ rtutil.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^P'^]FATFSi_pc_path_to_driveno''Tpath*^Pdrivenumber?^]FATFSi_pc_parse_raw_drivel?-PpathA^PdnoK3]FATFSi_pc_parsedriveK9VdrivenoK?UpathN^TdnoMEPpvK]FATFSi_pc_mpathvQUtovWWpathv]VfilenamezccytTpxzretval^]FATFSi_pc_search_cslPsetPstringSp^]FATFSi_name_is_reserved5Tfilename2]FATFSi_to_DWORDPfromPtPres4@ ]FATFSi_to_WORD Pfrom Pnres@H]FATFSi_fr_WORD3PtoPfromHX&]FATFSi_fr_DWORD&Pto&PfromXLI apifilio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\F__FUNCTION__,u:998u:8u:8u:88u:88u:8889u:98u:u:u:88E8E8EXԧN^]FATFSi_rtfs_po_openNWTnameNUflagNmode`]Ppdrive_^ p_errno^VltempZclusters_to_releaseY^open_for_writeX^drivenoWc,fileextVtPfilenameUzVpathTTpobjSparent_objRPclusterQWpfileԧU^]FATFSi_rtfs_po_readU^TfdUin_buffU^Wcount^^,end_of_chain]^ret_val]^p_errno\Pn_clusters\0next_cluster[Vn_w_to_read[ n_to_read[Pn_left[Pltemp[Pn_read[Pblock_to_read[Vn_bytesZQbyte_offset_in_blockXTpdriveWPpfile _|]FATFSi_rtfs_po_lseekh_^Tfd_|Voffset_^Woriginc|Pret_valbUpdriveaPpfile d^]FATFSi_po_ulseek*^TfdWoffsetpnew_offset^origin^Pret_valTpdrivePpfiled,^]FATFSi__po_ulseekWpfileToffsetȍnew_offset^Porigin^p_errno^ end_of_chainQalloced_sizeret_val$next_cluster first_clusterPn_clustersn_clusters_to_seekPltemp2Pltemp^Ulog2_bytespcluster^l_at_eof΍pdrivePfile_pointerL|]FATFSi__po_lseekԍPpfile|Poffset^PoriginPu_offsetnew_offset^Pu_origin|Pret_val0^]FATFSi_rtfs_po_closeP^Vfd"^Vdriveno!^Pret_val0nڍ]FATFSi_pc_fd2file˖n^Tfdn^UflagsqUpdrivepTpfileX^]FATFSi_pc_allocfile^UiTpfileX]FATFSi_pc_freefilesUpfileTpobjL^]FATFSi_pc_enum_filepdrive^Vchore^Wdirty_count^Uipobj TpfileLX]FATFSi_pc_free_all_filePpdriveXp^]FATFSi_pc_flush_all_filPpdrivep|^]FATFSi_pc_test_all_filPpdrive|/^]FATFSi__synch_file_ptrsN/"Tpfile1PclnodS^]FATFSi_pc_flush_file_bufferәS(WpfileZUsave_drive_filioU.Tpfile_bufferdz^]FATFSi_pc_load_file_bufferqz4UpfilezVnew_blocknoVsave_drive_filio|:Tpfile_bufferL^]FATFSi_pc_sync_file_buffer@PpfilePstart_blockPnblocks^PdoflushFPpfile_bufferLh rtdevio.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:u:u:u:u:u:u:u:u:u:u:L^]FATFSi_check_drive_name_mountPname^driveno7^]FATFSi_check_drive_number_mountԜ7^UdrivenoDQ]FATFSi_release_drive_mount2Q^TdrivenoSƛPpdrD\^]FATFSi_release_drive_mount_write\^Tdriveno^̛Ppdr^]FATFSi_check_drive_number_present^VdrivenoқUpdr^Pmedia_status.^]FATFSi_check_media_entryr^Pdriveno؛Ppdr0Z^]FATFSi_check_media_ioǞޛPpdr^Praw\J^]FATFSi_check_mediaUpdr^Vok_to_automount^Wraw_access_requested^call_crit_err^Tcrit_err_media_status^Pmedia_statusLn^]FATFSi_card_failed_handlerTpdr^Pret_valp^]FATFSi_devio_read^drivenoUblocknobuf n_to_read^(rawTpdrt^]FATFSi_devio_write_format`^WdrivenoUblocknobufn_to_write^ rawTpdrt^]FATFSi_devio_write ^drivenoUblocknobuf n_to_write^(rawTpdrh>^]devio_fill>^Vdriveno>Ublockno>buf>n_to_write>^Wraw@Tpdr  rtvfat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\9k lfninode lfnorder ;lfname1 lfnattribute lfnres lfncksum Llfname2 lfncluster ]lfname3kLFNINODE    EF dosinode ofname fext fattribute resarea fclusterhi ftime fdate fcluster fsizeDOSINODEeJE99 u:eJEku:IkEku:IkE^ku:IkEIII999F99keJE9&G^]FATFSi_pc_findinTGSTpobjGYfilenameG^WactionU_PpTlastsegorderSIsRePlfn_nodeQn4sfnP lfnOscratchN^PdowildcardM^PmatchfoundLPpfiKUpiJVpdIrbufhR)^]FATFSi_pc_insert_inode)Upobj) pmom)Wattr)Tinitcluster)filename5^n_segs4^end_of_dir3Wcksum2(vffileext2ѥ0vffilename18,crdate0pdrive/Vcluster.^Wi-pi,Tpd+ pbuffT]FATFSi_pc_nibbleparseoUfilenameTpath PtPpʹ]FATFSi_pc_cksumϫPtestQiUsum̹]FATFSi_pcdel2lfi!Plfi^Pnsegsº ^]FATFSi_pc_deleteseglist $pdrive *Us^Pntodo_2^Vntodo_1^Pntodo_00Plfi6Vrbufĺֻa<]FATFSi_text2lfiaBTlfnaHVlfia^nsegsancksumaPordereNUpfid^Wend_of_lfnc^nػ^]FATFSi_pc_seglist2diskTpdriveZUs`lfnfPpsegtext^Pntodo_2^Vntodo_1^Pntodo_0lPlfirVrbufx]FATFSi_lfi2text<~UlfnTcurrent_lfn_lengthlfi^nsegsVpfi^Wnƽ!]FATFSi_pc_seglist2text@!pdrive!Us!lfn'^current_lfn_length&^Sntodo_2&^Vntodo_1&^Pntodo_0%Tp$Plfi#VrbufȽֽh]FATFSi_pc_zeroseglisthPsؽq]FATFSi_pc_addtoseglistqƦPsqPmy_blockq^Pmy_indexT]FATFSi_pc_reduceseglist4̦PsT^]FATFSi_pc_parsepathIҦWtopathئVfilenameަpathTpfilespacePptoTppcolonpslashPpfile^ keep_slash^i(,4^]FATFSi_pc_patcmp_vfat94Uin_pat4Tname4^Wdowildcard8^Vres7star6%Ppn26+Ppp261Ppn67Ppp6=Ppatܿ{^]FATFSi_pc_patcmp_vfat_8_3³{CVpat{IUname{^Wdowildcard~^Pret_valܿ^]FATFSi_pc_maliasOUfnameUVfext[Winput_fileadestg ascii_aliasx&alias^aliasuniquePpobj^Ttry^]FATFSi_pc_allspacePp^Pi^]FATFSi__illegal_lfn_charETch.^]FATFSi_pc_isdotPfname0\^]FATFSi_pc_isdotdotƵPfname\l^]FATFSi_pc_delete_lfn_infoQpobjlx]FATFSi_pc_zero_lfn_infoTPpdirx^]FATFSi_pc_get_lfn_filenamePpobjPpath]FATFSi_scan_for_bad_lfnsTpmom^delete_bad_lfn"Vbad_lfn_count!lastsegorder IsUlfn_nodeŧPpi˧WpdѧrbufקTpobj2 apifilmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:99^]FATFSi_rtfs_pc_unlinkcname^Up_errno^drivenoifileextzPfilename pathPpdrive^Vret_valWparent_objTpobjR rtdrobj.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\9u:999Eu:99999999FeJu:999eJ999u:E99u:9F8F9u:F9eJ99u:Fu:Fu:F99FFu:9u:FF9F999t@G]FATFSi_pc_get_cwd@MTpdriveCSPpobjBYUpcwdtt_]FATFSi_pc_fndnodeteWpath~kscratch|q fileext{UfilenamezPpdrivey^drivenoxVpchildwpmomvTpobjJ]FATFSi_pc_get_inode.UpobjQpmomVfilenameWfileext^action^TstartingL@P]FATFSi_pc_get_momPĺVpdotdotYPclnoXʺPpfiVкVpdTPsectornoSֺUpdriveRܺTpmom@]FATFSi_pc_mkchildJVpmomUpdPpobj]FATFSi_pc_mknode pmomfilename fileextattributesVincluster,null_str#0dot_str attr4Updrive:$pbuff84crdatePcltempWclusterF8lfinode@(pdinodes^Tret_valFTpobj^]FATFSi_pc_rmnode[LUpobjRTpdrivePclusterD^]FATFSi_pc_update_inodeXUpobj^Vset_archive^Wset_date8crdate^TiD]FATFSi_pc_init_inode^UpdirdPfilenamejWfileextVattrclustersizepTcrdateD]FATFSi_pc_ino2dosDvUpbuffD|TpdirHu]FATFSi_pc_get_rootuUpdriveyPpfixTpobjwPpdH]FATFSi_pc_firstblockTpobjPclno^]FATFSi_pc_next_block2TpobjPnxt(]FATFSi_pc_l_next_blockUpdriveTcurblockPcluster(5]FATFSi_pc_marki$5Upfi5Vpdrive5Wsectorno5^index\]FATFSi_pc_scani\ĻTpdrive\Vsectorno\^Windex^ʻUpfi~л]FATFSi_pc_allocobjֻUpobj$ܻ]FATFSi_pc_allociPp$`]FATFSi_pc_free_all_drobjVpdriveUpobj^Ti`]FATFSi_pc_free_all_ipdriveUpfi0]FATFSi_pc_freeiUpfi0H ]FATFSi_pc_freeobj_ TpobjH7]FATFSi_pc_dos2inode7 Updir7Tpbuffl^]FATFSi_pc_isavollPpobj^]FATFSi_pc_isadir3Ppobj^]FATFSi_pc_isrootr$Ppobjy apifrmat.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^^5Hdev_geometry ^dev_geometry_heads dev_geometry_cylinders ^dev_geometry_secptrack dev_geometry_lbas ^fmt_parms_valid fmt5DEV_GEOMETRY4fmtparms }oemname secpalloc secreserved numfats secpfat numhide numroot mediadesc secptrk numhead numcyl "physical_drive_no $binary_volume_label (text_volume_labelFMTPARMS   u:5u:5u:^^^T]FATFSi_pc_calculate_chsPtotalVcylindersWheads#secptrackUsThScTp^]FATFSi_rtfs_pc_get_media_parms$p)Tpathp/UpgeometrytPpdrr^Pdriveno@^]FATFSi_rtfs_pc_format_mediaTpathWpgeometryPpdr^Pdriveno@@^]FATFSi_rtfs_pc_format_volume%UpathTpgeometry^partition_status^ nibs_per_entry secpfat^$secpalloc^(root_entriesn_cylspartition_size^driveno,fmt^Wraw_mode_ioUpdr@]FATFSi_pc_fat_size2WnreservedPcluster_sizen_fat_copiesVroot_sectorsvolume_sizeUnibs_per_entryTentries_per_blockPtotal_clusters]FATFSi_get_format_parametersPnblocksPpsectors_per_allocPpnum_root_entries^Snum_root_entries^Psectors_per_alloc@ csstrtab.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\_3FATFSi_string_tablertfs_string_table ^string_id -string_valueRTFS_STRING_TABLEH.D]FATFSi_rtfs_strtab_stringJPptable^Pstring_id0@P]FATFSi_rtfs_strtab_user_string ^Pstring_id@h rtfat16.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:\ME@^]FATFSi_pc_init_drv_fat_info16nUpdrPpbl01Pdiv31Tmax_index3*Pmax_indexhY^]FATFSi_pc_mkfs16Y^drivenoYUpfmtY^use_raw|Pltotnibblese^Wret_valdblocknocjcPib^PfausizeaPldata_area`Plnclusters]Vltotsecs\ buf[Tbh rtfat32.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:\Mu:9u:9u:9u:9Eu:Fu:F\Mu:Eu:u:h*^]FATFSi_pc_init_drv_fat_infoiUpdroTpbl09Pmax_index,LU]FATFSi_pc_get_parent_clusterUuPpdriveU{PpobjL|b]FATFSi_pc_alloc_dirgbUpdrivebTpmomdPclusterdPclbase|n]FATFSi_pc_grow_dirnUpdrivenTpobjpPclusterpPtmpcl]FATFSi_pc_truncate_dirkUpdrivePpobjTclusterPtmpcld^]FATFSi_pc_mkfs32^drivenoUpfmt^Vuse_raw^ret_valblocknoPkRjWiPldata_areaPlnclustersWltotsecs bufTbdx{]FATFSi_pc_finode_cluster{Ppdr{Pfinodex]FATFSi_pc_pfinode_clusterlPpdrPfinodePvalue,^]FATFSi_pc_gblk0_32VdrivenoUpbl0Tb,P^]FATFSi_pc_validate_partition_type%Pp_typeP^]FATFSi_fat_flushinfoUpdrPbufVpf^]FATFSi_fatxx_pfpdword PpdrUindexTpvaluePppage^]FATFSi_fatxx_pfgdwordPpdrUindexTvalue Pppage apigfrst.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Hdstat vfname fext lfname filename fattribute ftime fdate $fsize (^driveno ,^drive_opencounter 0pname 0pext 4path @pobj Dpmom.DSTAT     .u:]FATFSi_rtfs_pc_gdone`UstatobjPpdrive PC csunicod.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\+>FATFSi_print_bufferEE   "]FATFSi_pc_unicode_byte2uppert"<Pto"BPfrom$Rc5^]FATFSi_unicode_ascii_index5HRp5Tbase8^Pindex7NcH^]FATFSi_unicode_compareFH_Pp1HePp2(]^]FATFSi_unicode_compare_nc]kRp1]qUp2`wcp2_cp1u^]FATFSi_unicode_cmp_to_ascii_charuPpuPc(0|]FATFSi_unicode_assign_ascii_char{|Pp|Pc]FATFSi_map_ascii_to_unicodePunicode_toPascii_fromPp0\]FATFSi_map_unicode_to_asciiOPtoPfrom\]FATFSi_pc_ascii_strn2upperPtoPfrom^PnSc^Ti]FATFSi_pc_ascii_str2upperBPtoPfromRc^]FATFSi_rtfs_cs_strcmpUs1Ts2Pw2Pw1@^]FATFSi_rtfs_cs_strcpy&PtargPsrc^Tloop_count@X^]FATFSi_rtfs_cs_strlen~Pstring^RlenX^]FATFSi_validate_filename/Unameascii_bufferuni_buffer!Tpu'Vpa^Wlen` ^]FATFSi_pc_cs_malias -alias 3input_file ^try&^Vret_val%9Wascii_alias$? ascii_input_file#EUscratch1"KTscratch`j]FATFSi_lfn_chr_to_unicodetQPtoWPfrlv]FATFSi_unicode_chr_to_lfn]PtocPfrxi]FATFSi_pc_cs_mfileJoUtouPfilename{Pexttemp_to^]FATFSi_pc_ascii_fileparseUfilenameVfileextTp^Pi,]FATFSi_pc_ascii_mfilelPtoPfilenamePextSretval^UiPp-^]FATFSi_pc_ascii_malias>-alias-Uinput_file-^Wtry0fileext0 filename/^Ps/^i/^Qn^]FATFSi_pc_valid_ascii_sfnWfilename^badchar^Vext_start^Uperiod_count^TlenP]FATFSi_unicode_make_printableOPpPc^PiPlB rtfatxx.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\p?FATFSi_fatxx_d(fat_driver Xfatop_alloc_chain fatop_clnext fatop_clrelease_dir fatop_faxx 9fatop_flushfat Tfatop_freechain fatop_cl_truncate_dir fatop_get_chain Sfatop_pfaxxterm ${fatop_pfaxxFAT_DRIVER^pdrpstart_clustern_clustersdolink^u:pdrclnou:^pdrclnou:^pdr-clnopvalue3u:?^driveno^Z^pdrclustermin_to_freemax_to_freeu:pdrclusterl_clusteru:pdrAstart_clusterpnext_clusterGn_clustersend_of_chainMu:^Y^pdruclnou:^pdrclnovalueu:u:u:^u:u:u:u:u:u:u:u:align1 +wrdbuf <fillu:u:align2 wrdbuf2 fillu:^u:u:u:u:u:u:u:u:u:PH]FATFSi_fatxx_alloc_chain_HUpdrHpstart_clusterHn_clustersH^dolinkP^is_errorORlast_clusterNvalueMWn_contigLTclnoK first_new_clusterJVstart_cluster ]FATFSi_fatxx_find_free_clusterWpdrUstartptTendptVis_errorvaluePi ]FATFSi_fatxx_clallocUpdrVclhint^is_errorTclno9]FATFSi_fatxx_clgrow-9Updr9Vclno=|Trange_check<Pnextcluster;Pnxtlr^]FATFSi_fatxx_clrelease_dirrUpdrrTclnot^Pcurrent_errnol^]FATFSi_fatxx_flushfat^PdrivenoPpdrB^]FATFSi_fatxx_freechainUpdrTclustermin_clusters_to_freemax_clusters_to_freeVclusters_freednextclusterD]FATFSi_fatxx_cl_truncate_dirUpdrTclusterWl_cluster^current_errno|Vrange_checkQnextcluster?^]FATFSi_fatxx_pfaxxterm?Ppdr?PclnoW^]FATFSi_fatxx_pfaxxWUpdrWVclnoWTvalue]Pt]Voffset]Windex\u]FATFSi_fatxx_clnextMTpdrPclnonxt"^]FATFSi_fatxx_faxx"SUpdr"Pclno"YWpvalue-_u2)u$result$Toffset$Vindexj]FATFSi_fatxx_get_chainpdrUstart_clusterVpnext_clustern_clustersWend_of_chainPvalueTn_contigPnext_clusterPclnol]FATFSi_fatxx_pfswaprPpdrPindex^Pfor_writePblock_offset_in_fat^]FATFSi_fatxx_fwordPpdrUindexTpvalue^VputtingPoffsetPppage@ ^]FATFSi_init_fatW Ppdr@^]FATFSi_faxx_check_free_spaceUpdr |VfreecountnxtTi-^]FATFSi_init_fat32-Tpdr4^]FATFSi_init_fat16Z4Tpdr;^]FATFSi_init_fat12;TpdrjJ^]fat32_check_freespaceBJVpdreTltempO|UfreecountN PpdwM^TiLPpage_basels^]fat16_check_freespacesVpdrSltempx|TfreecountwRpwv^UiuUpage_baseHh apiinfo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\94)^]FATFSi_rtfs_pc_set_default_drive )Tdrive+^Pdrive_no4^]FATFSi_rtfs_pc_get_attributesVpathUp_return^Wdriveno^Tret_valPpobj!^]FATFSi_pc_getdfltdrvno'T apiinit.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\?FATFSi_current_pdr^?FATFSi_enabled_driversu:u:u:H^]FATFSi_rtfs_init>Updr^TjH^]FATFSi_auto_format_diskPpdrUdrivename5geometry]FATFSi_drno_to_string Tpname^Pdrno portkern.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\88h]FATFSi_rtfs_port_alloc_mutex]FATFSi_rtfs_port_claim_mutex@Phandle]FATFSi_rtfs_port_release_mutexPhandle]FATFSi_rtfs_port_get_taskid]FATFSi_rtfs_port_puts]FATFSi_pc_getsysdateUpd$dataTsecPminutePhourPdayPmonthPyear6]RtcBCD2HEX'6Pbcd:|Rw9|Ui8Qhex-apifastmv.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ alias_buffer ^alias_buffer_size ^alias_buffer_count R alias_buffer_dataALIAS_BUFFER apimkdir.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:999^]FATFSi_rtfs_pc_rmdirY  name^Up_errno Tpdrive^driveno fileext Pfilename  path^ret_val& Vpchild, Wpobj2 parent_obj apirealt.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:u:8u:fileseginfo |block |nblocks( FILESEGINFOfreelistinfo cluster |nclustersu FREELISTINFO(^]FATFSi_rtfs_pc_cluster_sizeT ( Udrive, Ppdrive+^Tret_val*^Pdriveno^]FATFSi_rtfs_po_extend_file^Tfdn_bytes new_bytes start_cluster^Pmethod Updr Tpfileclusters_in_chainrange_check new_file_sizeQnew_alloced_sizeWalloced_sizeiVlast_cluster_in_chainfirst_cluster$largest_chain(n_clusters,ltemp0n_allocedQclno^4ret_val]FATFSi_pc_find_contig_clusters# pdrWstartpt" pchainmin_clusters^Pmethodendpt largest_chainlargest_sizeUFATFSi_chain_sizechain_startbest_sizeTbest_chain valuePi_6 prblock.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\Eu:@CEEAu:@C@C>A>A@C@C)>A@C@C>A@C>A@C>A@C>A@C@C@C@C@C,^]FATFSi_block_devio_write,Ppblk 3^]FATFSi_fat_devio_writeH3Ppdrive3Spblk3^Pfatnumber `U]FATFSi_pc_release_bufUTpblk`y]FATFSi_pc_discard_bufyUpblk{Tpbuffcntxt]FATFSi_pc_read_blknUpdriveVblocknoWpbuffcntxtTpblk4]FATFSi_pc_scratch_blk Upblk4x ]FATFSi_pc_free_scratch_blk UpblkPpbuffcntxtx4(]FATFSi_pc_init_blk(!Updrive(Wblockno+'Vpbuffcntxt*-Tpblk4c]FATFSi_pc_free_all_blk$c3Updriveg^deletingf9Tpblke?Vpbuffcntxt^]FATFSi_pc_write_blkfEPpblk]FATFSi_pc_add_blkKPpbuffcntxtQPpinblk ]FATFSi_pc_release_blk3WPpbuffcntxt]PpinblkcTpblk pi]FATFSi_pc_find_blkoPpdrivePblocknouSpblk{Rpbuffcntxtp(]FATFSi_pc_allocate_blkpdriveUpbuffcntxt^Rloop_guard^Wpopulated_but_uncommitedQpblkscanPpfoundblkTpuncommitedblkPpfreeblk(1]FATFSi_pc_flush_chain_blkV1Updrive1Vcluster5Tpblk4blockno3^WiBT^]FATFSi_pc_initialize_block_poolFTUpbuffcntxtT^VnblkbuffsUpmem_block_poolU^Wblk_hashtble_sizeU pblock_hash_tableYpblkW^TiDw^]FATFSi_pc_flush_fat_blockswVpdrive|PbzQplastzUpblkyTpfatbuffcntxt,]FATFSi_pc_map_fat_blockpdriveVblocknousage_flagsPbQpblkscanPpblkTpfatbuffcntxt^Phash_index,P^]FATFSi_pc_initialize_fat_block_pool Ppfatbuffcntxt^Pfat_buffer_sizePpfat_buffers^Pfat_hashtbl_sizepfat_hash_table# pfat_primary_cache/pfat_primary_indexP]FATFSi_pc_free_all_fat_blocks[5Upfatbuffcntxt;Vpblk^TiA]FATFSi_pc_find_fat_blkGPpfatbuffcntxtPblocknoMPpblk]FATFSi_pc_commit_fat_blk5SPpfatbuffcntxtYPpblkt]FATFSi_pc_commit_fat_table_UpfatbuffcntxtePpblk^TiVbt]FATFSi_pc_sort_committed_blocks kPpfatbuffcntxtqTpblk_source_scanwWpsort}Spsorted_listRpprevQpblkw,g1rtkernfn.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\K!FATFSi_med_st^{u:u:F9999FFEF ^]FATFSi_rtfs_resource_init! "\!]FATFSi_rtfs_get_system_userP"%Wt$^Tj$^RiHi]FATFSi_pc_free_all_users"i^Pdrivenok^TiH\^]FATFSi_rtfs_set_errno"^Terror\j^]FATFSi_rtfs_get_errno#l]FATFSi_pc_report_errorl#^Terror_number^]FATFSi_critical_error_handler$^Pdriveno^Umedia_status^Tneeds_flushb!Vpdrh!inbuf'^]FATFSi_pc_nuserfilesF$88^]FATFSi_pc_validate_driveno$8^Pdriveno8Y^]FATFSi_pc_memory_init-%^y!Updrive]!Ppfi\!Ppobj[^Pl[^Rj[^Tix!]FATFSi_pc_memory_drobj%!Upobj!Tpreturnx,!]FATFSi_pc_memory_finode&!Upinode!Tpfile_buffer!Ppreturn,0Sdrdefault.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\u:,2]FATFSi_i_no_print&4\(^]FATFSi_defaultRtfsIoi'(Pblock(&Tbuffer(Pcount(^reading\0>^]FATFSi_defaultRtfsCtrl'>^Pdriveno>^Uopcode>&VpargsA5gc@&Ppdr< sdrfile.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\)?FATFSi_file_heads+?FATFSi_file_cylinders*?FATFSi_file_secptrack'?FATFSi_file_capacity(?FATFSi_file_adjusted_capacity")?FATFSi_fileDescListh^u:<G^]FATFSi_fileRtfsIo*G^WdrivenoGQblockG)bufferGUcountG^ readingJdmyI^ViI^result@ p^]FATFSi_fileRtfsCtrlE+p^Tdrivenop^Uopcodep)pargsudmyufile_sizes5 gcr)Ppdr@  /^]FATFSi_fileRtfsAttach+/^PfileDesc/^Pdriveno2u:pdr1^Presult  Yattach.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\^FATFSi_rtfs_first_attach,FATFSi_rtfs_first_stat_flagh^u:,u:u:  C^]FATFSi_rtfs_attachw-C^VdrivenoC,UpdrC,dev_nameE,Ttarget_pdr  ^]FATFSi_rtfs_detach-^Vdriveno,Ttarget_pdr δrtfs_twl_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\EE.u:.u:9.F9999u:88u:8u:8u:u:9999u:9999u:E989u:  5^]pc_fill_blk05.Ppblk5^Pblocknum O^]block_devio_fill0O.PpblkO^Sblocknum\^]FATFSi_rtfs_pc_gfirst_ex1.Ustatobj.scf.name^ get_lfname.Ppdrive^Wdriveno.fileext.Pfilename.mompath\,^]FATFSi_rtfs_pc_gnext_ex2.Ustatobj.Vscf^get_lfname.Ppdrive.Pnextobj,%]pc_upstat_ex&3%.Ustatobj%.Wscf%^get_lfname(.Tpi'.pobjDS.]pc_get_inode_ex3S.UpobjS.QpmomS/VfilenameS /WfileextS^actionS^get_lfnameU^TstartingDP^]FATFSi_rtfs_pc_cache_clusters4^Ufd/bufbuf_sizestart/Vpdrive/Upfile^Tret_val`^]rtfs_get_next_cluster_cache5!/PpfilePfile_pointer'/PclnoPnext_of_end_indexTstart_indexScluster_index-/Ppdrive^Qresult.@^]rtfsi_pc_cache_clusters 8@3/Vpfile@Ufile_pointer@9/Wbuf@buf_size@?/Pstart_indexmPnew_indexMnow_indexMPindex_numL0next_clusterLfirst_clusterKPn_clusters_to_eofKPn_clustersKn_clusters_to_seekJ^PindexI^PiH^4end_of_chainG^ log2_bytespclusterF$bytespclusterEE/Pfat16_bufDK/Pfat32_bufCQ/(pdriveB^,ret_val0b^]FATFSi_twfs_po_open8W/PnamePflagPmode]/Ppfile^Ufdd^]FATFSi_twfs_pc_get_fatbits8c/Ppdrive^Tret_val^]FATFSi_rtfs_pc_mv_ex:i/old_nameo/new_name^Up_errnou/PpdrivePcluster^ ret_val{/new_parent_obj/Vnew_obj^new_driveno/ fileext/Pfilename/path/old_parent_obj/Told_obj^$old_drivenoG^]FATFSi_rtfs_pc_mkdir_ex;G/nameQ^Up_errnoP/TpdriveO^drivenoN^Wret_valM/fileextL/PfilenameK/ pathJ/Vparent_objI/pobjt/]pc_mknode_ex/=/Wpmom/ filename/fileextattributesUincluster/(null_str0,dot_str0Tpdrive%0pbuff80crdatePcltemp clusterF4lfinode+0$pdinodes^Vret_val10Vpobjt}^]FATFSi_twfs_pc_set_properties=}70Tpath}Uattributes}=0Vst_mtime^driveno^Wret_valC0Tpobj4^]twfs_ismountednameY>I0Pname^Tret_val^driveno4^]twfs_ismounteddrive>^Wdriveno^Vret_valO0Ppdrrtfs_twl_vfat_append.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\9kEFeJEJ^]pc_findin_exPAJw?TpobjJ}?filenameJ^WactionJ^Pget_lfnameX?PpWlastsegorderVIsU?Plfn_nodeT?4sfnS? lfnR?scratchQ^PdowildcardP^PmatchfoundO?PpfiN?UpiM?VpdL?rbuf> sdmc_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\N^first_select7gB@FATFSi_func_SDCARD_Out6sB@FATFSi_func_SDCARD_InmByB@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_PORT_CARDSDMC_PORT_NANDD DSD_CID DSD_CSD DSD_OCR $DSD_SCR ,SD_RCA .>mSDCARD_MMCFlag 0>mSDCARD_SDHCFlag 2>mSDCARD_SDFlag 4DSDCARD_ErrStatus 8SDCARD_Status <SD_CLK_CTRL_VALUE >SD_OPTION_VALUE @>mOutFlag Bport_noGCSDPortContext@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTDBDDDFFFF  Gbuf bufsize offset ^fill Gfunc Ginfo operation CportFSDCARDMsgGG b_flags result residGSdmcResultInfoGGGG Val jHPSel L H,h]FATFSi_sdmcGetErrCodeIhCPporthrFPrehxFPdek~FSSDPortTargetContext,^]FATFSi_sdmcIsFatalErrICPport^Pfatal_flagFQSDPortTargetContextBPdeDPre^]FATFSi_sdmcIsAbortErr5JCPportFPSDPortTargetContextDPre-D]FATFSi_sdmcSetInsertCallbackJ-FPcallbackAD]FATFSi_sdmcSetRemoveCallbackJAFPcallback<UD]FATFSi_sdmcGoIdleiKUPportsUFPfunc1UFPfunc2XFinit_msgWrGSdMsg\x]sdmcPostSleepK{Grecv_datzrGSdMsgD]FATFSi_sdmcWriteAesFifoLGPbufPbufsizePoffsetCPportG(infoHrecv_datrGSdMsg=D]sdmcFillAesFifo?M= HPbuf=Pbufsize=Poffset=CPport=H(info@Hrecv_dat?rGSdMsgTgD]FATFSi_sdmcWriteFifoNgHPbufgPbufsizegPoffsetgCPportg"H(infoj(Hrecv_datirGSdMsgTD]sdmcFillFifoN.HPbufPbufsizePoffsetCPport4H(info:Hrecv_datrGSdMsgX D]FATFSi_sdmcSelectOUselect@HSDCARD_PSelX  >D]FATFSi_sdmcSetLatencyEmulationO>PenableAHrecv_dat@rGSdMsgx 0"6 sdmc_cache.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\EP}SdmcCache  Pport ^valid offset PbufWPSdmcCacheInfo@enumSDMC_PORT_CARDSDMC_PORT_NAND@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTGGR QbufRbufsizeoffsetrG  ^]sdmcInitCacheS  m]sdmcInvalidateCacheQSmPPport !^]sdmcIsHitCacheSQUbufTbufsizePoffsetPPportPcache_offset_end!H! Q]sdmcCacheReadAesFifoTRPbufPbufsizePoffsetPPportR(infoRrecv_datrGSdMsgH!! Q]sdmcCacheReadFifoiURPbufPbufsizePoffsetPPportR(infoRrecv_datrGSdMsg!0"> Q]SDCARDi_CacheAccessV>RUAccessFunc>Vlimit>RTSdMsgARoriginal_buf@ QPapi_result!0"X:fBsdmc_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ @SD_port_en_numbers}SD_INFO1_VALUEFATFSi_sdmc_dma_no}SD_INFO2_MASK_VALUE}SD_INFO_ERROR_VALUE}SD_INFO1_MASK_VALUE }SD_INFO2_VALUEFATFSi_sdmc_dma2_no^$@FATFSi_thread_flag^(@SDCARD_UseAesFlag,@FATFSi_ulSDCARD_Size^0@sdmc_abort_request\4@FATFSi_sdmc_dtq_array\8@sdmc_slpq_arrayu^<@FATFSi_sdmc_tsk_created}FATFSi_ulSDCARD_SectorCount\}FATFSi_pSDCARD_BufferAddr\@@FATFSi_sdmc_result_dtq_array]SDNandContexttD@sdmc_srand}FATFSi_ulSDCARD_RestSectorCount}SDCARD_SectorSize= H@timeout_ms^L@SDCARD_EndFlag^SDPortCurrentContextsdmcRandEnable^P@SDCurrentAccess ^\@FATFSi_aesCounterDefaultQ_l@FATFSi_sdmc_intrq_arrayL@sdmc_slpqL@FATFSi_sdmc_intrqL@FATFSi_sdmc_dtqL@FATFSi_sdmc_result_dtqAFATFSi_sdmc_alm`,AFATFSi_sdmc_current_spec``ASD_SDSTATUSDASDPort1ContextDASDPort0ContextN(BFATFSi_sdmc_intr_tskNBFATFSi_sdmc_tskapCFATFSi_sd_intr_stackapcFATFSi_sd_stack\\ ]D@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTD  operation offset len^SDAccessAESCounter /_bytes @_words^AESCounterb_4 csd_ver2_flag memory_capacity protected_capacity card_capacity adjusted_memory_capacity heads secptrack cylinders SC BU RDE SS $RSC (FATBITS *SF ,SSA 0NOMh_SdmcSpec@ U UDD@enumSDMC_USE_DMA_4SDMC_USE_DMA_5SDMC_USE_DMA_6SDMC_USE_DMA_7SDMC_NOUSE_DMA@enumSDMC_PORT_CARDSDMC_PORT_NANDDrGGb]bufsbbufsizeoffsetrG0""]FATFSi_sdmcInitAesCounterb$amd5abuffer""5]FATFSi_sdmcSetAesCounterBc5Usector7^counter"$#L]FATFSi_sdmcStartAescLUsectorLTcount$#P#]sdmcInitContextcFaTsd_contextP##]]sdmcCheckPortContext9dLaUbuf_adr]Tresult#0$?]i_sdmcEnablexdA^Plast_irqP$`$A^]OS_DisableIrqdAPprep`$&]]FATFSi_sdmcInit:eRaPdma_noRaPdma2_no^Plast_irq]Papi_resultp&&]]FATFSi_sdmcResetePirq_core_flag&']]i_sdmcIniteUports',#]]SDCARD_LayerInitf&^Vretry%]Presult,.5]FATFSi_i_sdmcCalcSizef8Wmult_val8Vread_block_len_val7UulCSize./]]SDCARDi_ReadAesFifo&ga bufbufsizeoffset Tpos]Vresult/0t]]SDCARDi_ReadFifogtaVbuftUbufsizet offsetv]Presult00]]SDCARDi_ReadhaPbufPbufsizePoffset]Presult  ]]SDCARDi_ReadCorehaWbufUbufsizeVoffset^last_irq0,1#]SDCARD_TimerStarth#Utim+^Plast_irqX1|1A]SDCARD_TimerStop9iI^Plast_irq|1,2]FATFSi_i_sdmcErrProcessi]UErrBackupTStatusBackupusRSP0,22_^]sdmcIsProtected&j_aPportcbRSDTargetContextaTcsd_wp24]]SDCARDi_WriteAesFifojb bufbufsizeoffsetTpos]Vresult45"]]SDCARDi_WriteFifo=k"#bWbuf"Ubufsize" offset$]Presult56s]]SDCARDi_Writeks)bPbufsPbufsizesPoffsetu]Presult ]]SDCARDi_WriteCoreKl/bbufTbufsizeUoffset^Vk^last_irq6d8 ]SDCARD_Threadl ]Uapi_result 5bcurrent_dat ;bTSdMsgd8X: ]]SDCARDi_Access3n AbAccessFunc limit ybUSdMsg ]Perr_status Prrms ^ s_retry ^Wretry pos Plen offset bptr last_r1status  r1status ]$last_result ]Tresult H|CQmsdmc_intr.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\L psd_last_info1[ XotSDCARDi_TransferM ^|SDCARD_EndByDmaFlag ^xi^oH|| ]SDCARDi_CpuRecvFastp do srcp joQdestp Rsize|| ]SDCARDi_CpuSendFastp poPsrcp voQdestp Rsizeh:: ]SD_OrFPGAp |oUreg Tvalue ^Pb_irq::D^]OS_DisableIrqqDPprep:: ]SD_AndFPGAzq oUreg Tvalue ^Pb_irq   ]SD_SetFPGAq oUreg Tvalue ^Pb_irq:: ]SD_GetFPGA9r oTdest oUreg ^Pb_irq:; ]SD_ClrFPGAr oUreg Tvalue Pread_value ^Pb_irq; ; ]SDCARD_SetAbortr ^Pb_irq ;@; ]SDCARD_ResetAbort2s ^Pb_irq@;;- ]SDCARD_irq_Handler_s; <S ]NDMA_irq_Handlers <<m ]SDCARD_Timer_irqsm oUarg Ptimeout_spec now_rest<< ]SDCARD_Abort"t<\= ]SDCARD_TerminateForceot ^Tstop_com_flag\== ]SDCARD_ReadyToEndt=> ]SDCARDi_CpuReadFifoAest ^Uk ^Ti>>$ ]SDCARDi_DmaReadFifoAes?u' ^Uk& ^Ti>D?5 ]SDCARDi_CpuWriteFifoAesu8 ^Uk7 ^TiD??K ]SDCARDi_DmaWriteFifoAesuN ^UkM ^Ti?@a ]SDCARDi_CpuReadFifov @d@i ]SDCARDi_CpuReadBuf@vp@@t ]SDCARDi_CpuWriteFifoov@A} ]SDCARDi_CpuFillFifovATA ]SDCARDi_CpuWriteBufv`AA ]SDCARDi_CpuReadBufSinglevAA ]SDCARDi_Nothing(wA(B ]SDCARDi_FPGA_irqSw8B4C ]SYSFPGA_irqw Uinfo1l  ]SDCARD_Intr_Threadxj ^Pb_irq otmp Usd_current_info1 Usd_info14CDCD^]OS_EnableIrqTxDPprepDCC ^]SDCARDi_RemoveProcx Tinfo1 ^Pforce_flagCC ^]SDCARDi_InsertProc y Tinfo1 ^Pforce_flag C< sdif.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\'>mSDCARD_V2Flag&SD_port_number@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTC$DK]SD_InitIP{K^UbWriteReg$DHDc]SD_EnableInfo{HDD]SD_Command |UucCommandD(E]SD_AppCommand4|(EdE]SD_SetPullUpr|^PconnectdEF]SD_AppOpCond|FFM]SD_SendOpCond|FFp]SD_SendIfCond|FlG]SD_SendRelativeAddr}lGG]SD_SelectCard?}GG]SD_DeSelectCardi}GH]SD_SetIpBlockLength}RulBlockLengthHxH]SD_SetBlockLength}ulBlockLengthxH(I,]SD_SendCID?~,^Uall_send_cid(IIS]SD_SendCSDd~IIu]SD_SendStatus~IDJ]SD_SendSCR~DJJ]SD_SDStatus~ < ]SD_MultiReadBlockulOffsetJ4K]SD_ClockDivSetyPusTranSpeedPusTranTime4KDKB]SD_EnableAutoClockDKTKP]SD_EnableClockTKhK^]SD_DisableClockhK4Ls]SD_SelectBitWidth:s>mPb4bit4LL]MMCP_WriteBusWidth|^Pb4bitL$M]SD_StopTransmissionӀ^UiyTErrBackup$MxMK]SD_TransEndFPGAxMNe]SD_CheckStatusseUcheck_mask_hieTcheck_mask_loe^VbReadN.N]SD_SwapBytec{PdataPusDATA0NTN]SD_EnableSeccntUFATFSi_ulSDCARD_SectorCountTNtN]SD_SetErrlTErrorPirq_core_flagtNN]SD_ClrErrTErrorPirq_core_flagNN]SD_TransReadyFPGA  *]SD_TransCommand0*UucCommandNON^]SD_CheckFPGARegNPregNPvalue  ]SD_MultiWriteBlockǃulOffsetO`Uedrsdmc.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\initialize_flagGFATFSi_func_usr_sdmc_out+sdmc_total_sectorsF^FATFSi_sdmc_drive_no @enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTu:u:OXO^]FATFSi_sdmcRtfsIoh^PdrivenoTblockPbufferPcount^readingGSdResultPresultXOxT^]FATFSi_sdmcRtfsCtrl^driveno^UopcodepargsVresult5gcTpdrxTTw]i_sdmcIdleCardowUinitialize_flagyPresultTT]FATFSi_i_sdmcRemovedIntrT U]i_sdmcRemovedIntrCorePpdr U`U^]FATFSi_sdmcRtfsAttachT^Tdrivenou:pdr^Presultj`Ud^drnand.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\A^FATFSi_nand_drive_noSNAND_FAT_PARTITION_COUNTTNAND_RAW_SECTORSVNAND_FAT1_SECTORSWNAND_FAT2_SECTORSXNAND_FAT3_SECTORSUNAND_FAT0_SECTORSC^FATFSi_nand_calculated_fat_paramsBPNandFatSpec8 device_capacity adjusted_device_capacity memory_capacity adjusted_memory_capacity volume_cylinders heads secptrack cylinders SC BU RDE padding SS $RSC (FATBITS *SF ,SSA 0NOM 4begin_sectaFATSpecu:`Ud^^]FATFSi_nandRtfsCtrl^driveno^Topcode!pargs5gc'Vpdrd^\a[sdmc_flags.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\isdmc_nand_flagjsdmc_nand_flag_bakk|sdmc_spi_lockidl|sdmc_nvram_adrm^sdmc_log_initialized|d^^x^]i_sdmcGetNvramAdrixToffset^@_^]sdmcInitNandLogL_t_^]sdmcGetNandLogFatalt__]sdmcSetNandLogFatal__?^]i_sdmcCheckReadyNvramu?Uwait_msC^TresultBiAstatusReg_H`l^]sdmcFlushNandLogx``^]i_sdmcGetNvramސ!Vparam`a]i_sdmcSetParity.QparityPia\a^]i_sdmcCheckParityQparityPi)\apbKdrnand_aes.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\%^FATFSi_nandaes_drive_no\aa?^]FATFSi_nandAesRtfsIo ?^Pdriveno?Tblock?SPbuffer?Pcount?^readingBGSdResultAPresultapbd^]FATFSi_nandAesRtfsAttachd^Tdrivenod^Upartition_nogu:pdrf^Presultpbez@fatfs_resource.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\*xFATFSiHandleManager22FATFSHandleManager 'file_table `directory_table 2^filesInUse 2^directoriesInUseFATFSHandleManager`8 FATFSFile id drive busy ^fd •mode8FATFSFileOSMountPermissionOS_MOUNT_USR_XOS_MOUNT_USR_WOS_MOUNT_USR_R2+PFATFSDirectory id drive busy valid shortonly .status Lscf+FATFSDirectory 88888+++++pbc9]FATFSi_InitHandleManagerPQbaseHSbase@buffer?Tunique=^QicLcc ]FATFSi_ConvertHandleToFilecPhandleiPactualhPmanagereSretvalLcc}]FATFSi_AllocFile^Si!RmanagerQcpsr'Tretvalcc]FATFSi_FreeFileW-Pfile3Pmanagercc^]FATFSi_GetCurrentFileHandlesc0d9]FATFSi_ConvertHandleToDirectoryPhandlePactual?PmanagerESretval0ddK]FATFSi_AllocDirectory^SiQRmanagerWcpsrWTretvaldd]FATFSi_FreeDirectory]PdircPmanagerde^]FATFSi_GetCurrentDirectoryHandles1Le afatfs_command.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\y^FATFSiOnceAccessedSDCard -table ^indexv^FATFSiNowOnHeavyCommandmFATFSiSpecialDrivesqFATFSiLetterToHandle8FATFSiComanndFunctionTable ;table ~work@ FATFSiUnicodePathBuffer3TOSMountInfo Vdrive device target partitionIndex resource userPermission rsv_A rsv_B garchiveName xpath3OSMountInfo,@,? FATFSiSpecialDriveInfo ^index fileFATFSiSpecialDriveInfo8h" (5L ^rtfsErr fatfsErr l5,,,,,,88++@enumFATFS_OPTYPE_CREATIONFATFS_OPTYPE_DELETIONFATFS_OPTYPE_RENAMINGFATFS_OPTYPE_GETTERFATFS_OPTYPE_SETTERFATFS_OPTYPE_FILECTRLFATFS_OPTYPE_DIRCTRL@enumSDMC_STAT_ERR_UNKNOWNSDMC_STAT_ERR_CCSDMC_STAT_ERR_ECC_FAILED SDMC_STAT_ERR_CRCSDMC_STAT_ERR_OTHER@enumSDMC_NORMALSDMC_ERR_COMMANDSDMC_ERR_CRCSDMC_ERR_ENDSDMC_ERR_TIMEOUTSDMC_ERR_FIFO_OVFSDMC_ERR_FIFO_UDF SDMC_ERR_WP@SDMC_ERR_ABORTSDMC_ERR_FPGA_TIMEOUTSDMC_ERR_PARAMSDMC_ERR_R1_STATUSSDMC_ERR_NUM_WR_SECTORSSDMC_ERR_RESET SDMC_ERR_ILA@SDMC_ERR_INFO_DETECTFATFSCommandHeader command result flags nextFATFSCommandHeader,A,@,,88 1(FATFSCommandMountDrive header media ^partition name1FATFSCommandMountDrive,  FATFSCommandUnmountDrive header UnameFATFSCommandUnmountDrive, $FATFSCommandFormatDrive header name formatMediaFATFSCommandFormatDrive, 9\FATFSCommandCheckDisk header name verbose $fix_problems (write_chains ,info9FATFSCommandCheckDisk,0FATFSDiskInfo n_user_files n_hidden_files n_user_directories n_free_clusters n_bad_clusters n_file_clusters n_hidden_clusters n_dir_clusters n_crossed_points $n_lost_chains (n_lost_clusters ,n_bad_lfnsFATFSDiskInfou:4FATFSDriveResource UtotalSize UavailableSize maxFileHandles currentFileHandles maxDirectoryHandles currentDirectoryHandles bytesPerSector $sectorsPerCluster (totalClusters ,availableClusters 0fatBitsFATFSDriveResource "TFATFSCommandGetDriveResource header name resource"FATFSCommandGetDriveResource,4  FATFSCommandSetDefaultDrive header UnameFATFSCommandSetDefaultDrive,0@70FATFSFileInfoW ashortname rlongname padding length dos_atime $dos_mtime (dos_ctime ,attributesFATFSFileInfoW, pFATFSCommandGetFileInfoW header path <,padding @infoFATFSCommandGetFileInfoW,OpFATFSCommandSetFileInfoW header ۭpath <padding @infoOFATFSCommandSetFileInfoW,,TFATFSCommandCreateFileW header ^trunc permit $Ůpath P֮paddingFATFSCommandCreateFileW,,@FATFSCommandDeleteFileW header qpath <paddingFATFSCommandDeleteFileW,hFATFSCommandRenameFileW header #path <4newpathFATFSCommandRenameFileW,,WPFATFSCommandCreateDirectoryW header permit path LpaddingWFATFSCommandCreateDirectoryW,,2@FATFSCommandDeleteDirectoryW header path <űpadding2FATFSCommandDeleteDirectoryW,hFATFSCommandRenameDirectoryW header ppath <newpathFATFSCommandRenameDirectoryW,,0@78,TFATFSCommandOpenFileW header handle [mode $lpath P}paddingFATFSCommandOpenFileW,,8FATFSCommandCloseFile header handleFATFSCommandCloseFile88FATFSCommandReadFile header handle 5buffer ^lengthFATFSCommandReadFile0@788մFATFSCommandWriteFile header handle 5buffer ^lengthմFATFSCommandWriteFile8pFATFSCommandSetSeekCache header handle 5buf buf_sizepFATFSCommandSetSeekCache0@78!FATFSCommandSeekFile header handle ^offset origin!FATFSCommandSeekFile8FATFSCommandFlushFile header handleFATFSCommandFlushFile0@78>FATFSCommandGetFileLength header handle length>FATFSCommandGetFileLengthu:0@78FATFSCommandSetFileLength header handle lengthFATFSCommandSetFileLength+yTFATFSCommandOpenDirectoryW header handle mode $.path P?paddingyFATFSCommandOpenDirectoryW,,+bFATFSCommandCloseDirectory header handlebFATFSCommandCloseDirectory+߹DFATFSCommandReadDirectoryW header handle info߹FATFSCommandReadDirectoryW3FATFSCommandFlushAll headerFATFSCommandFlushAll3ܺFATFSCommandUnmountAll headerܺFATFSCommandUnmountAll0@7"8 33,FATFSCommandMountSpecial header Uparam ^slot arcnameFATFSCommandMountSpecial,8 FATFSCommandSetNdmaParameters header ndmaNo blockWord intervalTimer prescaler8FATFSCommandSetNdmaParameters3 4FATFSCommandFormatSpecial header path &padding ,UdataFATFSCommandFormatSpecial,׽FATFSCommandSetLatencyEmulation header enable׽FATFSCommandSetLatencyEmulation,,,R(+FATFSCommandSearchWildcard header Qdirectory bprefix ssuffix #buffer paddingFATFSCommandSearchWildcard ,,,0@7@,3,,,,,,, , e.e^]FATFSi_UnpackAsciiToUnicodePdstPsrc^Plen^Pi0eve^]FATFSi_CompareNIStringWSs1ßQs2^Rn^Pc2^Vc1^Ui^Pdiffxee^]FATFSi_IsShareArchiveNameɟUarcnameegϟ]FATFSi_GetLauncherInfoTable:9•Sac8•Pw7•Pr+•Pw*•Pr$^Vi gXg~]FATFSi_AbortHeavyCommandTbakXgg]FATFSi_CheckHeavyCommandBeginUdriveTlengthgg]FATFSi_CheckHeavyCommandEnd-Udrivegh]FATFSi_EnumPublicArchives՟Udst۟Parcname^Wi^Tbootlen^bootdriveFoundhi^]FATFSi_IsMediaProtectedATdrive$path^PprotectediPi?^]FATFSi_IsValidDrive?Wdrive?•Upermit?TresultL•PtargetPermitA^VretvalPi|i^]FATFSi_IsMediaFatal!Tdrive|iih]FATFSi_GetValidFileHandlehPhandlei•VpermitjUresultlTfileii ]FATFSi_GetValidDirectoryHandle3Phandle•VpermitUresultTdirij^]FATFSi_VerifyCommandResult!^VexprTdriveUtyperesult^Tisd_statsd_error^VerrorPretvaljm]FATFSi_ResolveIPLPathUdstTsrc•permit^ignorePermissionheader^Pindex^Pdstpos^Psrcpos^Plen2(src2^,rooti^Pindex`tmpC^0n@Pbase3•PspecialPermission2special^ParcnameLen8arcname4drive nLny^]FATFSi_CompareUnicodeStringdẓPsrczңPpatternLnn+^]FATFSi_CopyLUnicodeString,أPdst,ޣPsrc,^Plen.^Sin o]FATFSi_NormalizePathVpathWpdrive•RpermitUheader^RiPdstVdrive o(oe]FATFSi_RegisterDriveFilee^PdriveePfile(o@ov]FATFSi_UnregisterDriveFile<v^Pdrive@oo]FATFSi_CommandMountDrive1Uarg Pfile^Pattach_result^Tletter^VpartitionPnametmparcdrive+PpacketoVp*]FATFSi_CommandUnmountDrive*ͤTarg4^Uletter/ӤPname.٤tmparc-drive,PpacketXppR]FATFSi_CommandFormatDrive~RfUarg[5 geometryVlPnameUrtmparcTPpacketp q]FATFSi_CommandCheckDiskUargPname"tmparc3Ppacket qq]FATFSi_CommandGetDriveResourceVargUPPbytesPerClusterPpdriveUresourcePname tmparcdrivePpacketq&r]FATFSi_CommandSetDefaultDrivexǪTargͪPnameӪtmparcPpacket(rr]FATFSi_CommandGetFileInfo#fVarglstat}TinfoPpathdrivePpacketrxs$]FATFSi_CommandSetFileInfo$=Uarg9^PmodifyMtime88st_mtime7Pmask3^Presult-attributes(CWpath'drive&IPpacketxstT]FATFSi_CommandCreateFileTVarg`^Tfd_Upermit_flags^Taccess_flags]RpermitX pathWdriveVPpackett@t]FATFSi_CommandDeleteFile~UargPpathdrivePpacket@tt]FATFSi_CommandRenameFileUargPnewpathPpathdrivePpackettt]FATFSi_CommandCreateDirectoryEUargKPpathdriveQPpackettu]FATFSi_CommandDeleteDirectory' Uarg&Ppathdrive,PpacketuXu]FATFSi_CommandRenameDirectoryֱUargܱPnewpathPpathdrivePpacketXuxv]FATFSi_CommandOpenFileWargSstatCUfileVaccess_flagsPpathdrive•TpermitPmodePpacketxvvw]FATFSi_CommandCloseFilewUargzTfileyPpacketvw]FATFSi_CommandReadFile(UargPlimit^Plen^readedTpossrc^Palign4^ driveno pcVfilePpacketwx]FATFSi_CommandWriteFilerUargPlimit^Plen^writtenPrest|PcurrentstatVposdst^Palign4^ drivenoôpcɴTfileϴPpacketx8y8]FATFSi_CommandSetSeekCache8^Uarg<dPfile;jPpacket:^Presult8yyV]FATFSi_CommandSeekFileVUargk|Pcurrenth|Ppositiong|Wlengthastat`|VoffsetYTfileXPpacketyz]FATFSi_CommandFlushFile;TargPfilePpacketzHz]FATFSi_CommandGetFileLengthTarg!stat2Ufile8PpacketHz~{]FATFSi_CommandSetFileLengthUargcurWorgPp posVdstsrcǷstatطTfile޷Ppacket{d|* ]FATFSi_CommandOpenDirectoryx* aUarg; ^Vopendir4 gTdir/ mWpath. drive- ^Pshortonly, sPpacketd||d ]FATFSi_CommandCloseDirectoryd PUargg VTdirf \Ppacket|} ]FATFSi_CommandReadDirectoryY ͹Uarg ӹTdir ٹPpacket}} ^]FATFSi_CommandFlushAllCore ^Tdrive \path}~ ]FATFSi_CommandFlushAll mUarg ^Pdrive ^Pdrive ^Pdrive ^Pdrive ^Pdrive_num ^Ti sVtable yPpacket~< ]FATFSi_CommandUnmountAll< ʺVargz ^Udrivek ^drive\ ^driveM ^drive@ ^Pdrive_num@ ^Ui? кTtable> ֺPpacket ]FATFSi_CommandMountSpecial +TargP 1TargDQqqPRp^PfoundVPheaderzUbak_cpsr܌]FATFSi_WaitForRequest\UargbPppVbak_cpsr^TbusynPtarget(]FATFSi_SyncInitializationtUarclistzPargC(d&fatfs_thread.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\*FATFSiThread  FATFSThreadContext .task_list 4thread EstackFATFSThreadContextN b(p:]FATFSi_AppendRequest:VUtarget:^TisARM9=\Qpp<Vbak_cpsrpV]FATFSi_CommandThreadl^Wbak_cpsrYhTsync9_headerX^Vsync7$0]FATFSi_PostRequestnParg0<]FATFSi_PXICallbackPdata<d]FATFSi_InitThread1PpriorityddRfatfs_api.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\,FATFSFileInfo shortname longname padding length dos_atime dos_mtime $dos_ctime (attributesFATFSFileInfo,,,,1,do]FATFSi_CopyUnicodeStringoPdstoPsrco^Plenq^TiԎ"^]FATFS_MountDrive"name"Vmedia"Wpartition%Targ$^Pretval^]FATFS_CloseFileUfileTarg^PretvaldI]FATFS_OpenFileWIUpathIVmodeLPargKUretval6 x̤!aes_lo.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\xHspCallbacky LsCallbackParami90DMA_CONFIGarg AESNonce \bytes mwordsAESNonce   ^AESMacLengthAES_MAC_LENGTH_4AES_MAC_LENGTH_6AES_MAC_LENGTH_8AES_MAC_LENGTH_10AES_MAC_LENGTH_12AES_MAC_LENGTH_14AES_MAC_LENGTH_16AES_MAC_LENGTH_MAX\AESMac bytes words\AESMacAESKey bytes 1wordsAESKeyIdAESKeyAESKeySeedAESKeySlotAES_KEY_SLOT_AAES_KEY_SLOT_BAES_KEY_SLOT_CAES_KEY_SLOT_DAESModeAES_MODE_CCM_DECRYPTAES_MODE_CCM_ENCRYPTAES_MODE_CTRAES_MODE_CTR_ENCRYPTAES_MODE_CTR_DECRYPTx]AES_Reset]AESi_InterruptHandler̢]AES_SetNoncePpNonce̢]AES_SetCounterW~PpCounter0]AES_SetMacPlengthVPpMacPreg0H#]AES_SetKeyC#BPpKeyH`M]AES_SetKeySeedA/MHPpKey``]AES_LoadKey{`NPslotgPreg]AES_WaitKey]AES_DmaSend+PdmaNoPsrcPsizePcallbackargУ]AES_DmaRecvPdmaNoPdstPsizePcallbackarg]AES_SendPdata]AES_Recv(^]AES_IsIFifoFull9(,]AES_Run,Pmode,PaBlockNum,PpBlockNum,yPcallback,arg?Pregf]AES_Wait̤z^]AES_IsVerificationSuccess2Ԥ/aes_hi.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ZPsMacSize[TsFractionSizeTXsDmaNoForSendU\sDmaNoForRecvX`sSrcSizeYdsDstSizekN̤sNextSlot\ФspSrc]hspDst_lsFraction^^|sCounteri^sRandCountergzsMutexcLsThreadQbNsThreaddxsThreadQBufferexsThreadStack?8ThreadOpOP_PXI_SET_KEYOP_PXI_INIT_RANDOP_PXI_RANDOP_PXI_CTROP_PXI_CCM_ENCRYPTOP_PXI_CCM_DECRYPTOP_PXI_FOR_JPEGOP_PXI_CALC_MAC OP_CB_DMA_SEND_FINISHED OP_CB_AES_FINISHED OP_CB_AES_CTR_CONTINUE OP_CB_AES_CCM_ENC_FINISHEDOP_CB_AES_CCM_DEC_FINISHED^AESResultAES_RESULT_NONEAES_RESULT_SUCCESSAES_RESULT_VERIFICATION_FAILEDAES_RESULT_INVALIDAES_RESULT_BUSYAES_RESULT_ON_DSAES_RESULT_UNKNOWNAES_RESULT_MAX$AESPxiData )key ssrc srcASize srcPSize macLength ydstAESPxiDataAESPxiKey key ^counter nonceRomAccessControl common_client_key hw_aes_slot_B hw_aes_slot_C sd_card_access nand_access game_card_on shared2_file hw_aes_slot_B_SignJPEGForLauncher game_card_nitro_mode hw_aes_slot_A_SSLClientCert hw_aes_slot_B_SignJPEGForUser photo_access_read photo_access_write sdmc_access_read sdmc_access_write backup_access_read backup_access_write common_client_key_for_debugger_sysmenuRomAccessControlԤ]SetupDefaultFraction PpDataPdataSize^Ui2]StepSubKeyJ Pp4P ]ExclusiveOrAesBlock  Pa Pb^UiPdU]CallbackSendMessage U Pargdn]AesRun! oUsrcpQsrcASizeqPsrcPCSizerWdsts aesModet$finishMsg{pBlockNumzaBlockNumyTdmaRecvSizexPdmaSendSizewPdstSizevPsrcSize]CtrRun pVpCountervUsrcPsrcSize|WdstȦ0^]IsValidAddress 0Pptr0Plength2PaddrȦR]AesThread5Tresult)^Ui(\mp_maxRecvSize @mp_parentVCount Bmp_childVCount Dmp_parentInterval Fmp_childInterval HUmp_parentIntervalTick PUmp_childIntervalTick Xmp_minFreq Zmp_freq \mp_maxFreq ^mp_vsyncOrderedFlag `mp_vsyncFlag b>mmp_count d>mmp_limitCount fmp_resumeFlag hmp_prevPollBitmap jmp_prevWmHeader lmp_prevTxop nmp_prevDataLength pmp_recvBufSel rmp_recvBufSize t+mp_recvBuf |!-mp_sendBuf mp_sendBufSize mp_ackTime mp_waitAckFlag mp_readyBitmap mp_newFrameFlag '-reserved_b mp_sentDataFlag mp_bufferEmptyFlag mp_isPolledFlag mp_minPollBmpMode mp_singlePacketMode 8-reserved_c mp_defaultRetryCount mp_ignoreFatalErrorMode mp_ignoreSizePrecheckMode mp_pingFlag mp_pingCounter I-dcf_destAdr Z-dcf_sendData dcf_sendSize dcf_recvBufSel `-dcf_recvBuf dcf_recvBufSize curr_tgid linkLevel minRssi rssiCounter beaconIndicateFlag wepKeyId pwrMgtMode miscFlags VSyncBitmap valarm_queuedFlag v_tsf v_tsf_bak v_remain valarm_counter .reserved_e .MacAddress mode /pparam (0childMacAddress child_bitmap 1pInfoBuf aid 5parentMacAddress scan_channel 5reserved_f wepMode ^wep_flag 5wepKey rate preamble tmptt retryLimit enableChannel allowedChannel 5portSeqNo 5sendQueueData W7sendQueueFreeList m7sendQueue ~7readyQueue zsendQueueMutex 4^sendQueueInUse 87mp_lastRecvTick Ump_lifeTimeTick mp_current_minFreq mp_current_freq mp_current_maxFreq mp_current_minPollBmpMode mp_current_singlePacketMode mp_current_defaultRetryCount mp_current_ignoreFatalErrorMode 7reserved_gWMStatusWMstatus++6WMMpRecvBuf ,rsv1 length ,rsv2 ackTimeStamp timeStamp rate_rssi ,rsv3 ,rsv4 ,destAdrs ,srcAdrs $,rsv5 *seqCtrl ,txop .bitmap 0wmHeader 2-data+WMmpRecvBuf+WMMpRecvBufq-w-0WMDcfRecvBuf frameID v.rsv1 length .rsv2 rate_rssi .rsv3 .destAdrs .srcAdrs $.rsv4 ,.dataw-WMDcfRecvBufw-WMdcfRecvBuf@WMParentParam Z-userGameInfo userGameInfoLength padding ggid tgid entryFlag maxEntry multiBootFlag KS_Flag CS_Flag beaconPeriod 0rsv1 "0rsv2 2channel 4parentMaxSize 6childMaxSize 80rsv/WMpparam/WMParentParamZ 1 1WMBssDesc length rssi 2bssid ssidLength 2ssid ,capaInfo .2rateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @2gameInfo 1WMbssDesc 1WMBssDesc  basic supportWMGameInfo magicNumber ver platform ggid tgid userGameInfoLength |4__anon gameNameCount_attribute attribute parentMaxSize childMaxSize 4__anon 4userGameInfo 5old_type2WMGameInfo2WMgameInfo gameNameCount_attribute attributep 4userGameInfo 5old_typep7p M5userName ^5gameName o5padd1X+P'56  next port destBitmap restBitmap sentBitmap sendingBitmap padding size seqNo retryCount Z-data 7callback arg5WMPortSendQueueData7 head tail,7WMPortSendQueueW7W7U `]WVR_Shutdown"8<||®wmsp_system.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMIndCallback apiid errcode state reason8WMindCallback8WMIndCallback WMMpRecvData length rate_rssi aid noResponse wmHeader :cdataI9WMmpRecvDataI9WMMpRecvDataWMMpRecvHeader bitmap errBitmap count length txCount :data:WMmpRecvHeader:WMMpRecvHeader I9 <wlRsv <header <staMacAdrs retryLimit enableChannel rsv mode rate wepMode "wepKeyId $<wepKey tbeaconType vprobeRes xbeaconLostTh zactiveZoneTime | =ssidMask preambleType authAlgo:WlParamSetAllReq  code length<WlCmdHeaderP<   <header resultCode=WlParamSetCfm<||@]WMSP_GetAllowedChannel >@PbitFieldg|UiE|TcenterD|SminC|RmaxBPtempwmsp_indicate.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ >wlRsv <header ?buf>WlCmdReq @ h?wlRsv <header @ack?WlMaMpAckInd 0 @rsv1 length txKeySts rsv3 timeStamp rate rssi @rsv4 @rsv5 @destAdrs @srcAdrs $Arsv6 *seqCtrl ,tmptt .bitmapy?WlRxMpAckFrame;wmsp_wl_control.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ <header resultCodeAWlMlmeResetCfm \BwlRsv <header mibBWlMlmeResetReq  <header resultCodemBWlMlmePowerManagementCfmmBWlMlmePowerMgtCfm CwlRsv <header pwrMgtMode wakeUp recieveDtimsBWlMlmePowerManagementReqBWlMlmePowerMgtReq N <header resultCode foundMap bssDescCount #DbssDescListCWlMlmeScanCfmDED length rssi Ebssid ssidLength Essid ,capaInfo .ErateSet 2beaconPeriod 4dtimPeriod 6channel 8cfpPeriod :cfpMaxDuration <gameInfoLength >otherElementCount @#F__anon @cFgameInfo @tFotherElement4DWlBssDesc  basic support_element cFgameInfo tFotherElementT GwlRsv <header Gbssid ssidLength Gssid 8scanType :GchannelList JmaxChannelTime LbssidMaskCount NGbssidMaskFWlMlmeScanReq   <header resultCode statusCode OHpeerMacAdrsGWlMlmeJoinCfmX HwlRsv <header timeOut rsv EbssDesc`HWlMlmeJoinReq  <header resultCode statusCode IpeerMacAdrs algorithmHWlMlmeAuthenticateCfmHWlMlmeAuthCfm MJwlRsv <header ^JpeerMacAdrs algorithm timeOutIWlMlmeAuthenticateReqIWlMlmeAuthReq   <header resultCode JpeerMacAdrsoJWlMlmeDeAuthCfmoJWlMlmeDeAuthenticateCfm KwlRsv <header KpeerMacAdrs reasonCodeKWlMlmeDeAuthReqKWlMlmeDeAuthenticateReq   <header resultCode statusCode aidKWlMlmeAssCfmKWlMlmeAssociateCfm LwlRsv <header LpeerMacAdrs listenInterval timeOut=LWlMlmeAssReq=LWlMlmeAssociateReq   <header resultCode statusCode aidMWlMlmeReAssociateCfmMWlMlmeReAssCfm 8NwlRsv <header INnewApMacAdrs listenInterval timeOutMWlMlmeReAssociateReqMWlMlmeReAssReq  <header resultCodeZNWlMlmeDisAssociateCfmZNWlMlmeDisAssCfm POwlRsv <header aOpeerMacAdrs reasonCodeNWlMlmeDisAssociateReqNWlMlmeDisAssReq  <header resultCoderOWlMlmeStartCfm@ PwlRsv <header ssidLength Pssid 2beaconPeriod 4dtimPeriod 6channel 8basicRateSet :supportRateSet <gameInfoLength >PgameInfoOWlMlmeStartReq  ( <header resultCode reserved QccaBusyInfo QWlMlmeMeasChanCfm QWlMlmeMeasureChannelCfm ( RwlRsv <header rsv ccaMode edThreshold measureTime RchannelListQWlMlmeMeasChanReqQWlMlmeMeasureChannelReq  <header resultCode txStatusRWlMaDataCfm0 frameId )Trsv1 length status rsvm1 rsvm2 rate rssi rsvm3 :Trsv4 KTdestAdrs \TsrcAdrs $mTrsv5 ,~TdatapSWlTxFrame@ TwlRsv <header TframeTWlMaDataReq  <header resultCodeTWlMaKeyDataCfm UwlRsv <header length wmHeader ~TkeyDatap0UWlMaKeyDataReq  <header resultCodeUWlMaMpCfm$ WwlRsv <header resume retryLimit txop pollBitmap tmptt currTsf dataLength wmHeader ~TdatapVWlMaMpReq  <header resultCodeWWlMaClearDataCfmWWlMaClrDataCfm WwlRsv <header flagtWWlMaClearDataReqtWWlMaClrDataReq  pXwlRsv <header XstaMacAdrsWWlParamSetMacAdrsReqWWlParamSetMacAddressReq  XwlRsv <header retryLimitXWlParamSetRetryLimitReq  qYwlRsv <header enableChannelYWlParamSetEnableChannelReq  YwlRsv <header modeYWlParamSetModeReq  CZwlRsv <header rateYWlParamSetRateReq  ZwlRsv <header wepModeTZWlParamSetWepModeReq  #[wlRsv <header wepKeyIdZWlParamSetWepKeyIdReq ` [wlRsv <header [wepKey4[WlParamSetWepKeyReq P[  '\wlRsv <header beaconType[WlParamSetBeaconTypeReq  \wlRsv <header probeRes8\WlParamSetProbeResReq8\WlParamSetProbeResponseReq  Y]wlRsv <header beaconLostTh\WlParamSetBeaconLostThresholdReq\WlParamSetBeaconLostThReq  ]wlRsv <header activeZoneTimej]WlParamSetActiveZoneReq 0 ?^wlRsv <header P^mask]WlParamSetSsidMaskReq   ^wlRsv <header typea^WlParamSetPreambleTypeReq  Y_wlRsv <header type^WlParamSetAuthenticationAlgorithmReq^WlParamSetAuthAlgoReq  !`wlRsv <header ccaMode edThreshold agcLimitj_WlParamSetCCAModeEDThReqj_WlParamSetCCAModeEDThresholdReq  `wlRsv <header tableNumber camLifeTime frameLifeTime2`WlParamSetLifeTimeReq  ]awlRsv <header count`WlParamSetMaxConnReq`WlParamSetMaxConnectableChildReq  awlRsv <header mainAntennanaWlParamSetMainAntennaReq  _bwlRsv <header diversity useAntennaaWlParamSetDiversityReq  bwlRsv <header enableMessagepbWlParamSetBeaconSendRecvIndReq  NcwlRsv <header modebWlParamSetNullKeyModeReq  cwlRsv <header cbssid_cWlParamSetBssidReq 2 KdwlRsv <header ssidLength \dssidcWlParamSetSsidReq   dwlRsv <header beaconPeriodmdWlParamSetBeaconPeriodReq  JewlRsv <header dtimPerioddWlParamSetDtimPeriodReq  ewlRsv <header listenInterval[eWlParamSetIntervalReq  NfwlRsv <header gameInfoLength _fgameInfoeWlParamSetGameInfoReq F <header resultCode hstaMacAdrs retryLimit enableChannel channel mode rate wepMode wepKeyId beaconType probeRes beaconLostTh activeZoneTime "$hssidMask BpreambleType DauthAlgopfWlParamGetAllCfm   <header resultCode hstaMacAdrs5hWlParamGetMacAdrsCfm5hWlParamGetMacAddressCfm <header resultCode retryLimithWlParamGetRetryLimitCfm  <header resultCode enableChannel channel3iWlParamGetEnableChannelCfm <header resultCode modeiWlParamGetModeCfm <header resultCode ratejWlParamGetRateCfm <header resultCode wepModeqjWlParamGetWepModeCfm <header resultCode wepKeyIdjWlParamGetWepKeyIdCfm <header resultCode beaconType9kWlParamGetBeaconTypeCfm <header resultCode probekWlParamGetProbeResCfmkWlParamGetProbeResponseCfm <header resultCode beaconLostTh%lWlParamGetBeaconLostThresholdCfm%lWlParamGetBeaconLostThCfm <header resultCode activeZoneTimelWlParamGetActiveZoneCfm& <header resultCode mmask&mWlParamGetSsidMaskCfm  <header resultCode typemWlParamGetPreambleTypeCfm <header resultCode typemWlParamGetAuthenticationAlgorithmCfmmWlParamGetAuthAlgoCfm  <header resultCode ccaMode edThreshold agcLimitnWlParamGetCCAModeEDThCfmnWlParamGetCCAModeEDThresholdCfm <header resultCode countEoWlParamGetMaxConnectableChildCfmEoWlParamGetMaxConnCfm <header resultCode mainAntennaoWlParamGetMainAntennaCfm  <header resultCode diversity useAntenna8pWlParamGetDiversityCfm <header resultCode enableMessagepWlParamGetBeaconSendRecvIndCfm <header resultCode mode*qWlParamGetNullKeyModeCfm  <header resultCode qbssidqWlParamGetBssidCfm( <header resultCode ssidLength srssidqWlParamGetSsidCfm  <header resultCode beaconPeriodrWlParamGetBeaconPeriodCfm <header resultCode dtimPeriondrWlParamGetDtimPeriodCfm <header resultCode listenInterval[sWlParamGetIntervalCfm  <header resultCode gameInfoLength GtgameInfosWlParamGetGameInfoCfm <header resultCodeXtWlDevShutdownCfm <header resultCodetWlDevIdleCfm <header resultCodetWlDevClass1Cfm <header resultCode0uWlDevRebootCfm0uWlDevRestartCfm <header resultCodeuWlDevSetInitializeWirelessCounterCfmuWlDevClrInfoCfm <header resultCode vwlVersion macVersion vbbpVersion rfVersionvWlDevGetVerInfoCfmvWlDevGetVersionCfm <header resultCode rsv1 wcountervWlDevGetWirelessCounterCfmvWlDevGetInfoCfm wtx nxrx dymultiPollxwWlCounter  success failed retry ackErr unicast multicast wep beaconD rts fragment unicast multicast wep beacon fcsErr duplicateErr mpDuplicateErr $icvErr (fcErr ,lengthErr 0plcpErr 4bufOvfErr 8pathErr <rateErr @fcsOkP txMp txKey txNull rxMp rxMpAck azkeyResponseErr< <header resultCode staterzWlDevGetStateCfmrzWlDevGetStationStateCfm <header resultCodezWlDevTestSignalCfm {wlRsv <header control signal rate channel9{WlDevTestSignalReq  <header resultCode{WlDevTestRxCfm |wlRsv <header control channel)|WlDevTestRxReq   <header resultCode |buf|WlCmdCfmreq_StartParent.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\0WMStartParentCallback apiid errcode wlCmdID wlResult state ~macAddress aid reason ~ssid ,parentSize .childSize}WMstartParentCallback}WMStartParentCallbackreq_StartScan.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartScanCallback apiid errcode wlCmdID wlResult state macAddress channel linkLevel ssidLength ssid 6gameInfoLength 82gameInfoWMStartScanCallbackWMstartScanCallback WMStartScanReq apiid channel ŁscanBuf maxChannelTime ˁbssidWMStartScanReqWMstartScanReq 1pWMStartScanExCallback apiid errcode wlCmdID wlResult state channelList reserved bssDescCount bssDesc P.linkLevel܁WMStartScanExCallback܁WMstartScanExCallback@Ł <WMStartScanExReq apiid channelList ŁscanBuf scanBufSize maxChannelTime |bssid scanType ssidLength ssid 6ssidMatchLength 8rsv?WMStartScanExReq?WMstartScanExReq req_StartConnect.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartConnectCallback apiid errcode wlCmdID wlResult state aid reason wlStatus macAddress parentSize childSizeOWMstartConnectCallbackOWMStartConnectCallback(WMStartConnectReq apiid reserved {pInfo ssid ^powerSave $reserved2 &authModeWMStartConnectReqWMstartConnectReq 1[req_Disconnect.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMDisconnectCallback apiid errcode wlCmdID wlResult tryBitmap disconnectedBitmap0WMDisconnectCallbackreq_StartMP.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\$WMStartMPCallback apiid errcode state reserved recvBuf timeStamp rate_rssi destAdrs srcAdrs seqNum tmptt pollbmp "reserved2WMStartMPCallbackWMstartMPCallback+WMMPTmpParam mask minFrequency frequency maxFrequency defaultRetryCount minPollBmpMode singlePacketMode ignoreFatalErrorMode 5reserved WMMPTmpParamWMMPParam mask minFrequency frequency maxFrequency parentSize childSize parentInterval childInterval parentVCount childVCount defaultRetryCount minPollBmpMode singlePacketMode ignoreFatalErrorMode ignoreSizePrecheckModeFWMMPParam@WMStartMPReq apiid rsv1 ͎recvBuf recvBufSize ͎sendBuf sendBufSize Fparam 0 tmpParamWMStartMPReqreq_SetMPData.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\(WMPortSendCallback apiid errcode wlCmdID wlResult state port destBitmap restBitmap sentBitmap rsv 4data :__anon size length seqNo gcallback zarg $maxSendDataSize &maxRecvDataSizepWMPortSendCallback size lengthmzareq_StartDCF.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStartDCFCallback apiid errcode state Βreserved ߒrecvBufWMStartDCFCallbackWMstartDCFCallbackw-Zreq_StartTestMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMStartTestModeCallback apiid errcode RFadr5 RFadr6 PllLockCheck RFMDflagWMStartTestModeCallback<req_MeasureChannel.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMMeasureChannelCallback apiid errcode wlCmdID wlResult channel ccaBusyRatioWMmeasureChannelCallbackWMMeasureChannelCallback WMMeasureChannelReq apiid ccaMode edThreshold channel measureTimeŕWMMeasureChannelReqŕWMmeasureChannelReqvreq_GetWirelessCounter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\WMGetWirelessCounterCallback apiid errcode wlCmdID wlResult TX_Success TX_Failed TX_Retry TX_AckError TX_Unicast TX_Multicast TX_WEP $TX_Beacon (RX_RTS ,RX_Fragment 0RX_Unicast 4RX_Multicast 8RX_WEP <RX_Beacon @RX_FCSError DRX_DuplicateError HRX_MPDuplicateError LRX_ICVError PRX_FrameCtrlError TRX_LengthError XRX_PLCPError \RX_BufferOverflowError `RX_PathError dRX_RateError hRX_FCSOK lTX_MP pTX_KeyData tTX_NullKey xRX_MP |RX_MPACK MPKeyResponseError)WMgetWirelessCounterCallback)WMGetWirelessCounterCallback<vwmsp_port.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\DWMPortRecvCallback apiid errcode state port OrecvBuf data length aid UmacAddress seqNo arg myAid "connectedAidBitmap $fssid <reason >rssi @maxSendDataSize BmaxRecvDataSizeWMPortRecvCallback+-req_SetMPParameter.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\$WMSetMPParameterCallback apiid errcode mask FoldParamWMSetMPParameterCallback,req_StopTestRxMode.cMetrowerks C/C++ for ARMD:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\ WMStopTestRxModeCallback apiid errcode fcsOk fcsErrJWMStopTestRxModeCallback$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\code16.hcodereset.hcode32.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcommand-line defines)initScfg.c|8%C  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\init\ARM7.TWL\src\code32.hcodereset.hcode32.hboot_sync.hversion.hformat_rom_certificate.hformat_rom.hmmap_wramEnv.hmmap_global.htypes.hioreg_SD.hioreg_SPI.hioreg_OS.hioreg_PAD.hioreg_PXI.hioreg_EXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hioreg.hmmap_parameter.hmmap_shared.hmmap_wram.hmmap_main.hmemorymap.hmemorymap_sp.hcrt0.hstdarg.ARM.hva_list.h ansi_parms.h cstdarg stdarg.h file_struc.h eof.h null.h wchar_t.h size_t.h stdio_api.h msl_rsize_t.h msl_lib_ext1.h cstdio os_enum.h ansi_prefix.ARM.hmslGlobals.h msl_c_version.h stdio.h printf.h emulator.h armArch.h command-line defines) crt0.LTD.c 58 (5h85$858585858585858E# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\components\mongoose.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmain_end.hsection.hmain_begin.hltdmain_end.hltdmain_begin.htwl.htwl_sp.hspi_sp.htypes.hnvram_sp.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htypes.hhi.h aes.hsndex_api.h pm.h spi.h type.h config.h spi.hcdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hcodecmode.hgx.hlcd.hrtc.hsnd.hstd.hpad.hfatfs.hspi.hmemorymap.hmemorymap_sp.hownerInfo.hmmap_shared.hspec.hownerInfoEx.hgenPort.hexi.hdsp.hcontrol.htypes.hi2c.hemulator.hutil.hfifo.hcamera.hmmap_wram.hmmap_wramEnv.hsystem.hscfg_private.hscfg.hscfg.hnwm_sp.hwm.hnwm.hnwm.hmisc.hdgt.hcrc.hchecksum.hfx.hfft.hmath.hqsort.hrand.hmath.hpxi.hos.hmi.hmemorymap.hctrdg_sp.hctrdg_task.hctrdg_sram.hctrdg_flash.hnitro.hctrdg_backup.hctrdg_common.hctrdg.hwvr_sp.hwvr_common.hwvr.hWlParam.h WlStaList.h WlCmdLabel.h WlBuf.h WlFrame.h WlCmd.h WlLib.h version_wl.h!twl_hybrid.hwm_sp.h"wm.h#gx_sp.h$types.h%command.h&api.h%thread.hsystemWork.hstdlib.h'unicode.h'memory.h(string.h'overlay.h)romfat.h)file.h)archive.h)api.h)hook.h)rom.h*types.h)fs.hpullOut.h*device.h(types.h*hash.h*exMemory.h(dma.h(backup.h*fram.h*flash.h*eeprom.h*common.h*card.hsndex_common.h+util.h,exchannel.h,channel.h,midiplayer.h,seq.h,mml.h,data.h,bank.h,capture.h,alarm.h,mmap_global.hioreg_SND.h-mmap_global.h-armArch.hwork.h,global.h,command.h,main.h,snd.htype_ex.h.instruction_ex.h/fifo_ex.h.gpio.h0type.h1instruction.h0control.h0fifo.h1rtc.hshutdown.h2fifo.h3pm_common.h4ioreg_PAD.hpm_common.h ioreg_SPI.hmic_common.h4xyButton.h5ioreg_PAD.h-pad.h6sharedWram.h7dma.h7mi.hos.hlimits_api.h8ansi_parms.h8climits8limits.h8armArch.hcrt0.h9application_jump.hprofile.hfunctionCost.hcallTrace.hvalarm.harena.halarm.hresource.hspinLock.hsystemWork.hentropy.hgxcommon.h$userInfo_ts_300.h spec.hregname.h3platform.hcache.h(endian.h(init.h(compress.h(uncomp_stream.h(stream.h(byteAccess.h(secureUncompress.h(uncompress.h(swap.h(wram.h(compparam.h3init.h3pxi.hreset.htick.halloc.hinit.hexception.hmutex.hmessage.hprintf.hsystemCall.htimer.hcontext.hevent.hinterrupt.hinterrupt.hsystem.hversion.hsystemCall.hstdarg.ARM.h:va_list.h8cstdarg8stdarg.h8file_struc.h8eof.h8null.h8wchar_t.h8size_t.h8stdio_api.h8msl_rsize_t.h8msl_lib_ext1.h8cstdio8os_enum.h8ansi_prefix.ARM.h:mslGlobals.h8msl_c_version.h8stdio.h8ioreg_SD.hioreg_OS.hioreg_PXI.hioreg_GX.hioreg_MI.hioreg_SND.hioreg_SCFG.hioreg_AES.hmmap_parameter.hmmap_main.hcommand-line defines);main.c<|nn||B|  | ||+' #  +'# @|L|vX|d|p|||'{{ '~+~.+~ # v||2./" v|v|2/" <|&h|z|pr& |;n& z |ye D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7.TWL\src\ioreg_OS.hmmap_global.hsystem.hthread.hinterrupt.htypes.hcode32.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5memorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_irqHandler.c7 |.  | |U D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_irqTable.c7||"D|P|\|h|t||||||" ||||d D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ltdmain_end.hsection.hltdmain_begin.hsystem.hinterrupt.harmArch.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.hthread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.h ioreg.h scfg_private.h2misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_interrupt.c7|) |<!t["X,T. | {{q|V ||" (|H|X|x|||||(|P D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_pxi.c7H|%T|6`|l| | | D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_spinLock.c7|~ w ww ~T|# |R|#/t|+#| |"|"|| ||w D:\Program Files\INTELLIGENT SYSTEMS\IS-TWL-DEBUGGER\Target\include\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\istdbglibpriv.histmidi.histdfio.histdsio.histdhio.histdprint.histdbglib.hdbghost.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7os_printf.c8|'|lX|#x| |S |R X|"R | }p ~+8|"z D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hmi.hos.hmemorymap.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_thread.c7X|z |a"||}0|}~\|| t  z{p !|  z w|{ uz|} w l ~ |||#}|| /\| }| }3z | | ~| }#| | #~~ |  | @| ~L|'t|~{ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hmemorymap.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_context.c7|*|<|%U D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\mmap_wramEnv.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_emulator.c7h|p|' ||   | |#T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\message.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_message.c7 |" |7v*!| xv#"!| xvR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_mutex.c7!|(!|8 tv $"|0"|{|x h"|"3"|#"|3#|##|#|}_ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hscfg.htwl.happlication_jump_private.hpm.hcommon.hctrdg_common.hpxi.hwram.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h#rom.hhook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)7os_init.c8#|#| eR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_arena.c78$|P`$|""$|$|$|.X(a}~  $|-ks ,%|R D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\alloc.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_alloc.c78%|\%| }~~{ }%||{j0&| ./#  .2&'n  .2&&/l"(} D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hos.hmemorymap.harmArch.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,mi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_exception.c7'|}C~   (|(|(| )|~~.&   lR D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_timer.c7D*|.Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_tick.c7\*|7 *|*|*|  > t+|y D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hcode32.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_alarm.c7+|7+'  +|,|,|$,|3#} i,|7P-|xx}| -|~.|$.|#~ S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_valarm.c7.|.|.|} b"BX/|~/|/|" |y /|<0| h0|z0|*{%  0|} W)'E 1|z D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\code16.hcodereset.hscfg.hcode32.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_system.c7 2|(42|<H2|`2|t2|2|2|W D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\codecmode.hemulator.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.h unicode.hstdlib.hownerInfo.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.hthread.hapi.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.hmmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_systemWork.c72|"2|<3Y9 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mb\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\ltdwram_end.hsection.hltdwram_begin.hwram_end.hwram_begin.hcode32.hcard.hglobal.hmb.htypes.hmb_fake_child.hmb_child.hmb_gameinfo.hwm.hfile.hmisc.hmb.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.hrom.h"hook.hapi.harchive.hromfat.hoverlay.hfatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.hnwm.h0nwm_sp.h1twl.hscfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7os_reset.c82|t t $3|z ||| T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\common\src\gx.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6os_entropy.c73|!}}"..*2 2 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\os\ARM7\src\mcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hctrdg.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8os_terminate_sp.c9T4|$64|4|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmi_ndma.hsystem.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.hapi.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.hi2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7mi_ndma.c8|$_!cfiloru x{ H|/"#&&#* 4|L| | | | X| /p| | ~| | "2| $| 0| <| ~}}{zd|_|_"g D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common.TWL\src\system.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.hapi.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_sharedWram.c74|j5|F5|5|L D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\nitro.hmi_dma.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.h nwm.h0wm.h nwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.h genPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7mi_dma.c85| } <6| || 6| z D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\code16.hcodereset.hcode32.hmath.hmemory.hplatform.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hfft.hfx.h.checksum.hcrc.hdgt.hmisc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h&scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_memory.c76|6|6|6|7|07|7|8| H9| u x D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\code16.hcodereset.hcode32.hswap.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.h mic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_swap.c7t9|,tQ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mi\common\src\dma.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h sharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.h nwm.h/wm.h nwm_sp.h0twl.hscfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.h genPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6mi_init.c7|9|! c D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pad\ARM7\src\nitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6pad_xyButton.c79|) 9|~#+kS D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\misc.hpxi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h fifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.hnwm.h/wm.hnwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.hgenPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6pxi_init.c7,:|/S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\pxi\common\src\twl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.hctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6pxi_fifo.c74:|(~~ || }y&:| .3(;|BP;|*&;|'";|y|#"g"hU D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6std_string.c7X<|-~~|<||{ #<|~v<|~<|?}=|z zV D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6std_sprintf.c7D=|`=| ~ ..  w w {*&<*<&~~*f*^  "Zb2^b#..3*/..3*G6;||y  6|{ &||/&""s8k0b}# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\std\common\src\ltdmain_end.hsection.hltdmain_begin.hunicode.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6std_unicode.c7TE|{M D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7\src\exi.hgenPort.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.hioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6gpio.c7`E|!&tE|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\exi\ARM7.TWL\src\memorymap.htypes.hgenPort2.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7gpio2.c8E|&&E|#"E|E|4i D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.hcapture.hchannel.htypes.hmisc.hpm_utility.hpm_common.hioreg_SND.hos.hglobal.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hwork.harmArch.hmmap_global.hmmap_global.h alarm.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.hapi.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.hnwm.h1wm.hnwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.hioreg.h scfg_private.h4system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)8snd_global.c9E|<"E|~~F|}" XF|" F|F|/6}T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\channel.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_channel.c7F|; t 3 |"dG|x3 |G|x3 LH|tH|3H|&H|~/0I|HI|~}}}}}} I|I|~}yw  I|2gS D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\os.hchannel.hutil.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_util.c7J|z}}{}s+#J|~DK| w}}K|.]S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\sndex_api.hwork.hutil.hcommand.halarm.hseq.hexchannel.hglobal.hos.hmain.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hmidiplayer.hchannel.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_main.c7K|B K| (L|8L| LL|PL|TL|+# L|}2+ m{ [ T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7\src\misc.hcapture.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_capture.c7} : h|h|  R&"S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\work.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.h api.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_work.c7i|.i|*i||}~#|""<T D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\work.hpxi.halarm.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.harmArch.hmmap_global.hioreg_SND.hmmap_global.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_alarm.c7Hj|~~}pj|#j|'. Hk|tk| {V D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\common\src\main.halarm.hutil.hglobal.hwork.hcapture.hseq.hmi.hpxi.hos.hmisc.hcommand.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.harmArch.hmmap_global.hioreg_SND.hmmap_global.hbank.hdata.hmml.hmidiplayer.hchannel.hexchannel.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-types.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hioreg.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6snd_command.c7k|) k| DZ',' ""+&D|07R_R 2~~ Lp|  #C " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hspi_sp.htypes.hnvram_sp.htype.hpm_sp.hioreg_OS.htypes.hmic_sp.htp_sp.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6memorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7spi_sp.c8p|="~ { Pq| }~~" q|  q| Pr|}dr|tr|r|'|y~ .@s|#Xs|/ fs|  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\codecmode.htypes.hmisc.hpm_shutdown.hpm_selfBlink.hpm_sleep.hpm_utility.hpm_common.hpm_pmic.hpm_send.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0std.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hgenPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9pm_sp.c:s|}~~ t|~~6   t|'*6. & u|CR/ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\pm_common.hpxi.htwl.htwl_sp.hspi_sp.htypes.hmisc.hpm_send.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.h thread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8pm_send.c9u|228 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\twl.htwl_sp.hspi_sp.hpm.hspi.htype.hconfig.hspi.hpxi.hpm_common.htypes.hmisc.hpm_pmic.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h exi.hgenPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8pm_pmic.c9v|>} Dv|"\v|'Bv|v|!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\main_end.hsection.hmain_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hspi.hcdc_api.hcdc_dsmode_access.hcdc_twlmode_access.hspi.hcdc_reg.hcdc.hcodecmode.htypes.hmisc.hpm_shutdown.h global.h pm_selfBlink.h pm_utility.h pm_common.h pm_pmic.h emulator.h system.h pm.htype.h config.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h command.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_api.h"sndex_common.h#card.hcommon.h$eeprom.h$flash.h$fram.h$backup.h$dma.hexMemory.hhash.h$types.h$device.hpullOut.h$fs.htypes.h%rom.h$hook.h%api.h%archive.h%file.h%romfat.h%overlay.h%fatfs.hsystemWork.hthread.h api.h&command.h'types.h&gx.hgx_sp.hlcd.h!wm.h(wm_sp.h)twl_hybrid.h*version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h*ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5twl.h*scfg.hscfg.h6mmap_shared.hscfg_private.h7mmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8i2c.h9types.h8control.h9dsp.hexi.hgenPort.h:memorymap.hcommand-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines);pm_utility.c<v|8#   o    ~7|+ *~ y|2y|06z|  8z|pz| u D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\main_end.hsection.hmain_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.hexi.hpxi.htypes.hmisc.hpm_utility.h pm_sleep.h pm_common.h pm_pmic.h pm_send.h twl.h twl_sp.h spi_sp.h pm_sp.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.h instruction_ex.h!type_ex.h snd.hsnd.hmain.hcommand.hwork.harmArch.h"mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.h version_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.h ctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2std.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.hscfg_private.h7system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hmemorymap.hcommand-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines):pm_sleep.c;z|4 d{| ""#&& j D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\src\types.hmisc.hpm_selfBlink.hpm_utility.hpm_common.hpm_pmic.hspi_sp.htype.hpm_sp.htwl.htwl_sp.hpm.hspi.hconfig.hspi.hexi.hpxi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h mic_common.hioreg.h ioreg_SPI.h ioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.h systemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/std.hnwm.h nwm.h1wm.hnwm_sp.h2scfg.h scfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.h genPort.h7types.h memorymap.h command-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8pm_selfBlink.c9||3#&_# }|}|"r  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\pm\src\ltdwram_end.hsection.hltdwram_begin.hltdmain_end.hltdmain_begin.hfatfs.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hmemorymap.hgenPort2.hglobal.hgenPort.hpm.hspi.htype.h config.h spi.h exi.h pxi.h codecmode.h types.h misc.h pm_shutdown.h pm_utility.h pm_common.h pm_pmic.h pm_send.h spi_sp.hpm_sp.htwl.htwl_sp.hioreg_OS.hmic_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.h fifo.h control.h!instruction.h!type.h gpio.h!fifo_ex.h"instruction_ex.h#type_ex.h"snd.hsnd.h main.hcommand.hwork.harmArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h%sndex_common.h&card.h common.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.h types.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(systemWork.h thread.hapi.h)command.h*types.h)gx.h gx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.h wvr_common.h/wvr_sp.h0ctrdg.h ctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.h mi.h os.h math.h rand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4std.h nwm.hnwm.h6wm.h nwm_sp.h7scfg.hscfg.h8mmap_shared.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hcommand-line defines)<twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)<pm_shutdown.c=|>|"'  }|Jx|" ||| |<|#"~  |#L|#.|" W D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\scfg\ARM7.TWL\src\scfg.hioreg_OS.hmessage.hfifo.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.hspec.h userInfo_ts_300.h gxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.h mic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.h ioreg_PAD.hpm_common.htype.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.h types.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.hsystemWork.h thread.hapi.h!command.h"types.h!gx.h gx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.h%scfg.h1mmap_shared.h ioreg.hscfg_private.h2misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h3util.h3emulator.hi2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6scfg_proc.c7}|6& 0~| "h~|  ~|!zf#/i] 3 G D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\tpex_reg.htp_sp.hspi_sp.htypes.htpex_sp.hcodecmode.htwl.htwl_sp.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8tp_sp.c9|2~~~&}"*|"|~~ + |''$|'&  | p ' +| ++ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\tp\src\spi_sp.htypes.htp_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7tp_sampling.c8Ԃ|"* .||"| " ~B}&|~#z~  z~z3.{z~/؄|&|{ q3y~"+#l = D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\mic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.htwl.htwl_sp.hioreg_OS.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8mic_sp.c9,|;~~" \|~~{ |$ +~"  |jq x|' '##܉||  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\spi_sp.hioreg_OS.htypes.hmic_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6memorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7mic_sampling.c8|9"*||+''# ܋|"&|"*~++/## e D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\mic\src\code16.hcodereset.hcode32.hmic_sp.hspi_sp.htypes.hmicex_sp.hcodecmode.hinterrupt.hioreg_OS.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)8mic_irq.c9Ԍ|||z||| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fs\common\src\archive.hfile.hhash.htypes.hmisc.hrom.hromfat.hcommand.hutil.hfs.hcommon.hpxi.hos.hmi.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hbackup.hdma.hexMemory.htypes.hdevice.hpullOut.htypes.hrom.hhook.hapi.hoverlay.hfatfs.h systemWork.h thread.h api.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.std.hnwm.h nwm.h0wm.hnwm_sp.h1twl.h&scfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7fs_api.c8| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_api.c8|<ji  |}|ȍ|W D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\rom.hcard_spi.hnitro.hcard_event.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_common.c8Ѝ||y  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\os.hcard_task.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_task.c8|'||0||y |'v c! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_spi.c8 |~|  /|&' ď|##|}6} umog||"|D|/|# | & |D|* |."&m |."&m |~'{{ |~uD|~u|" |}y  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\src\card_common.hnitro.hcard_rom.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hrom.hpullOut.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_rom.c8<|~}JF ||> 8|@| D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\card_common.hnitro.hcard_rom.hcard_spi.hos.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hpullOut.hfs.htypes.h"rom.hhook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_command.c8L|.t|/ &&&&"""" |3|# S D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\card\ARM7\src\os.hpxi.hbackup.hcommon.hcard_command.hcard_task.htypes.hcard_utility.hcard_common.hnitro.hcard_rom.hctrdg.hpullOut.hrom.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.heeprom.hflash.hfram.hdma.hexMemory.hhash.htypes.hdevice.hfs.htypes.h"hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1twl.hscfg.h scfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.h camera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7card_sp_pullOut.c8d|6|'"O / D|t|#|' |}},|'K   D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\i2c\ARM7.TWL\src\ltdwram_end.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.htwl.hsection.hltdwram_begin.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.DBG.ISTD.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h scfg_private.h3system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.DBG.ISTD.TS.TWL.LTD.C.mchcommand-line defines)7i2c_instruction.c8||4|& p|Sz |"& ||| |"<|`|x| ||| || 8|Oz |2|||$# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\tmp\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\pm\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\memorymap.htypes.hgenPort2.hsndex_api.hioreg_SND.hmmap_global.hioreg_CFG.hpm_common.htypes.hmisc.hpm_pmic.hpm.h spi.h type.hconfig.hspi.hcdc_api.h misc.hcdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.htwl.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.hos_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.hioreg_PAD.hpm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.halarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_common.h#card.hcommon.h$eeprom.h$flash.h$fram.h$backup.h$dma.hexMemory.hhash.h$types.h$device.hpullOut.h$fs.htypes.h%rom.h$hook.h%api.h%archive.h%file.h%romfat.h%overlay.h%fatfs.hsystemWork.hthread.hapi.h&command.h'types.h&gx.hgx_sp.hlcd.h"wm.h(wm_sp.h)twl_hybrid.h version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1std.hnwm.hnwm.h3wm.hnwm_sp.h4scfg.hscfg.h5mmap_shared.hioreg.hscfg_private.h6system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9command-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines):cdc_api.c;|К|:|##|" |: X|: |#Ȝ|""| : 0| @| P| `| p| |  :>62 ##;;; '####| ###;;; 3|  .22.}}#?;; ###2 |   "##;;; 2 | | ;#;;; #####;;; '#h|p|';;; ### ### |*|; ::::: ::::::::2T|#2"|:&&*+ |:*+|"y P|"y |3~ ȩ|~'x  Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\cdc\ARM7.TWL\src\twl.htwl_sp.hspi_sp.hcdc_twlmode_access.hspi.hcdc_reg.htypes.hmisc.hcdc_api.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.h scfg_private.h4system.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8cdc_twlmode_access.c9|$|L|"h|'# Ī|"ܪ||##+ P|"&t||+#~"}"  |"(|+#~}|"Ȭ|Ԭ|a#: D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\snd\ARM7.TWL\src\memorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.hcodecmode.hpm.hspi.htype.hconfig.hspi.h cdc_api.h cdc_dsmode_access.h cdc_twlmode_access.h cdc_reg.h cdc.hsndex_api.h init.h spinLock.h emulator.h message.h system.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h interrupt.hevent.h context.h timer.h systemCall.h printf.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg_SPI.hpm_common.hioreg_PAD.hpm_common.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.h command.h global.h work.h armArch.h!mmap_global.hioreg_SND.hmmap_global.halarm.h capture.h bank.h data.h mml.h seq.h midiplayer.h channel.h exchannel.h util.h sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.h api.h%command.h&types.h%gx.h gx_sp.hlcd.h!wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.h wvr_common.h,wvr_sp.h-ctrdg.h ctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.h mi.h os.h pxi.h math.h rand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.h types.h std.h nwm.hnwm.h3wm.h nwm_sp.h4twl.h)scfg.hscfg.h5mmap_shared.hscfg_private.h6mmap_wramEnv.hmmap_wram.hcamera.hfifo.h7util.h7i2c.h8types.h7control.h8dsp.hexi.h genPort.h9command-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines):sndex_request.c;|~ |  |#}/#"# t|+  ̮| ~~|}.~[!~d~*Rl *~;~""~~.#~ 3 }}}}}}}}}}##}}|2|T|W|+; b D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htwl.htpex_reg.htp_sp.hspi_sp.htpex_sp.htwl_sp.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9tpex_sp.c:|' h|'&/#    D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\cdc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\tp\src\pm.hspi.htype.hconfig.hspi.hcdc_api.htypes.hmisc.hcdc_dsmode_access.hcdc_twlmode_access.hcdc_reg.hcdc.htpex_reg.hspi_sp.htypes.htp_sp.htwl.htwl_sp.htpex_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hmic_common.hioreg.hioreg_SPI.h pm_common.hioreg_PAD.h pm_common.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.hwvr_common.h+wvr_sp.h,ctrdg.hctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.hmi.hos.hpxi.hmath.hrand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9tpex_sampling.c:|& .| $|"@|&T|&h|*|*|*|*ȶ|*|*| _+}.}} ~~ #}&*x~y zz~~~x n:6  , C D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\codecmode.hsndex_api.htwl.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl_sp.hioreg_OS.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.h system.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.hthread.hapi.h$command.h%types.h$gx.h gx_sp.hlcd.h wm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8micex_sp.c9|*   "(~~#"6"}#72 |>|"+̻|##"~ij~~r"/#~"gj6м|"#"~ ,|K k D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7.TWL\mic\src\code16.hcodereset.hcode32.hmic_sp.hspi_sp.htypes.hmicex_sp.htwl.htwl_sp.hioreg_OS.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.hcommon.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.htypes.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.hgx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hos.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.htypes.hstd.hnwm.hnwm.h1wm.hnwm_sp.h2scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4misc.hsystem.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.hgenPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8micex_irq.c9|~0|'| ؾ|n  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmemorymap.htypes.hgenPort2.hmcu_reg.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h scfg_private.h5system.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)9mcu_intr.c:|:"'>:||zz|~/zz|,|~T||{ |N|  uu~#+f}e | |d D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\mcu\ARM7.TWL\src\ltdwram_end.hsection.hltdwram_begin.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.hmcu.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#fatfs.hsystemWork.h thread.h api.h$command.h%types.h$gx.h gx_sp.hlcd.hwm.h&wm_sp.h'twl_hybrid.hversion_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.hctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2scfg.hscfg.h3mmap_shared.h scfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8mcu_control.c9|/N#  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\memorymap.hmemorymap_sp.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h mi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7nvram_sp.c8|5~~|~~   # '"#~;|'&""**&'x||| {! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\nvram\src\spi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.h systemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.h nwm.h0wm.hnwm_sp.h1scfg.h scfg.h2mmap_shared.h ioreg.hscfg_private.h3misc.h system.h mmap_wramEnv.h mmap_wram.hcamera.h fifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.h exi.hgenPort.h6types.h memorymap.h command-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)7nvram_instruction.c8|!".0|"H|1".t|"."|~""}}"|\|"t|~""}}""|$|'~""}} ~"}}"-|'~""}} ~"}}"-|~~|.|~~|.T|".|".|".|"."" 4|".  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hfifo_ex.hemulator.hgenPort.hpxi.hfifo.hinstruction.hcontrol.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.htype.hgpio.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.htypes.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.hthread.hapi.h"command.h#types.h"gx.hgx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.htypes.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.hioreg.h scfg_private.h3misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h4util.h4i2c.h5types.h4control.h5dsp.hexi.htypes.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)6control.c7`|"8|/~7 |// ||"~  ( |> |9~rO~5"l### ###M~ |~# |3| ~~~! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\ltdwram_end.hsection.hltdwram_begin.hinstruction_ex.hgenPort.hgpio.hinstruction.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.htype.hfifo_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.hexMemory.hhash.h types.h device.hpullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.h&version_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.h&ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1twl.h&scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6instruction.c7T|+*>|. zy ?|&|>|&|&(|>T| &| >| &(| >t|?&|;>|&|>H|&h|>|&|>|&|> |&@|'&l|?>|&|>|&|>,|/r  x }| / fy}|"t D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\rtc\ARM7\src\code16.hcodereset.hcode32.hioreg.hgpio.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.h string.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.hcommon.heeprom.hflash.hfram.hbackup.hdma.h exMemory.h hash.htypes.hdevice.h pullOut.hfs.htypes.h rom.hhook.h api.h archive.h file.h romfat.h overlay.h fatfs.h systemWork.h thread.h api.h!command.h"types.h!gx.hgx_sp.hlcd.hwm.h#wm_sp.h$twl_hybrid.h%version_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.hwvr_common.h(wvr_sp.h)ctrdg.hctrdg_common.h*ctrdg_backup.h+nitro.h%ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.hmi.hos.hpxi.hmath.hrand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.htypes.hstd.hnwm.h nwm.h/wm.hnwm_sp.h0twl.h%scfg.h scfg.h1mmap_shared.hscfg_private.h2misc.h system.h mmap_wramEnv.hmmap_wram.hcamera.h fifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.h exi.hgenPort.h5types.h memorymap.h command-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6gpio.c7|(|L||L|`  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apistat.c;'/"""L/n}~{&z|&&#"" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtlowl.c;+}}"}x2"z" ~& .+** P#{x t '#c&"""""""""""+7" j+~'*H& ~܆ x} {\& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apickdsk.c;$~&}" |~j##""}b#"+~q #L&` Z&T,R.N2L4H8F:#"L'"{k̋&*}}~}H2}| 6~2_& \'"&z'#"'2#"("x #q62q# *"2  "&r'"m # yzz 4nzzzzzo;y _%H'#z +h+ }#"}y tz"""'2#"~~#w 72q# *"24 #&'''z"vn`%W + ~~ l *}}# 2=# D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs_twl_append.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiwrite.c;Ж* "/## # }yryy.&{r; {{6{&  {~#q3.G'x ~v #g~&"/" |'/'*)W~"; w&J;.~>#6: }+~6"'""'#2""  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\ltdwram_end.hsection.hltdwram_begin.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apicnfig.c;p}}$\*V t{"""""""""}""""""""#"""""""""#""""""""".{   D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rttermin.c;"& &<p{3".>  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs_target_os.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutbyte.c;~آ # '~D! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtutil.c;P'&+?"|xw 3|}*&t~4~@H~:& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilio.c;X+#2}/3okn!3' |zp  ~~*#'ԧ  '~&x|  zoo3#/&{& / ~o.'w u hx 3 ~ 3"} k  3" ;d~~  y} u +m'? +Y*# L 3'.}0/&":x* *"*z *X /~ |*;#"opjmi`#L X p | '#2 * ##d  #"  " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdevio.c;L#>#.7:#}#:D:+/+ /0/\/K;L#p' }~3C'} v t'u?j'?z ) D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtvfat.c;*}}}~$\z j &Z&& +'+.~#~h~.}~~|#} s x#/~#'L7#"}&"T/~v~~~~̹z #{{&#}"ĺ/"w "w "w '~N3M-5ػ{2#||B#||:'x 'x 'x ]%'{*}|2||.Ƚؽ}#~t~|T2&'u #"?w'~z ~~u(zr&~'/j*}"ܿ |{zqo|y#&#    K0 W\ l x    }}kkgx_!O1 d#)  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifilmv.c; |}|3plo &"6& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtdrobj.c;*"t "&   i   / //@u #o/.L&"#.}~* ~qy.@}}" ##'}~".|7.  2 2. }~yxw }rqnw w t #. |Y'. +.#'}t   +#+&*#D"'#~*+  x~H"' ""#.( ~{"&"6 *v "" $ }` . y"p *+0 H *  } . ! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apifrmat.c;~y   T+3 C'3u@t w _*k"}M5v _!7~"+t l_!} @+ /{& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9csstrtab.c;|0 ! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat16.c;@} y+~z}".   }'~##  ###&"*"}   oo~* x!u z " D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfat32.c;h&'+/ z "",+L2#|3"""x: &} 3~ v##  ###""""q"*&"}# &O2N3M4L5t p'|*#{* x!n~ d}x"**"***?*#,P&}#### D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apigfrst.c;+#"" %$ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9csunicod.c;$ v}5z..# +~~(|0}z\{{}'&|@}X'|~w "#z |`lx"""v |,w "v.~'{w +w~~ %}~~~'z   wv % D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfatxx.c;P " ..&**/s.#'+w  **.+'#{#"3.&l##or.~jD#7j #"py ~"ay&^"Zy- Ly:I7#~"Dy "#y t#}} 7  #y"aS-" l+6@|:{??>}&}l} }}"|}  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinfo.c;)#4~' ?  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\portconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apiinit.c;|{( H&7'g  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs_target_os.hportconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfs_naming_convention.hrtc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.hnwm.h2wm.h nwm_sp.h3scfg.hscfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.h genPort.h8types.hmemorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9portkern.c;:***.&*#3| ~~~{  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apimkdir.c; '}||z zw zmi  2 y*+  ""! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9apirealt.c;('/'~~#  xy# z x # .]*&" yy  + # {#" z> -& D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9prblock.c;,23J  #**` *&&'""#x w #qp;~hex *.**4.x"+"trkh*4 uzz&~u w *&y  'kp |'~t"("*"}|v2k*"#*}}+D t# vu {"s+~#~""y ? ,}zP zz&~{.}*{} &v t}c @" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtkernfn.c;./ ""~2}~ :y }'{{#/#}?{ H\l *"*'  B8xu}m q m "|||{z 0'***"x {**"'  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9drdefault.c;,4(\>Kz& &  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfsconf.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfs_naming_convention.hrtfs_target_os.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9drfile.c;<B'x$v #2&'~~Jo {" @ q  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\drdefault.hrtfs.hrtfs_twl_append.hportconf.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9attach.c; *+ &&&.&&&}kk3 *N}&.+' D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs_twl_append.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_append.c; 5 :/}|2w #+#Y'k"~H8i" \'/#}?~~lme",#~(~q'ju #o7D u " } `}{&"~|}2#".3  .t t]&0#d}z||pp W,W) C=}@zz#&" ||3nna"a "" #'}". 2 2 } oy}dc` jqn# ?" +t /&" ~4 ~+6  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\fatfs\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.h version.h system.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.h mi.h dma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.h snd.h main.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.h common.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.h types.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.h systemWork.h thread.hapi.h%command.h&types.h%gx.h gx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlLib.h*WlCmd.h*WlFrame.h*WlBuf.h*WlCmdLabel.h*WlStaList.h*WlParam.h*wvr.h wvr_common.h+wvr_sp.h,ctrdg.h ctrdg_common.h-ctrdg_backup.h.nitro.hctrdg_flash.h.ctrdg_sram.h.ctrdg_task.h.ctrdg_sp.h/memorymap.h mi.h os.h pxi.h math.h rand.h0qsort.h0math.h0fft.h0fx.h1checksum.h0crc.h0dgt.h0misc.h types.h std.h nwm.h nwm.h2wm.h nwm_sp.h3scfg.h scfg.h4mmap_shared.h ioreg.h scfg_private.h5misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.h exi.h genPort.h8types.h memorymap.h command-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h:symbols.h:command-line defines)9rtfs_twl_vfat_append.c;&}}}~(Xz f ;U+& +'+.~#~z#  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_api.c=/ ,/   " /}~~ \"||{||{||{T||{~   wX ,"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.hnwm.h4wm.hnwm_sp.h5scfg.hscfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.hexi.hgenPort.h:types.hmemorymap.hcommand-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdmc_cache.c=   6!||{H!||{! #|~"*! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\ltdwram_end.hsection.hltdwram_begin.hdma.htypes.hlo.htypes.hmisc.hhi.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hsdmc.h sdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.h instruction.h type.hgpio.h fifo_ex.h!instruction_ex.h"type_ex.h!snd.hsnd.hmain.h#command.h#global.h#work.h#armArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.h#capture.h#bank.h#data.h#mml.h#seq.h#midiplayer.h#channel.h#exchannel.h#util.h#sndex_api.h%sndex_common.h&card.hcommon.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.htypes.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(fatfs.hsystemWork.hthread.hapi.h)command.h*types.h)gx.hgx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.hwvr_common.h/wvr_sp.h0ctrdg.hctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.hmi.hos.hpxi.hmath.hrand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4misc.htypes.hstd.hnwm.hnwm.h6wm.hnwm_sp.h7scfg.hscfg.h8mmap_shared.hioreg.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hexi.hgenPort.h<memorymap.hcommand-line defines)=twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch workaround.h>symbols.h>command-line defines)=sdmc_thread.c?0"+&""" ""'$# ||P#/&/. #}AP$`$' &"";279p&}#&^'{,*7/~ {"3{yyw ". ||zrrs} }}|{"p rsrs }L;/ |'~}"~w 0 "   ~~"&'&30  }VX1 |1 ~}~.y"*" " ,2 |3 "2| |z(dp|;zx }|{# u vi_! feqV,T-} 4/~~#"zz lp  "5"  ~v"x|~'~y r u#''"7#6 |.kM&&   ^ 'd8{B>} eg abfi!|{wsQ?~O'! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\code16.hcodereset.hltdwram_end.hsection.hltdwram_begin.hcode32.hsdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htypes.h hi.h dma.h types.hmisc.hlo.h twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.hos_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.h instruction.h type.hgpio.h fifo_ex.h!instruction_ex.h"type_ex.h!snd.hsnd.hmain.h#command.h#global.h#work.h#armArch.h$mmap_global.hioreg_SND.hmmap_global.halarm.h#capture.h#bank.h#data.h#mml.h#seq.h#midiplayer.h#channel.h#exchannel.h#util.h#sndex_api.h%sndex_common.h&card.hcommon.h'eeprom.h'flash.h'fram.h'backup.h'dma.hexMemory.hhash.h'types.h'device.hpullOut.h'fs.htypes.h(rom.h'hook.h(api.h(archive.h(file.h(romfat.h(overlay.h(fatfs.hsystemWork.hthread.hapi.h)command.h*types.h)gx.hgx_sp.hlcd.h$wm.h+wm_sp.h,twl_hybrid.hversion_wl.h-WlLib.h.WlCmd.h.WlFrame.h.WlBuf.h.WlCmdLabel.h.WlStaList.h.WlParam.h.wvr.hwvr_common.h/wvr_sp.h0ctrdg.hctrdg_common.h1ctrdg_backup.h2nitro.hctrdg_flash.h2ctrdg_sram.h2ctrdg_task.h2ctrdg_sp.h3memorymap.hmi.hos.hpxi.hmath.hrand.h4qsort.h4math.h4fft.h4fx.h5checksum.h4crc.h4dgt.h4misc.htypes.hstd.hnwm.hnwm.h6wm.hnwm_sp.h7scfg.hscfg.h8mmap_shared.hioreg.hscfg_private.h9system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h:util.h:emulator.hi2c.h;types.h:control.h;dsp.hexi.hgenPort.h<memorymap.hcommand-line defines)=twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch workaround.h>symbols.h>command-line defines)=sdmc_intr.c?H||h:D:: ::; ;@;." '*';&# <!/"  *<*# <\==~ z&"*{w >u&&*{w >~} x&"*{w D?~~&&*{w ?*  @#. p@* @* A*`A.~"AA""/8B&"#~"#"#"# [&-@\}!"& v#t &$&|[&"R.s sqa"D4CDC C&  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_ip.hrtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.hsdmc.hsdmc.hsdif_reg.hsdmc_config.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);sdif.c=C*& $D"HD""##" D"' (E}" dE  s"d" F |"x " F "#F|""" lG"'# G"#" G|H|&'" xH*&""""&&&" (I"'"&&&&&&"I"'I"#" DJ"##"  "&'" J }}}}  vu }"4KDKTK hK&o"#"# 4L&}" L "t|{*qkk $M"#*.xM # " & " N 20N "TN tN &N &"""   " N |  "&'" v"  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drsdmc.c=O { XO &.#N z|x~~q}}t } |*"&y'xT" TT Ux!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drnand.c=`U'}} };&y~"&&&&nj}t  +"l D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\spi\ARM7\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\spi.hspi_sp.htypes.hnvram_sp.htwl.htwl_sp.hnitro.hnitro_sp.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.hsystem.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.h spec.huserInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.h shutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.hcommon.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.htypes.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.hgx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.hwvr_common.h)wvr_sp.h*ctrdg.hctrdg_common.h+ctrdg_backup.h,ctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.hmi.hos.hpxi.hmath.hrand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.hstd.hnwm.hnwm.h0wm.hnwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.hgenPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7sdmc_flags.c9d^""#^" L_#t__p_""x`""&`$*a~$ +!  D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\devices\sdif_reg.hsdif_ip.hrtfs.hrtfs.htwl.hsdmc.hsdmc.hsdmc_config.hportconf.hattach.hrtfspro.hcsstrtab.hrtfsconf.hrtfs_naming_convention.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.h systemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.h string.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.h mi.h dma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.h config.hmic_common.hspi.hioreg.h ioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.h rtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.h snd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.h systemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlLib.h,WlCmd.h,WlFrame.h,WlBuf.h,WlCmdLabel.h,WlStaList.h,WlParam.h,wvr.hwvr_common.h-wvr_sp.h.ctrdg.hctrdg_common.h/ctrdg_backup.h0nitro.hctrdg_flash.h0ctrdg_sram.h0ctrdg_task.h0ctrdg_sp.h1memorymap.hmi.hos.hpxi.hmath.hrand.h2qsort.h2math.h2fft.h2fx.h3checksum.h2crc.h2dgt.h2misc.htypes.hstd.hnwm.h nwm.h4wm.hnwm_sp.h5scfg.h scfg.h6mmap_shared.h ioreg.h scfg_private.h7misc.h system.hmmap_wramEnv.h mmap_wram.h camera.h fifo.h8util.h8emulator.hi2c.h9types.h8control.h9dsp.h exi.hgenPort.h:types.h memorymap.h command-line defines);twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h<symbols.h<command-line defines);drnand_aes.c=\a? { a "7"L! D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rtfs.hrtfs.htwl.hattach.hrtfspro.hcsstrtab.hportconf.hrtfsconf.hrtfs_naming_convention.htypes.hresource.hfatfs.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&systemWork.hthread.hapi.hcommand.h'gx.hgx_sp.hlcd.h"wm.h(wm_sp.h)twl_hybrid.hversion_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.hctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.htypes.hstd.hnwm.hnwm.h3wm.hnwm_sp.h4scfg.hscfg.h5mmap_shared.h ioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.h mmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9types.hmemorymap.hcommand-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.hsymbols.hcommand-line defines):fatfs_resource.c;pb9~~~s } ~}hh~e c} Lcy c'? cc} 0d~ ~w  d'";d2k" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\devices\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\twl\devices\sdmc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mcu\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\i2c\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\fatfs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\rsvwram_end.hsection.hrsvwram_begin.hsdif_reg.htwl.hsdmc_config.hrtfs.hrtfs.hsdmc.hdrfile.hrtfs_twl_append.hmcu_reg.htypes.hintr.hi2c.hcontrol.hioreg_EXI.hioreg.hioreg.hmisc.hi2c.h mcu.htypes.h unicode.h attach.hrtfspro.hcsstrtab.hportconf.h rtfsconf.hrtfs_naming_convention.hresource.h request.h format_rom_certificate.hformat_rom.hfatfs.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.h ioreg_SPI.hpm.h pm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.h!rtc.hrtc.hfifo.h"control.h#instruction.h#type.h"gpio.h#fifo_ex.h$instruction_ex.h%type_ex.h$snd.hsnd.hmain.h&command.h&global.h&work.h&armArch.h'mmap_global.hioreg_SND.hmmap_global.halarm.h&capture.h&bank.h&data.h&mml.h&seq.h&midiplayer.h&channel.h&exchannel.h&util.h&sndex_api.h(sndex_common.h)card.hcommon.h*eeprom.h*flash.h*fram.h*backup.h*dma.hexMemory.hhash.h*types.h*device.hpullOut.h*fs.htypes.h+rom.h*hook.h+api.h+archive.h+file.h+romfat.h+overlay.h+systemWork.hthread.hapi.h command.h,gx.hgx_sp.hlcd.h'wm.h-wm_sp.h.twl_hybrid.hversion_wl.h/WlLib.h0WlCmd.h0WlFrame.h0WlBuf.h0WlCmdLabel.h0WlStaList.h0WlParam.h0wvr.hwvr_common.h1wvr_sp.h2ctrdg.hctrdg_common.h3ctrdg_backup.h4nitro.hctrdg_flash.h4ctrdg_sram.h4ctrdg_task.h4ctrdg_sp.h5memorymap.hmi.hos.hpxi.hmath.hrand.h6qsort.h6math.h6fft.h6fx.h7checksum.h6crc.h6dgt.h6misc.htypes.hstd.hnwm.hnwm.h8wm.hnwm_sp.h9scfg.hscfg.h:mmap_shared.hscfg_private.h;system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h<util.h<emulator.hi2c.h=types.h<control.h=dsp.hexi.hgenPort.h>memorymap.hcommand-line defines)?twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h symbols.h command-line defines)?fatfs_command.c@e~0e|~..y xeey z  srerv+2/b!R^$/..~'T/el  g' Xg#g3g& 7~~q ~~h  i.PiK|i3i3i#C##+&}{  j|}{ #'+ .''. ?#~'~ ~n H? #y  nJLn,~n~ ~| o+(o@o  & o  &#Xp ' p   q {"w "&~~b"` [&q (r &*."#r   o~.6#xs { ||x "& t @t  { t t u  { Xu{{2|"& ".xvv**}~&*l#" w*+~"&*m#"  x8y~~"& y zHz#}" G~7xr{3&" #** d||'*&+/'#3; }# }} xx xzx ~}"Cx"Cx"Cx?x #.;"+{ ~z.{~"y+6/~~~~&&&&&( &* 3*? ܃" *&+''// ~*x }rq&/#/| |+z~{ Z( ĈԈ"###\"{"w.n~#+~R.J>D"zy ~y #vB D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_request.c9 ~ p ܋ z {y a!#*(C D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_thread.c9(:~p~~$0<  > D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\ARM7.TWL\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\fatfs\common\src\types.hrequest.hfatfs.htwl.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.h mmap_parameter.h ioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h sndex_common.h!card.h common.h"eeprom.h"flash.h"fram.h"backup.h"dma.hexMemory.hhash.h"types.h"device.hpullOut.h"fs.h types.h#rom.h"hook.h#api.h#archive.h#file.h#romfat.h#overlay.h#systemWork.h thread.h api.hcommand.h$gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.hversion_wl.h'WlLib.h(WlCmd.h(WlFrame.h(WlBuf.h(WlCmdLabel.h(WlStaList.h(WlParam.h(wvr.h wvr_common.h)wvr_sp.h*ctrdg.h ctrdg_common.h+ctrdg_backup.h,nitro.hctrdg_flash.h,ctrdg_sram.h,ctrdg_task.h,ctrdg_sp.h-memorymap.h mi.h os.h pxi.h math.h rand.h.qsort.h.math.h.fft.h.fx.h/checksum.h.crc.h.dgt.h.misc.h types.h std.h nwm.hnwm.h0wm.h nwm_sp.h1scfg.hscfg.h2mmap_shared.h ioreg.h scfg_private.h3misc.hsystem.h mmap_wramEnv.h mmap_wram.h camera.hfifo.h4util.h4emulator.h i2c.h5types.h4control.h5dsp.hexi.h genPort.h6types.hmemorymap.hcommand-line defines)7twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchworkaround.h8symbols.h8command-line defines)7fatfs_api.c9d~"# "& 5 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hinterrupt.hioreg_AES.hdma.htypes.hlo.htypes.hmisc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.h os_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.hversion.h system.hinterrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.hspec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.hmemorymap_sp.hmi.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.hthread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8aes_lo.c9x' ̢ 0 H ` &У&*({||~" *" D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\ARM7.TWL\src\ltdmain_end.hsection.hltdmain_begin.hformat_rom_certificate.hformat_rom.hinterrupt.hmutex.hpxi.hmath.hlo.htypes.hdgt.hmessage.haes_fifo.hhi.hdma.h types.hmisc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.h pad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.hscfg_private.h5system.hmmap_wramEnv.hmmap_wram.hcamera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9aes_hi.c:Ԥ~4~~P d{xw. .'3t3 Ȧ * s +^"&'+N<~ ##~ .w jze~ }'&  ww  }~~}y ' ""~ث }~ & "!Ĭ / 3#X t 6 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hfifo.hsection.hltdmain_begin.hdma.htypes.hlo.htypes.hmisc.hdgt.hmessage.haes_fifo.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.h alarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.hthread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.h)version_wl.h*WlLib.h+WlCmd.h+WlFrame.h+WlBuf.h+WlCmdLabel.h+WlStaList.h+WlParam.h+wvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/nitro.h)ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hos.hpxi.hmath.hrand.hqsort.hmath.hfft.hfx.h1checksum.hcrc.hmisc.htypes.hstd.hnwm.hnwm.h2wm.hnwm_sp.h3twl.h)scfg.hscfg.h4mmap_shared.hioreg.h scfg_private.h5system.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h6util.h6emulator.hi2c.h7types.h6control.h7dsp.hexi.hgenPort.h8memorymap.hcommand-line defines)9twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines)9aes_fifo.c: ."~z "" #T m7 D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\aes\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\aes\common\src\ltdmain_end.hsection.hltdmain_begin.htypes.hhi.htypes.hmisc.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.h card.h common.h!eeprom.h!flash.h!fram.h!backup.h!dma.hexMemory.hhash.h!types.h!device.hpullOut.h!fs.h types.h"rom.h!hook.h"api.h"archive.h"file.h"romfat.h"overlay.h"fatfs.hsystemWork.h thread.h api.h#command.h$types.h#gx.h gx_sp.hlcd.hwm.h%wm_sp.h&twl_hybrid.h'version_wl.h(WlLib.h)WlCmd.h)WlFrame.h)WlBuf.h)WlCmdLabel.h)WlStaList.h)WlParam.h)wvr.h wvr_common.h*wvr_sp.h+ctrdg.h ctrdg_common.h,ctrdg_backup.h-nitro.h'ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.h mi.h os.h pxi.h math.h rand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.h types.h std.h nwm.hnwm.h1wm.h nwm_sp.h2twl.h'scfg.hscfg.h3mmap_shared.h ioreg.hscfg_private.h4system.h mmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.h i2c.h6types.h5control.h6dsp.hexi.h genPort.h7memorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8aes_common.c9l<~rZ D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\stubs\isd\common\src\nitro.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.hmsl_c_version.hmslGlobals.hansi_prefix.ARM.hos_enum.hcstdiomsl_lib_ext1.hmsl_rsize_t.hstdio_api.hsize_t.hwchar_t.hnull.heof.hfile_struc.hstdarg.hcstdargva_list.hstdarg.ARM.hcrt0.hmmap_main.hmmap_parameter.hioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.hlimits.hclimitsansi_parms.hlimits_api.hos.hsystemCall.h version.h system.h interrupt.h interrupt.h event.h context.h timer.h systemCall.h printf.h message.h mutex.h exception.h init.h alloc.h tick.h reset.h pxi.h init.h compparam.h wram.h swap.h uncompress.h secureUncompress.h byteAccess.h stream.h uncomp_stream.h compress.h init.h endian.h cache.h platform.h regname.h spec.h userInfo_ts_300.hgxcommon.hentropy.h systemWork.h spinLock.h resource.h alarm.h arena.h valarm.h callTrace.h functionCost.h profile.h application_jump.h ownerInfoEx.h spec.hstring.hmemory.h unicode.hstdlib.hownerInfo.h codecmode.h memorymap_sp.hmi.hdma.hsharedWram.hpad.h pad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.h shutdown.hrtc.hrtc.h fifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.h main.hcommand.hglobal.hwork.harmArch.hmmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.hsndex_common.hcard.h common.h eeprom.h flash.h fram.h backup.h dma.h exMemory.h hash.h types.h device.h pullOut.h fs.h types.h!rom.h hook.h!api.h!archive.h!file.h!romfat.h!overlay.h!fatfs.hsystemWork.h thread.h api.h"command.h#types.h"gx.h gx_sp.hlcd.hwm.h$wm_sp.h%twl_hybrid.hversion_wl.h&WlLib.h'WlCmd.h'WlFrame.h'WlBuf.h'WlCmdLabel.h'WlStaList.h'WlParam.h'wvr.h wvr_common.h(wvr_sp.h)ctrdg.h ctrdg_common.h*ctrdg_backup.h+ctrdg_flash.h+ctrdg_sram.h+ctrdg_task.h+ctrdg_sp.h,memorymap.h mi.h os.h pxi.h math.h rand.h-qsort.h-math.h-fft.h-fx.h.checksum.h-crc.h-dgt.h-misc.h types.h std.h nwm.hnwm.h/wm.h nwm_sp.h0twl.hscfg.hscfg.h1mmap_shared.hioreg.hscfg_private.h2misc.hsystem.h mmap_wramEnv.hmmap_wram.hcamera.hfifo.h3util.h3emulator.h i2c.h4types.h3control.h4dsp.hexi.h genPort.h5types.hmemorymap.hcommand-line defines)6twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)6stubs_isd.c7\-pO D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wvr\ARM7.TWL\src\code16.hcodereset.hcode32.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.hos.htypes.hwmsp_private.hwvr.hioreg.hioreg.hmi.hos.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.hstdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.hmmap_parameter.h ioreg_AES.hioreg_SCFG.hioreg_SND.hioreg_MI.hioreg_GX.hioreg_EXI.hioreg_PXI.hioreg_OS.hioreg_SD.harmArch.h limits.h climits ansi_parms.h limits_api.h systemCall.h version.hsystem.h interrupt.hinterrupt.h event.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.h ownerInfoEx.h spec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.h memorymap_sp.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg_SPI.hpm.hpm_common.hioreg_PAD.hpm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.htype_ex.hsnd.hsnd.hmain.hcommand.hglobal.hwork.harmArch.h mmap_global.hioreg_SND.hmmap_global.halarm.hcapture.hbank.hdata.hmml.hseq.hmidiplayer.hchannel.hexchannel.hutil.hsndex_api.h!sndex_common.h"card.hcommon.h#eeprom.h#flash.h#fram.h#backup.h#dma.hexMemory.hhash.h#types.h#device.hpullOut.h#fs.htypes.h$rom.h#hook.h$api.h$archive.h$file.h$romfat.h$overlay.h$fatfs.hsystemWork.h thread.hapi.h%command.h&types.h%gx.hgx_sp.hlcd.h wm.h'wm_sp.h(twl_hybrid.hversion_wl.h)WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr_common.h*wvr_sp.h+ctrdg.hctrdg_common.h,ctrdg_backup.h-ctrdg_flash.h-ctrdg_sram.h-ctrdg_task.h-ctrdg_sp.h.memorymap.hmi.hpxi.hmath.hrand.h/qsort.h/math.h/fft.h/fx.h0checksum.h/crc.h/dgt.h/misc.hstd.hnwm.hnwm.h1nwm_sp.h2twl.hscfg.hscfg.h3mmap_shared.h scfg_private.h4misc.hsystem.hmmap_wramEnv.h mmap_wram.hcamera.hfifo.h5util.h5emulator.hi2c.h6types.h5control.h6dsp.hexi.hgenPort.h7types.hmemorymap.hcommand-line defines)8twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mchcommand-line defines)8wvr_sp.c9`Q D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\exi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7.TWL\common\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\inc\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\cache\include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_Common\Include\D:\Program Files\Freescale\CW for NINTENDO DSi V1.2_patch2\ARM_EABI_Support\msl\MSL_C\MSL_ARM\Include\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\init\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\os\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pxi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\mi\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\gx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\std\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\mi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\pad\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\spi\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\rtc\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\hw\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\snd\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\card\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fs\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\fatfs\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro_wl\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\wvr\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM9\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\ctrdg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\math\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\fx\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\nwm\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\scfg\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\common\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\twl\camera\ARM7\D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\include\nitro\exi\ARM7\(D:\pseg1\dev\autobuild\TwlSDK\branch-5_5\working\TwlSDK\build\libraries\wm\ARM7\src\wram_end.hsection.hwram_begin.hltdmain_end.hsection.hltdmain_begin.hos.hwmsp_private.hmemorymap.htypes.hgenPort2.hwmsp_common.hwmsp_mac.hWlLib.hnitro.hwm_private.hwm.htypes.htwl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.h stdio.h msl_c_version.h mslGlobals.h ansi_prefix.ARM.h os_enum.h cstdio msl_lib_ext1.h msl_rsize_t.h stdio_api.h size_t.h wchar_t.h null.h eof.h file_struc.h stdarg.h cstdarg va_list.h stdarg.ARM.h crt0.h mmap_main.h mmap_parameter.hioreg_AES.h ioreg_SCFG.h ioreg_SND.h ioreg_MI.h ioreg_GX.h ioreg_EXI.h ioreg_PXI.h ioreg_OS.h ioreg_SD.h armArch.hlimits.h climits ansi_parms.h limits_api.h os.hsystemCall.hversion.hsystem.hinterrupt.hinterrupt.hevent.hcontext.htimer.hsystemCall.hprintf.hmessage.hmutex.hexception.hinit.halloc.htick.hreset.hpxi.hinit.hcompparam.hwram.hswap.huncompress.hsecureUncompress.hbyteAccess.hstream.huncomp_stream.hcompress.hinit.hendian.hcache.hplatform.hregname.hspec.huserInfo_ts_300.hgxcommon.hentropy.hsystemWork.hspinLock.hresource.halarm.harena.hvalarm.hcallTrace.hfunctionCost.hprofile.happlication_jump.hownerInfoEx.hspec.hstring.hmemory.hunicode.hstdlib.hownerInfo.hcodecmode.hmemorymap_sp.hmi.hdma.hsharedWram.hpad.hpad.hioreg_PAD.hxyButton.hspi.hconfig.hmic_common.hspi.hioreg.hioreg_SPI.h pm.hpm_common.hioreg_PAD.h pm_common.htype.hfifo.hshutdown.hrtc.hrtc.hfifo.hcontrol.hinstruction.htype.hgpio.hfifo_ex.hinstruction_ex.h type_ex.hsnd.hsnd.hmain.h!command.h!global.h!work.h!armArch.h"mmap_global.hioreg_SND.hmmap_global.h alarm.h!capture.h!bank.h!data.h!mml.h!seq.h!midiplayer.h!channel.h!exchannel.h!util.h!sndex_api.h#sndex_common.h$card.hcommon.h%eeprom.h%flash.h%fram.h%backup.h%dma.hexMemory.hhash.h%types.h%device.hpullOut.h%fs.htypes.h&rom.h%hook.h&api.h&archive.h&file.h&romfat.h&overlay.h&fatfs.hsystemWork.hthread.hapi.h'command.h(types.h'gx.hgx_sp.hlcd.h"wm.h)wm_sp.h*twl_hybrid.hversion_wl.h+WlCmd.hWlFrame.hWlBuf.hWlCmdLabel.hWlStaList.hWlParam.hwvr.hwvr_common.h,wvr_sp.h-ctrdg.hctrdg_common.h.ctrdg_backup.h/ctrdg_flash.h/ctrdg_sram.h/ctrdg_task.h/ctrdg_sp.h0memorymap.hmi.hpxi.hmath.hrand.h1qsort.h1math.h1fft.h1fx.h2checksum.h1crc.h1dgt.h1misc.hstd.hnwm.hnwm.h3nwm_sp.h4twl.hscfg.hscfg.h5mmap_shared.hioreg.h scfg_private.h6misc.hsystem.hmmap_wramEnv.hmmap_wram.h camera.hfifo.h7util.h7emulator.hi2c.h8types.h7control.h8dsp.hexi.hgenPort.h9command-line defines):twl.h.16M.A7.THUMB.CW.CWFES.CWVER-3.ISTD.REL.TS.TWL.LTD.C.mch command-line defines):wmsp_system.c;<|~~ B} 6qF_start_LtdMainParams_start_LtdModuleParams_start_BuildParams7_start_ModuleParams% OSi_IrqThreadQueueGq OS_IRQTable2OS_IRQTableOSi_IrqCallbackInfo ;GU3OSi_FuncTerminateOS_FPutStringOS_PutString~9"OSi_CurrentThreadPtrOSi_StackForDestructorOSi_RescheduleCountOSi_IsThreadInitializedOSi_SystemCallbackInSwitchThreadOSi_ThreadInfoOSi_IdleThreadStack&OSi_IdleThreadGOSi_LauncherThreadA  oYOSiHeapInfo 9bBOSi_NeedResetTimerOSi_TickCounter g ]$xOSi_LtdMainParamst&9 q!klMMIi_NDmaConfigW [ <)gPADi_XYButtonAvailable   @K sSurroundDecaysMasterPansOrgPansOrgVolume@_SNDi_DecibelSquareTableSNDi_DecibelTable {&u0 |!SNDi_SharedWorkSNDi_Work1>$ PMi_StatusPMi_InitializedPMi_Workv K+PMi_LEDStatus >1PMi_BlinkPatternNoPMi_BlinkPatternData62 ;$AMATH_SHA256iConst @ K0*I$̏cardi_common ! cardi_rom_baseW"$| I2CiSlowRateTable W -<?Q1g_VersionpBusContextirqHelperStack07! .g_sdio_settingl&,g_pRecvMsgBufferAhcdDmaNo|g_recvMesgg_pMsgBufferg_mesg2dpcTaskStack_0r- 9&W'FATFSi_glFATFSi_crossed_file_corewmT/FATFSi_prtfs_cfgFATFSi___fat_primary_cache_5FATFSi___fat_primary_index_4%FATFSi___fat_primary_cache_1TFATFSi___fat_primary_cache_6FATFSi___fat_primary_cache_9FATFSi___fat_primary_cache_7FATFSi___fat_primary_index_1FATFSi___fat_primary_cache_4?FATFSi___fat_primary_index_9nFATFSi___fat_primary_cache_8FATFSi___fat_hash_table_6FATFSi___fat_primary_index_8FATFSi___fat_primary_index_0'FATFSi___fat_primary_cache_3VFATFSi___fat_hash_table_5FATFSi___fat_primary_index_5FATFSi___fat_primary_index_6FATFSi___fat_hash_table_0 FATFSi___fat_hash_table_18FATFSi___fat_primary_index_3gFATFSi___fat_hash_table_3FATFSi___fat_hash_table_4FATFSi___fat_primary_index_7FATFSi___fat_primary_cache_0FATFSi___fat_hash_table_7IFATFSi___fat_hash_table_8uFATFSi___fat_hash_table_9FATFSi___fat_hash_table_2FATFSi___fat_primary_index_2FATFSi___fat_primary_cache_2+FATFSi___mem_block_hash_table[FATFSi___rtfs_user_tableRtfsMyMutexBufFATFSi___mem_file_poolFATFSi___fat_buffer_5FATFSi___fat_buffer_4GFATFSi___fat_buffer_3oFATFSi___fat_buffer_1FATFSi___fat_buffer_0FATFSi___fat_buffer_9FATFSi___fat_buffer_8FATFSi___fat_buffer_77FATFSi___fat_buffer_6_FATFSi___mem_drobj_poolFATFSi___fat_buffer_2FATFSi___mem_finode_poolFATFSi___mem_block_pool FATFSi___mem_drives_structures$"*$>AFATFSi_prompt_tableFATFSi_string_table &a!FATFSi_print_buffer!P#FATFSi_fatxx_d@<FATFSi_current_pdrFATFSi_enabled_drivers' FATFSi_polled_signal}   hFATFSi_med_st'XFATFSi_file_headsFATFSi_file_cylindersFATFSi_file_secptrackFATFSi_file_capacity=FATFSi_file_adjusted_capacitymFATFSi_fileDescListK+6FATFSi_rtfs_first_attachFATFSi_rtfs_first_stat_flag4*kCQAFATFSi_func_SDCARD_OutFATFSi_func_SDCARD_In OV&SD_port_en_numbersSD_INFO1_VALUEFATFSi_sdmc_dma_noSD_INFO2_MASK_VALUE:SD_INFO_ERROR_VALUE`SD_INFO1_MASK_VALUESD_INFO2_VALUEFATFSi_sdmc_dma2_noFATFSi_thread_flagSDCARD_UseAesFlag=sdmc_abort_requestbFATFSi_sdmc_dtq_arraysdmc_slpq_arrayFATFSi_ulSDCARD_SectorCountFATFSi_pSDCARD_BufferAddr0FATFSi_sdmc_result_dtq_array_SDNandContextFATFSi_ulSDCARD_RestSectorCountSDCARD_SectorSizeSDCARD_EndFlag0SDPortCurrentContextxSDCurrentAccessFATFSi_sdmc_intrq_arraysdmc_slpq FATFSi_sdmc_intrq/FATFSi_sdmc_dtqQFATFSi_sdmc_result_dtqzFATFSi_sdmc_almFATFSi_sdmc_current_specSD_SDSTATUSSDPort1ContextSDPort0Context'FATFSi_sdmc_intr_tskNFATFSi_sdmc_tskpFATFSi_sd_intr_stackFATFSi_sd_stacko4nTsd_last_info1SDCARDi_TransferSDCARD_TransferByHost_EndFlagSDCARD_EndByDmaFlag3 ySDCARD_V2FlagSD_port_numberBȃ FATFSi_func_usr_sdmc_outsdmc_total_sectorsUNAND_FAT_PARTITION_COUNTNAND_RAW_SECTORSNAND_FAT1_SECTORS=NAND_FAT2_SECTORSaNAND_FAT3_SECTORSNAND_FAT0_SECTORS -2mFATFSiComanndFunctionTable<FATFSiCommandBufferFATFSiArcnameList. 8cjF2#8:wmspW0rR'=/ 3Dv  N2 I8 8888808\8^h8l8p8}8888886 8^ 8ZX8888| | J | ,| L| L| Z$| Y*| 0| "4| )8| >| D| H| kR| X| \| b| h| n| t| Rx| || | | |%||H|Q| P"| M,| i8| B| L| b| j| r| | | 3 | N| R| i| | | | | | | | 3 |! |H$|K(|O0|'4|(H|T|`|Yl|x|| a| a| a| j| I | +.| a<| : F| aR| | | | | |#|$|-|/|*| | | $|#(|$,|/F| a| | .| | $| | ,|%D| L| V| ||``|QX|}| | | | | | |||V |||||||||||||||8|4|0|,|(| $| | | | | | | | | | | | | | | ||||| | | | | | | || s$| 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